CN1738017A - 半导体器件的电极结构及其制造方法 - Google Patents

半导体器件的电极结构及其制造方法 Download PDF

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Publication number
CN1738017A
CN1738017A CNA2005100920565A CN200510092056A CN1738017A CN 1738017 A CN1738017 A CN 1738017A CN A2005100920565 A CNA2005100920565 A CN A2005100920565A CN 200510092056 A CN200510092056 A CN 200510092056A CN 1738017 A CN1738017 A CN 1738017A
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China
Prior art keywords
electrode
photosensitive layer
layer
semiconductor device
top section
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CNA2005100920565A
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郑显秀
沈成珉
张东铉
朴明洵
宋永僖
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Samsung Electronics Co Ltd
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Samsung Electronics Co Ltd
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Publication of CN1738017A publication Critical patent/CN1738017A/zh
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    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
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Abstract

本发明涉及集成电路(IC)芯片和封装。在半导体器件的制造中，沉积感光层从而以该感光层覆盖电极的暴露部分。该感光层然后经历光刻工艺从而部分地去除该感光层的覆盖该电极的部分。该电极可以是球电极或凸点电极，该半导体器件可以包含在晶片级封装(WLP)或倒装芯片封装中。

Description

半导体器件的电极结构及其制造方法
技术领域
本发明总体涉及集成电路(IC)芯片和封装，更具体地，本发明涉及IC芯片和器件的电极结构，并涉及形成用于IC芯片和封装的电极结构的方法。
背景技术
随着集成电路(IC)朝向更高速度和更大针脚数(pin count)前进，采用丝键合(wire bonding)技术的第一级(first level)互连技术已经接近或甚至达到了其物理极限。用于实现细针距(fine pitch)丝键合结构的新改进的技术不能满足增长的IC芯片处理速度和更大IC芯片针脚数所产生的需求。因此，当前的趋势是以其它封装结构取代丝键合结构，例如倒装芯片(flip chip)封装和晶片级封装(WLP)
倒装芯片封装和WLP结构部分特征在于提供凸点电极(bump electrode)或球电极(通常由焊料制成)，其连接到位于包含在封装中的一个或更多个IC芯片的主表面的互连端子。器件可靠性极大地依赖于每个电极凸点/球的结构和材料以及其作为电互连的效果。
下面将参考图1和2说明传统的焊料凸点结构，其中相同的附图标记表示相同的元件。图1是倒装芯片封装的示意性剖视图，图2是安装在图1的倒装芯片封装中的焊料凸点结构的示意性剖视图。
共同参考图1和2，IC芯片1设置有芯片焊盘(chip pad)2，其通常由铝形成。开口定义在一个或更多个钝化(passivation)层3和4中，其暴露芯片焊盘2的表面。使焊料凸点5通过层3和4中的开口电接触芯片焊盘2。
通常，一个或更多个凸点下金属化(UBM)层7插入在焊料凸点5和芯片焊盘2之间。UBM层7作用来将凸点5可靠地固定到芯片焊盘2，并且防止湿气吸收进入到芯片焊盘2和IC芯片1中。例如，UBM层7可以包括：通过溅射Cr、Ti或者TiW沉积的粘附层；以及通过溅射Cu、Ni、NiV沉积的润湿层(wetting layer)。也可以沉积Au的氧化层。
焊料凸点5在其另一端安装于印刷电路板(PCB)基板9的PCB焊盘(pad)8，并且PCB焊盘8电连接到在PCB基板9的背面上的焊料球10。图1的附图标记12表示用于消散IC芯片1产生的热的散热部件，图1的附图标记11表示用于对整体封装增加物理支撑的加固部件。
焊料凸点上的机械应力是结构缺陷的来源，其可以大大削弱器件可靠性。图2示出应力导致在焊料凸点5中形成破裂或裂缝13的示例。裂缝越大，互连变得越弱，当裂缝扩散得完全穿过该焊料凸点结构时，器件故障容易发生。
美国专利第6,187,615号(2001年2月13日，Nam Seog Kim等人)公开了一种半导体封装，其意图加强包含在其中的焊料凸点连接的结构特性。如图3所示，结构40包括构图的导体17，其在第一钝化层14上延伸并在一端连接到芯片焊盘12。绝缘层24具有暴露该构图的导体17的另一端的开口。焊料凸点32形成在绝缘层24和该构图的导体17上，势垒金属(barriermetal)27插入在它们之间。此外，加固层34形成在绝缘层24上从而支撑焊料凸点32。加固层34通过散布然后固化低粘性液体聚合物来形成。液体聚合物的低粘性允许表面张力向上牵引该聚合物到焊料凸点32的侧面从而产生对焊料凸点32的凹形支撑物。当该封装安装到电路板上时该凹形支撑物吸收施加到焊料凸点32的应力。
然而，实际上，难以精确地控制低粘性液体聚合物的固化特性。结果，难以在整个芯片表面维持凸点电极的暴露部分的一致性。当芯片随后安装到PCB基板时，一致性差可以导致差的粘附和/或差的电互连。
发明内容
根据本发明的第一方面，提供一种制造半导体器件的方法，其包括沉积感光层(photosensitive layer)从而用该感光层覆盖电极的暴露部分，以及使该感光层经历光刻工艺从而部分地去除覆盖该电极的该感光层。
根据本发明的另一方面，提供一种制造半导体器件的方法，其包括：提供包括表面和多个电极的半导体元件，该多个电极具有安装于该表面的各个底部部分；沉积感光层从而覆盖该半导体元件的表面和电极；以及使该感光层经历光刻工艺来部分地去除该感光层从而暴露该电极的各个顶部部分。
根据本发明的又一方面，提供一种制造晶片级封装的方法，其包括：提供具有表面和多个电极的晶片，该表面包括被刻划线(scribe line)分开的多个芯片区域，该多个电极具有安装在该芯片区域的每个中的各个底部表面；用感光层覆盖该晶片的表面；以及使该感光层经历光刻工艺从而部分地去除该感光层从而暴露出芯片区域的每个中的该电极的各个顶部部分。
根据本发明的又另一方面，提供一种半导体器件，其包括电极，该电极包括安装于导电层的底部部分并且该电极被部分地埋入聚合物层中，其中该电极的顶部部分通过该聚合物层中的开口被暴露，并且其中该聚合物层由当在预固化状态时是感光性的材料形成。
根据本发明的另一方面，提供一种半导体器件，其包括：半导体元件，该半导体元件包括表面和具有安装于该表面的各个底部部分的多个电极；以及聚合物层，其覆盖该半导体元件的该表面并且其包括多个开口，该改口分别部分地暴露该电极的顶部部分，其中该聚合物层由当在预固化状态中时是感光性的材料形成。
根据本发明的又一方面，提供一种半导体器件，其包括：包括导电层和多个电极的半导体元件，该多个电极具有安装于该导电层的各个底部部分；以及聚合物层，其接触该半导体元件的该导电层并且其包括多个开口部分，该开口部分分别部分地暴露该电极的顶部部分，其中该电极中每个的直径大于该电极的暴露的顶部部分中每个的直径。
附图说明
参考附图，根据下面的详细说明，本发明的上述及其它方面和特征将变得容易理解，其中：
图1是倒装芯片封装的示意性剖视图；
图2是安装于图1的倒装芯片封装中的焊料凸点的示意性剖视图；
图3是包括支撑焊料凸点的加固层的半导体封装的示意性剖视图；
图4A到4G是用于说明制造根据本发明实施例的半导体封装的方法的示意性剖视图；
图5A到5H是用于说明制造根据本发明另一实施例的半导体封装的方法的示意性剖视图；
图6是根据本发明实施例的倒装芯片封装的示意性剖视图；
图7是根据本发明实施例包含在图6的倒装芯片封装中的焊料凸点结构的示意性剖视图。
具体实施方式
现在将参考本发明的优选但是非限制性实施例详细说明本发明。
图4A到4G是用于说明制造根据本发明实施例的半导体封装的方法的示意性剖视图。
首先参考图4A，制造或提供半导体结构使其通常包括半导体基板100、集成电路层102、芯片焊盘104、钝化层106、以及绝缘层108。该绝缘层可以例如由BCB(苯并环丁烯)、聚酰亚胺、环氧树脂，硅氧化物，硅氮化物或这些材料的组合形成。另外，如图所示，穿过钝化层106和绝缘层108形成开口从而暴露芯片焊盘104的顶部表面区域。本示例中，绝缘层108延伸到芯片焊盘104的表面，因此，开口的侧壁由绝缘层108确定。
参考图4B，导电再分布(redistribution)图案110形成在绝缘层108上从而通过绝缘层108和钝化层106中的开口电接触芯片焊盘104。
然后，参考图4C，沉积具有开口的绝缘层112，该开口暴露再分布图案110的顶部表面部分。本实施例中，再分布图案110的该暴露的表面部分定义焊料球焊盘115。
下面，参考图4D和4E，焊料球114定位于焊料球焊盘115上，然后经历热回流(therma reflow)工艺从而粘附所产生的回流焊料球114A到下面的焊料球焊盘115。
然后，参考图4F，感光聚合物层(polymer layer)116涂到图4E的结构上从而覆盖回流焊料球114A和绝缘层112。感光聚合物层116可以例如由聚酰亚胺或PBO(聚苯并恶唑)形成，并且可以例如通过丝网印刷、旋涂或散布技术，或者通过将图4E的结构浸到聚合物材料液体中来沉积。
接着，参考图4G，图4F的感光聚合物层116经历光刻工艺，其中该聚合物层的一部分被去除从而定义具有暴露焊料球114A的顶部部分的开口的加固聚合物层116A。如图所示，加固聚合物层116A的一部分包围焊料球114A的侧壁部分。优选地，焊料球114A的直径大于加固聚合物层116A中的开口中的直径。换言之，焊料球114A的直径大于焊料球114A的暴露部分的直径。
该光刻工艺包括熟知的曝光和显影工艺，从而去除感光聚合物层116的选定部分。另外，显影后，该工艺优选地包括温度超过层116的聚合物材料的粘性温度的热处理。这种热处理对于实现感光聚合物层116的固化和回流是有效的。如图4G所示，该聚合物材料的回流导致加固聚合物层116A的接触焊料球114A的侧面的部分逐渐变细(tapering)。例如，在聚酰亚胺的情况下，该热处理可以在300℃到350℃实施。另外举个例子，在PBO的情况下，该热处理可以在280℃到350℃实施。
虽然未示出，但是图4G的IC芯片结构通常包括多个焊料球114A。另外，本发明不局限于晶片级处理的同时，图4G的IC芯片结构可构成同时形成在一个半导体晶片上的多个芯片结构中的一个。在这种情况下，在上述用来通过加固层116A暴露焊料球114A的相同光刻工艺期间，优选地晶片上的IC芯片相邻对之间的刻划线暴露出来。然后晶片可以经历切割工艺，该工艺中该晶片沿着刻划线被分为多个IC芯片。刻划线上的光致抗蚀剂聚合物层的去除对于避免切割锯被聚合物残渣污染是有效的。
图4G的加固聚合物层116A对于吸收施加到焊料球上的各种应力是有效的，特别是当该IC芯片安装到电路板并被使用长期时间的时候。另外，和前面结合图3说明的制造技术相比，使用光致抗蚀剂聚合物层和光刻来通过加固层116A暴露焊料球114A允许焊料球114A的暴露部分的更精确的结构定义。同样地，可以实现每个IC芯片的多个焊料球的暴露部分的更好的一致性，这又允许与后面形成的IC封装的印刷电路板的改善的粘附性和电接触。
图5A到5H是用于说明制造根据本发明实施例的半导体封装的方法的示意性剖视图。
首先参考图5A，制造或提供半导体结构使其通常包括半导体基板200、集成电路层202、芯片焊盘204、钝化层206、以及绝缘层208。该绝缘层可以例如由BCB(苯并环丁烯)、聚酰亚胺、环氧树脂、硅氧化物、硅氮化物或这些物质的组合形成。另外，如图所示，穿过钝化层206和绝缘层208形成开口从而暴露芯片焊盘204的顶部表面区域。本示例中，绝缘层208延伸到芯片焊盘204的表面，因此，该开口的侧壁由绝缘层208确定。
参考图5B，导电再分布图案210形成在绝缘层208上从而通过绝缘层208和钝化层206中的开口电接触芯片焊盘204。
然后，参考图5C，牺牲性光致抗蚀剂层213在导电再分布图案210上构图为其中具有开口，该开口暴露再分布图案210的顶部表面部分。本实施例中，牺牲性光致抗蚀剂层213在后面的回流工艺期间用于焊料球的定位，并且再分布图案210的暴露的表面部分定义焊料球焊盘215。
接着，参考图5D和5E，焊料球214定位于焊料球焊盘215上，然后经历热回流工艺从而将得到的回流焊料球214A粘附到下面的焊料球焊盘215。
然后，参考图5F，牺牲性光致抗蚀剂层213被去除从而暴露下面的再分布图案210。
参考图5G，感光聚合物层216涂到图5F的结构上从而覆盖回流焊料球214A和再分布图案210。感光聚合物层216可以例如由聚酰亚胺或PBO(聚苯并恶唑)形成，并且可以例如通过丝网印刷、旋涂或散布技术，或者通过将图5F的结构浸入到聚合物材料的液体中来沉积。
接着，参考图5H，图5G的感光聚合物层216经历光刻工艺，其中该聚合物层的一部分被去除从而定义具有开口的加固聚合物层216A，该开口暴露焊料球214A的顶部部分。和图4G的实施例相似，加固聚合物层216A的一部分包围焊料球214A的侧壁部分。优选地，焊料球214A的直径大于加固聚合物层216A中的开口中的直径。
该光刻工艺包括熟知的曝光和显影工艺从而去除感光聚合物层216的选定部分。另外，显影后，该工艺优选地包括温度超过层216的聚合物材料的粘性温度的热处理。这种热处理对实现感光聚合物层216的固化和回流是有效的。如图5H所示，聚合物材料的回流导致加固聚合物层216A的接触焊料球214A的侧面的部分的逐渐变细。例如，在聚酰亚胺的情况下，该热处理可以在300℃到350℃实施。另外举个例子，在PBO的情况下，该热处理可以在280℃到350℃实施。
虽然未示出，图5H的该IC芯片结构通常包括多个焊料球214A。另外，本发明不局限于晶片级处理的同时，图5H的该IC芯片结构可构成同时形成在半导体晶片上的多个芯片结构中的一个。在这种情况下，在上述用于通过加固层216A暴露焊料球214A的光刻工艺期间，优选地晶片上相邻的IC芯片对之间的刻划线暴露出来。然后晶片可经历切割工艺，该工艺中该晶片沿着刻划线被分为多个IC芯片。刻划线上的光致抗蚀剂聚合物层的去除对于避免切割锯被聚合物残渣污染是有效的。
图5H的加固聚合物层216A对于吸收施加到焊料球上的各种应力是有效的，特别是当该IC芯片安装到电路板并被使用长期时间的时候。另外，和前面结合图3说明的制造技术相比，使用光致抗蚀剂聚合物层和光刻来通过加固层216A暴露焊料球214A允许焊料球214A的暴露部分的更精确的结构定义。同样地，可以实现每个IC芯片的多个焊料球的暴露部分的更好的一致性，这又允许与后面形成的IC封装的印刷电路板的改善的粘附性和电接触。
图6是根据本发明实施例的倒装芯片封装的示意性剖视图，图7是根据本发明实施例的图6的倒装芯片封装的焊料凸点结构的示意性剖视图。
共同参考图6和7，倒装芯片封装包括具有焊料凸点414A阵列的IC芯片400，该焊料凸点414A穿过绝缘层308和钝化层306电安装到各个芯片焊盘304。插入在焊料凸点414A和芯片焊盘304之间的是粘附层310和柱层(stud layer)320。柱层320可以例如由镍或镍合金形成。
加固层416A覆盖IC芯片400的表面同时暴露焊料凸点414A的顶部部分。加固层416A由在预固化状态时是感光性的聚合物形成，并且可根据上面结合图4A到4G、以及图5A到5H说明的实施例来形成。
图6的附图标记430表示保护性树脂。如图所示，焊料凸点414A的阵列分别接触PCB基板500的一侧上的电极焊盘(未示出)。PCB基板500的另一侧设置有焊料球514A的阵列。加固层516A覆盖PCB基板500的该侧，同时暴露焊料球514A的顶部部分。加固层516A由在预固化态(pre-curedstate)时是感光性的聚合物形成，并且可以根据上面结合图4A到4G、以及图5A到5H说明的实施例来形成。
图7的实施例不同于前面的实施例在于没有使用分布(distribution)图案并且在于电极是凸点电极，而不是球电极。在这点上，注意本发明并不局限于凸点电极和球电极，它们是经常考虑的技术术语。也就是说，凸点电极特征在于相对较小并且利用丝网印刷工艺等直接制造在IC芯片(或PCB)上。另一方面，球电极特征在于相对较大并且预先形成。
另外，本发明不局限于焊料材料制成的电极。
最后，虽然上面结合优选实施例说明了本发明，但是本发明不局限于此。相反，对于本领域技术人员来说，对优选实施例的各种变化和修改变得明显。因此，本发明不局限于上述优选实施例。相反，本发明的基本思想和范围由所附的权利要求来定义。

Claims (45)

1.一种制造半导体器件的方法，包括：
沉积感光层从而利用该感光层覆盖电极的暴露部分；及
使所述感光层经历光刻工艺从而部分地去除覆盖所述电极的所述感光层。
2.如权利要求1所述的方法，其中所述电极是球电极和凸点电极中的一种。
3.如权利要求2所述的方法，其中所述电极的底部安装于导电层，并且其中感光层的部分去除暴露所述电极的顶部部分。
4.如权利要求3所述的方法，其中所述电极的直径大于所述电极的暴露的顶部部分的直径。
5.如权利要求3所述的方法，其中所述导电层位于半导体芯片上。
6.如权利要求3所述的方法，其中所述导电层位于印刷电路板上。
7.如权利要求1所述的方法，其中所述光刻工艺包括所述感光层的曝光、所述曝光的感光层的显影、以及所述显影的感光层的热处理。
8.如权利要求7所述的方法，其中热处理的温度超过所述感光层的粘性温度。
9.如权利要求8所述的方法，其中所述感光层包括聚酰亚胺，并且所述热处理的温度在300℃到350℃的范围。
10.如权利要求8所述的方法，其中所述感光层包括聚苯并恶唑，并且所述热处理的温度在280℃到350℃的范围。
11.如权利要求1所述的方法，其中所述感光层还沉积在相邻所述电极设置的绝缘层上。
12.如权利要求3所述的方法，其中所述感光层还沉积在所述导电层上。
13.如权利要求1所述的方法，其中所述感光层包含聚酰亚胺和聚苯并恶唑中的至少一种。
14.一种制造半导体器件的方法，包括：
提供包括表面和多个电极的半导体元件，所述电极具有安装于所述表面的各个底部部分；
沉积感光层从而覆盖所述半导体元件的所述表面和所述电极；以及
使所述感光层经历光刻工艺从而部分地去除所述感光层从而暴露所述电极的各个顶部部分。
15.如权利要求14所述的方法，其中，所述光刻工艺之后，所述感光层包括分别在所述电极的顶部部分上对齐的多个开口，并且其中所述开口中的每个的直径小于所述电极中的每个的直径。
16.如权利要求15所述的方法，其中，所述光刻工艺之后，所述感光层包括基本平坦的顶部表面和分别沿着所述多个电极的侧面延伸并保护所述侧面的多个逐渐变细部分。
17.如权利要求14所述的方法，其中所述光刻工艺包括所述感光层的曝光、所述曝光的感光层的显影、以及所述显影的感光层的热处理。
18.如权利要求17所述的方法，其中所述热处理的温度超过所述感光层的粘性温度。
19.如权利要求14所述的方法，其中所述感光层包括聚酰亚胺和聚苯并恶唑中的至少一种。
20.如权利要求14所述的方法，其中所述多个电极中的每个是球电极和凸点电极中的一种。
21.一种制造晶片级封装的方法，包括：
提供具有表面和多个电极的晶片，所述表面包括由刻划线分开的多个芯片区域，所述多个电极具有安装在所述芯片区域的每个中的各个底部表面；
以感光层覆盖所述晶片的所述表面；
使所述感光层经历光刻工艺从而局部地去除所述感光层从而暴露所述芯片区域的每个中的所述电极的各个顶部部分。
22.如权利要求21所述的方法，其中所述光刻工艺还至少部分地去除所述感光层的覆盖分开所述芯片区域的所述刻划线的部分。
23.如权利要求22所述的方法，还包括沿着所述刻划线切割所述晶片。
24.如权利要求21所述的方法，其中所述光刻工艺包括所述感光层的曝光、所述曝光的感光层的显影、以及所述显影的感光层的热处理。
25.如权利要求24所述的方法，其中所述热处理的温度超过所述感光层的粘性温度。
26.如权利要求21所述的方法，其中所述感光层包括聚酰亚胺和聚苯并恶唑中的至少一种。
27.如权利要求21所述的方法，其中所述多个电极的每个是球电极和凸点电极中的一种。
28.一种半导体器件，其包括电极，所述电极包括安装于导电层的底部部分并部分地埋入聚合物层中，其中所述电极的顶部部分通过所述聚合物层中的开口暴露出来，并且其中所述聚合物层由在预固化态时是感光性的材料形成。
29.如权利要求28所述的半导体器件，其中所述电极是球电极和凸点电极中的一种。
30.如权利要求29所述的半导体器件，其中所述电极的直径大于所述电极的所述暴露的顶部部分的直径。
31.如权利要求28所述的半导体器件，其中所述聚合物层包括聚酰亚胺和聚苯并恶唑中的至少一种。
32.一种半导体器件，包括：
半导体元件，其包括表面和多个电极，所述电极具有安装于所述表面的各个底部部分；以及
聚合物层，其覆盖所述半导体元件的所述表面并且包括分别部分地暴露所述电极的顶部部分的多个开口，其中所述聚合物层由在预固化态时是感光性的材料形成。
33.如权利要求32所述的半导体器件，其中所述多个电极的每个是球电极和凸点电极中的一种。
34.如权利要求33所述的半导体器件，其中所述电极的每个的直径大于所述电极的每个暴露的顶部部分的直径。
35.如权利要求32所述的半导体器件，其中所述半导体元件是晶片级封装的半导体芯片。
36.如权利要求32所述的半导体器件，其中所述半导体元件是倒装芯片封装的半导体芯片，并且其中所述电极的所述顶部部分接触所述倒装芯片封装的印刷电路板的第一表面。
37.如权利要求32所述的半导体器件，其中所述聚合物层包括聚酰亚胺和聚苯并恶唑中的至少一种。
38.如权利要求32所述的半导体器件，其中所述印刷电路板的相反的第二表面包括多个第二电极，并且其中第二聚合物层覆盖所述印刷电路板的所述第二表面并包括分别部分地暴露所述第二电极的顶部部分的多个开口。
39.如权利要求38所述的半导体器件，其中所述第二聚合物层由在预固化态时是感光性的材料形成。
40.一种半导体器件，包括：
半导体元件，其包括导电层和多个电极，所述电极具有安装于所述导电层的各个底部部分；以及
聚合物层，其接触所述半导体元件的所述导电层并且其包括分别部分地暴露所述电极的顶部部分的多个开口；
其中所述电极的每个的直径大于所述电极的所述暴露的顶部部分的每个的直径。
41.如权利要求40所述的半导体器件，其中所述导电层是晶片级封装的再分布层。
42.如权利要求40所述的半导体器件，其中所述聚合物层由在预固化态时是感光性的材料形成。
43.如权利要求40所述的半导体器件，其中所述多个电极的每个是球电极和凸点电极中的一种。
44.如权利要求43所述的半导体器件，其中所述电极的每个的直径大于所述电极的每个暴露的顶部部分的直径。
45.如权利要求43所述的半导体器件，其中所述聚合物层包括聚酰亚胺和聚苯并恶唑中的至少一种。
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