JP4980709B2 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
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- JP4980709B2 JP4980709B2 JP2006348572A JP2006348572A JP4980709B2 JP 4980709 B2 JP4980709 B2 JP 4980709B2 JP 2006348572 A JP2006348572 A JP 2006348572A JP 2006348572 A JP2006348572 A JP 2006348572A JP 4980709 B2 JP4980709 B2 JP 4980709B2
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Description
バンプ下地層の側面全周が有機保護膜により覆われているので、バンプ下地層が水分に晒されて腐食し、バンプ下地層が応力緩和層から剥離することを防止することができる。その結果、バンプ下地層の剥離に伴う半田端子の半導体チップに対する剥離を防止することができるので、接続信頼性の高い半導体装置を実現することができる。
この構成によれば、ポリイミドからなる応力緩和層と、チタンまたはニッケルを含む金属からなるバンプ下地層のバリア層とは密着性が低いので、そのバリア層上の接続パッドが酸化(腐食)すると、応力緩和層とバリア層との間で剥離が生じやすい。バリア層の側面が有機保護膜で覆われる構成では、たとえば、バリア層と接続パッドとの積層界面からの接続パッドの酸化を防止することができるので、バリア層の応力緩和層からの剥がれを防止することができる。
この構成によれば、接続パッドの側面が露出されないので、接続パッドの酸化(腐食)を防止することができる。そのため、バリア層の応力緩和層からの剥がれを一層防止することができる。
また、請求項4記載の発明は、前記有機保護膜と前記バリア層の前記側面との間に空間が形成されていることを特徴とする、請求項2または3に記載の半導体装置である。
また、請求項5記載の発明は、前記接続パッドは、平面視円形状に形成されていることを特徴とする、請求項2ないし4のいずれかに記載の半導体装置である。
また、請求項6記載の発明は、前記バリア層は、チタンまたはニッケルを含む金属からなることを特徴とする、請求項2ないし5のいずれかに記載の半導体装置である。
また、請求項7記載の発明は、前記有機保護膜は、前記半田端子の中央円周に沿って前記半田端子との境界を有しており、前記境界が、前記半田端子の前記中央円周と同じ長さであることを特徴とする、請求項1ないし6のいずれかに記載の半導体装置である。
また、請求項8記載の発明は、前記半田端子の中央円周と前記応力緩和層との間には、前記応力緩和層、前記バンプ下地層および前記半田端子に区画された隙間が形成されており、前記有機保護膜は、前記隙間にのみ形成されていることを特徴とする、請求項1ないし7のいずれかに記載の半導体装置である。
また、請求項9記載の発明は、前記内部パッドは、前記半導体チップの前記表面にマトリックス状に配置されていることを特徴とする、請求項1ないし8のいずれかに記載の半導体装置である。
図1は、この発明の一実施形態に係る半導体装置の図解的な底面図(実装基板への接合面を示す図)である。図2は、図1における半田ボール6の周辺を拡大して示す図解的な底面図である。図3は、図1に示すA−Aの切断面で切断したときの断面図である。なお、図2および図3では、半導体装置を破断線で破断することにより、その一部を省略して示している。
電極パッド2は、たとえば、平面視略矩形状のアルミニウムパッドであり、半導体チップ1の機能面1Aに作り込まれた機能素子と電気的に接続されている。また、電極パッド2は、半導体チップ1の外周縁に沿って、平面視矩形環状に2列に並べて配置されており、互いに隣り合う電極パッド2の間には、それぞれ適当な間隔が空けられている(図1参照)。
応力緩和層4は、たとえば、ポリイミドからなる。応力緩和層4は、表面保護膜3の表面全域を被覆するように形成されて、この半導体装置に加わる応力を吸収して緩和する機能を有している。また、応力緩和層4には、各電極パッド2と対向する位置に貫通孔10(開口部)が貫通して形成されており、パッド開口9から露出する電極パッド2は、貫通孔10を通して外部に臨んでいる。そして、電極パッド2における貫通孔10に露出する面、貫通孔10の内面および応力緩和層4上における貫通孔10の周縁部11を覆うように、バリア層12が形成されている。
そして、バリア層12の上に、接続パッド5が形成されている。より具体的には、貫通孔10内におけるバリア層12の内面12Aおよび応力緩和層4上におけるバリア層12の外端面12Bに接触するように接続パッド5が形成されている。これにより、バリア層12と接続パッド5とからなるバンプ下地金属(バンプ下地層)が形成され、応力緩和層4上におけるバリア層12の側面12Cは、接続パッド5から露出する露出面とされている。
埋設部13は、たとえば、円柱状に形成されており、バリア層12を介して電極パッド2と電気的に接続されている。
図4A〜図4Hは、図1に示す半導体装置の製造方法を示す図解的な断面図である。
次いで、図4Bに示すように、応力緩和層4に貫通孔10が形成される。
その後、図4Gに示すように、有機保護層19の紫外線露光された部分(有機保護膜20以外の部分)が除去される。これにより、隙間21において、バリア層12の側面12Cを接触して覆う有機保護膜20が形成される。そして、図4Hに示すように、半導体ウエハW内の各半導体チップ1間に設定されたダイシングラインLに沿って、半導体ウエハWが切断されて(ダイシング)される。これにより、図1に示す構成の半導体装置が得られる。
この半導体装置のように、バリア層12の側面12C全周が有機保護膜20で覆われる構成では、バリア層12と接続パッド5との接触界面が水分に晒されて接続パッド5が酸化(腐食)することを防止することができるので、バリア層12の応力緩和層4からの剥がれを防止することができる。さらに、接続パッド5の突出部14の側面14Bが半田ボール6により覆われており、突出部14の側面14Bが露出されないので、これによっても接続パッド5の酸化(腐食)を防止することができる。そのため、バリア層12の応力緩和層4からの剥がれを一層防止することができる。
また、この半導体装置は、半田ボール6が外部の実装基板7上のパッド8に接続されることにより、その実装基板7に実装される。この実装状態で、半導体チップ1や実装基板7の熱膨張/熱収縮に起因する応力が半田ボール6に生じても、接続パッド5の突出部14に半田ボール6が接着された状態では、突出部14が半田ボール6の内部に突出することになるので、その応力の一部を半田ボール6の内部に突出する突出部14により緩和することができる。そのため、半田ボール6におけるクラックの発生を防止することもできる。
なお、この実施形態では、有機保護膜20は、隙間21において、バリア層12の側面12Cを接触して覆うように形成されているとしたが、バリア層12の露出部分(この実施形態においては、側面12C)と外部との接触を防止することができれば、有機保護膜20を他の構成にすることができる。有機保護膜20は、たとえば、図5に示すように、有機保護膜20とバリア層12の側面12Cとの間に空間23が形成されるように形成されてもよい。
たとえば、上述の実施形態では、接続パッド5が銅を用いて形成されるとしたが、半田濡れ性を有する金属であれば、銅に限られない。たとえば、接続パッド5は、金を用いて形成されてもよい。その場合には、たとえば、図6に示すように、接続パッド5の突出部14と半田ボール6との界面に、金の拡散を防止するためのニッケルからなる拡散防止層22を形成することが好ましい。
さらに、上述の実施形態では、WL−CSPの半導体装置を例に取り上げたが、この発明は、WL−CSPの半導体装置以外にも、実装基板に対して、半導体チップの表面を対向させて、半導体チップの裏面が露出した状態で実装(ベアチップ実装)される、半導体装置に適用することもできる。
2 電極パッド
4 応力緩和層
5 接続パッド
6 半田ボール
10 貫通孔
11 周縁部
12 バリア層
12C 側面
14 突出部
14B 側面
20 有機保護膜
26 突出部
27 上側突出部
28 下側突出部
29 金属パッド
Claims (9)
- 半導体チップと、
前記半導体チップの表面に形成された電気接続用の内部パッドと、
前記半導体チップ上に形成され、前記内部パッドを露出させる開口部を有する応力緩和層と、
前記内部パッドにおける前記開口部に露出する面、前記開口部の内面および前記応力緩和層上における前記開口部の周縁部を覆うように形成されるバンプ下地層と、
前記バンプ下地層上に形成され、外部との電気接続のための半田端子と、
前記応力緩和層上に形成され、前記バンプ下地層の周囲を取り囲み、前記バンプ下地層の側面を覆う有機保護膜と、を含み、
前記応力緩和層は、前記有機保護膜に対して選択的に露出していることを特徴とする、半導体装置。 - 前記応力緩和層は、ポリイミドからなり、
前記バンプ下地層は、チタンまたはニッケルを含む金属からなるバリア層と、このバリア層上に積層され、半田濡れ性を有する金属からなる接続パッドと、を含み、
前記有機保護膜は、前記バリア層の側面を覆うように形成されていることを特徴とする、請求項1記載の半導体装置。 - 前記半田端子は、前記接続パッドの側面を覆っていることを特徴とする、請求項2記載の半導体装置。
- 前記有機保護膜と前記バリア層の前記側面との間に空間が形成されていることを特徴とする、請求項2または3に記載の半導体装置。
- 前記接続パッドは、平面視円形状に形成されていることを特徴とする、請求項2ないし4のいずれかに記載の半導体装置。
- 前記バリア層は、チタンまたはニッケルを含む金属からなることを特徴とする、請求項2ないし5のいずれかに記載の半導体装置。
- 前記有機保護膜は、前記半田端子の中央円周に沿って前記半田端子との境界を有しており、
前記境界が、前記半田端子の前記中央円周と同じ長さであることを特徴とする、請求項1ないし6のいずれかに記載の半導体装置。 - 前記半田端子の中央円周と前記応力緩和層との間には、前記応力緩和層、前記バンプ下地層および前記半田端子に区画された隙間が形成されており、
前記有機保護膜は、前記隙間にのみ形成されていることを特徴とする、請求項1ないし7のいずれかに記載の半導体装置。 - 前記内部パッドは、前記半導体チップの前記表面にマトリックス状に配置されていることを特徴とする、請求項1ないし8のいずれかに記載の半導体装置。
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DE102004047730B4 (de) * | 2004-09-30 | 2017-06-22 | Advanced Micro Devices, Inc. | Ein Verfahren zum Dünnen von Halbleitersubstraten zur Herstellung von dünnen Halbleiterplättchen |
JP4574393B2 (ja) * | 2005-02-24 | 2010-11-04 | ルネサスエレクトロニクス株式会社 | 半導体装置の製造方法 |
US7361990B2 (en) * | 2005-03-17 | 2008-04-22 | Taiwan Semiconductor Manufacturing Company, Ltd. | Reducing cracking of high-lead or lead-free bumps by matching sizes of contact pads and bump pads |
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2006
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- 2007-12-18 CN CN2007101611248A patent/CN101211877B/zh not_active Expired - Fee Related
- 2007-12-24 KR KR1020070136628A patent/KR20080059526A/ko not_active Application Discontinuation
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CN101211877A (zh) | 2008-07-02 |
JP2008159949A (ja) | 2008-07-10 |
US8643180B2 (en) | 2014-02-04 |
CN101211877B (zh) | 2012-05-30 |
KR20080059526A (ko) | 2008-06-30 |
US20080150134A1 (en) | 2008-06-26 |
TW200845341A (en) | 2008-11-16 |
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