CN101211877A - 半导体装置 - Google Patents

半导体装置 Download PDF

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Publication number
CN101211877A
CN101211877A CNA2007101611248A CN200710161124A CN101211877A CN 101211877 A CN101211877 A CN 101211877A CN A2007101611248 A CNA2007101611248 A CN A2007101611248A CN 200710161124 A CN200710161124 A CN 200710161124A CN 101211877 A CN101211877 A CN 101211877A
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stress
semiconductor device
buffer layer
barrier layer
connection pads
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CNA2007101611248A
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CN101211877B (zh
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新开宽之
奥村弘守
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Rohm Co Ltd
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Rohm Co Ltd
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  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

本发明的半导体装置包括：半导体芯片；在所述半导体芯片的表面上形成的电连接用的内部焊盘；在所述半导体芯片上形成的、具有露出所述内部焊盘的开口部的应力缓冲层；形成为覆盖所述内部焊盘的从所述开口部露出的面、所述开口部的内面以及所述应力缓冲层上的所述开口部的周边部的凸块基底层；形成在所述凸块基底层上的、用于与外部电连接的焊料端子；以及形成在所述应力缓冲层上的、包围所述凸块基底层的周围、覆盖所述凸块基底层的侧面的保护层。

Description

半导体装置
技术领域
本发明涉及一种半导体装置，具体涉及一种适用于WL-CSP(晶片级芯片尺寸封装：Wafer Level-Chip Size Package)技术的半导体装置。
背景技术
最近，伴随着半导体装置的高功能化·多功能化，推进了WL-CSP(晶片级芯片尺寸封装：Wafer Level-Chip Size Package，以下记述为“WL-CSP”)技术的实用化。在WL-CSP技术中，在晶片状态下完成封装工序，通过切割切出的各个芯片尺寸成为封装尺寸。
如图9所示，适用于WL-CSP技术的半导体装置包括由表面保护膜81覆盖表面的半导体芯片82、在表面保护膜81上层叠的应力缓冲层83(例如，聚酰亚胺等)、以及设置在应力缓冲层83上的焊料球84。在表面保护膜81上形成焊盘开口86，用于使半导体芯片82的内部布线的一部分露出作为电极焊盘85。在应力缓冲层83上形成贯通孔87，用于使从焊盘开口86露出的电极焊盘85露出。
形成凸块基底层92，使得覆盖电极焊盘85的表面、贯通孔87的内面以及应力缓冲层83的表面中的贯通孔87的周边。凸块基底层92由阻挡层88(例如钛、钨钛等)和在该阻挡层88上形成的金属镀层89(例如铜、金等)构成。将焊料球84设置在金属镀层89的表面上，并经过金属镀层89和阻挡层88与电极焊盘85电连接。通过使焊料球84与安装基板90上的焊盘91连接，实现将该半导体装置安装在安装基板90上(相对于安装基板电连接和机械连接)。
但是，在与金属镀层89的关系中，由于焊料球84只固定于金属镀层89的表面上，因此从焊料球84和应力缓冲层83之间，阻挡层88的侧面88C和金属镀层89的侧面89C成为露出的状态。这些露出的侧面88C和侧面89C暴露于湿气等水气中，在腐蚀阻挡层88和金属镀层89时，恐怕阻挡层88会从应力缓冲层83剥离下来。
发明内容
本发明的目的是提供一种可以防止凸块基底层从应力缓冲层剥离的半导体装置。
本发明的半导体装置包括：半导体芯片；在所述半导体芯片的表面上形成的电连接用的内部焊盘；在所述半导体芯片上形成的、具有露出所述内部焊盘的开口部的应力缓冲层；形成为覆盖所述内部焊盘的从所述开口部露出的面、所述开口部的内面以及所述应力缓冲层上的所述开口部的周边部的凸块基底层；形成在所述凸块基底层上的、用于与外部电连接的焊料端子；以及形成在所述应力缓冲层上的、包围所述凸块基底层的周围、覆盖所述凸块基底层的侧面的保护层。
根据这种结构，凸块基底层形成在内部焊盘的从开口部露出的面、开口部的内面以及应力缓冲层上的开口部的周边部上，使得覆盖它们。在凸块基底层上，形成用于与外部电连接的焊料端子。然后，对于凸块基底层的侧面，其全周被保护层覆盖。
由于凸块基底层的侧面全周被保护层覆盖，因此可以防止凸块基底层暴露于水分而腐蚀以及凸块基底层从应力缓冲层上剥离。结果是，由于可以防止伴随着凸块基底层的剥离而导致的焊料端子相对于半导体芯片的剥离，因此可以实现连接可靠性高的半导体装置。
优选地，所述应力缓冲层由聚酰亚胺构成，所述凸块基底层包含：由含有钛或镍的金属构成的阻挡层；以及在该阻挡层上层叠的、由具有焊料湿润性的金属构成的连接焊盘。
利用这种结构，由于由聚酰亚胺构成的应力缓冲层和由含有钛或镍的金属构成的凸块基底层的阻挡层的密接性降低，因此在氧化(腐蚀)该阻挡层上的连接焊盘时，在应力缓冲层和阻挡层之间容易产生剥离。在阻挡层的侧面被保护层覆盖的构成中，例如，由于可以防止从阻挡层和连接焊盘之间的层叠界面氧化连接焊盘，因此可以防止阻挡层从应力缓冲层剥离。
而且，优选地，所述焊料端子覆盖所述连接焊盘的侧面。
根据这种结构，由于连接焊盘的侧面没有露出，因此可以防止连接焊盘的氧化(腐蚀)。因此，可以进一步防止阻挡层从应力缓冲层剥离。
本发明的上述或其它目的、特征和效果通过下面参照附图对实施方式进行的说明将变得更为清楚。
附图说明
图1是根据本发明一实施方式的半导体装置的图解的底面图。
图2是表示图1中的焊料球的周边放大了的图解的底面图。
图3是沿着图1所示的A-A切断面切断时的剖面图。
图4A是按照工艺顺序表示图1的半导体装置的制造方法的图解的剖面图。
图4B是按照工艺顺序表示图1的半导体装置的制造方法的图解的剖面图，并且是表示图4A的工序之后的工序的图。
图4C是按照工艺顺序表示图1的半导体装置的制造方法的图解的剖面图，并且是表示图4B的工序之后的工序的图。
图4D是按照工艺顺序表示图1的半导体装置的制造方法的图解的剖面图，并且是表示图4C的工序之后的工序的图。
图4E是按照工艺顺序表示图1的半导体装置的制造方法的图解的剖面图，并且是表示图4D的工序之后的工序的图。
图4F是按照工艺顺序表示图1的半导体装置的制造方法的图解的剖面图，并且是表示图4E的工序之后的工序的图。
图4G是按照工艺顺序表示图1的半导体装置的制造方法的图解的剖面图，并且是表示图4F的工序之后的工序的图。
图4H是按照工艺顺序表示图1的半导体装置的制造方法的图解的剖面图，并且是表示图4G的工序之后的工序的图。
图5是表示图1所示半导体装置的变形例的图解的剖面图，其中有机保护膜是其他结构。
图6是表示图1所示半导体装置的变形例的图解的剖面图，其中连接焊盘是其他结构。
图7是表示图1所示半导体装置的变形例的图解的剖面图，其中连接焊盘的突出部是其他结构。
图8是表示图1所示半导体装置的变形例的图解的剖面图，其中连接焊盘的突出部是其他结构。
图9是表示现有技术的半导体装置的结构的图解的剖面图，是表示将半导体装置安装在安装基板上的状态的图。
具体实施方式
图1是根据本发明一实施方式的半导体装置的图解的底面图(是表示安装基板的接合面的图)。图2是放大表示图1中的焊料球6的周边的图解的底面图。图3是表示沿着图1所示的A-A的切断面切断的剖面图。而且，在图2和图3中，通过将半导体装置以断线断开，省略表示其一部分。
该半导体装置是利用WL-CSP技术制作的半导体装置，包括：半导体芯片1；覆盖半导体芯片1的功能面1A(制作半导体芯片1中的功能元件的面)的表面保护膜3；在表面保护膜3上形成的应力缓冲层4；在应力缓冲层4上形成的连接焊盘5；以及与连接焊盘5连接的、并用于与外部电连接的焊料球6(焊料端子)。因此，该半导体装置通过各焊料球6与安装基板7上的焊盘8连接而实现安装到安装基板7上(相对于安装基板7电连接和机械连接)。
半导体芯片1例如是平面视图为大致矩形形状的硅芯片，在其功能面1A上，形成多个电极焊盘2(内部焊盘)。
电极焊盘2例如是平面视图为大致矩形形状的铝焊盘，并与在半导体芯片1的功能面1A上制作的功能元件电连接。此外，电极焊盘2沿着半导体芯片1的外周边，以平面视图为矩形环状并列配置成两列，在互相邻接的电极焊盘2之间，分别空出适当的间隔(参照图1)。
表面保护膜3由氧化硅或氮化硅构成。在表面保护膜3上形成用于露出各电极焊盘2的焊盘开口9。
应力缓冲层4例如由聚酰亚胺构成。应力缓冲层4形成为覆盖表面保护膜3的整个表面区域，并具有吸收和缓和施加于该半导体装置上的应力的功能。此外，在应力缓冲层4上，在与各电极焊盘2相对的位置上贯通形成贯通孔10(开口部)，从焊盘开口9露出的电极焊盘2通过贯通孔10而面向外部。此外，形成阻挡层12，使得覆盖电极焊盘2的从贯通孔10露出的面、贯通孔10的内面以及应力缓冲层4上的贯通孔10的周边部11。
阻挡层12例如由含有钛或镍的金属(例如钛、镍、钛钨等)构成，具有防止电极焊盘2腐蚀的功能。阻挡层12被形成为平面视图为大致圆形形状，例如，以厚度1000～2000埃形成。
此外，在阻挡层12上形成连接焊盘5。更具体地说，形成连接焊盘5，使得接触在贯通孔10内的阻挡层12的内面12A和在应力缓冲层4上的阻挡层12的外端面12B。由此，形成由阻挡层12和连接焊盘5构成的凸块基底金属(凸块基底层)，应力缓冲层4上的阻挡层12的侧面12C是从连接焊盘5露出的露出面。
连接焊盘5使用具有焊料湿润性的金属例如铜形成。该连接焊盘5包括：埋设于贯通孔10中的埋设部13；以及与该埋设部13一体形成的、在应力缓冲层4上突出的突出部14。
埋设部13例如被形成为圆柱状，并通过阻挡层12与电极焊盘2电连接。
突出部14形成为例如高度为10～50μm的圆柱状。此外，突出部14形成为在与半导体芯片1和应力缓冲层4的叠层方向(下面简单称为“叠层方向”)垂直的宽度方向(以下简单称为“宽度方向”)上的宽度(直径)比贯通孔10的同方向上的开口宽度(直径)大(更宽)。由此，突出部14的周边部15在宽度方向上伸出并与阻挡层12的外端面12B接触。
焊料球6使用焊料被例如形成为大致球状，并覆盖连接焊盘5的突出部14的整个表面(前端面14A和侧面14B)。通过形成大致球状的焊料球6，在焊料球6的宽度方向上的中心圆周6L和应力缓冲层4之间，形成面向应力缓冲层4的表面4A、阻挡层12的侧面12C以及焊料球6的球面6A的间隙21。
在间隙21上形成有机保护膜20(保护层)。该有机保护膜20例如由低吸水性的有机材料即聚酰亚胺构成。有机保护膜20在间隙21中形成为包围阻挡层12的周围的平面视图为大致圆环形状，并覆盖接触阻挡层12的侧面12C(参照图2)。
图4A～图4H是表示图1所示半导体装置的制造方法的图解的剖面图。
在制造该半导体装置时，如图4A所示，首先，制作多个半导体芯片1，并制备其整个表面区域被表面保护膜3覆盖的半导体晶片W。而且，在表面保护膜3上形成露出电极焊盘2的焊盘开口9。在该半导体晶片W的状态下，在表面保护膜3上形成应力缓冲层4。
然后，如图4B所示，在应力缓冲层4上形成贯通孔10。
形成贯通孔10之后，如图4C所示，在半导体晶片W上，依次形成阻挡层12、光刻胶16和金属层17。具体地说，首先，在半导体晶片W上的整个区域上，利用溅射法等形成阻挡层12。然后，利用公知的光刻技术，在该阻挡层12上形成光刻胶16，该光刻胶16在应该形成连接焊盘5的突出部14(参照图3)的区域上具有开口部18。形成光刻胶16之后，在半导体晶片W的整个区域上，利用溅射法等形成由用作连接焊盘5的材料的铜构成的金属层17。之后，通过除去光刻胶16，将金属层17的不要部分(连接焊盘5以外的部分)与光刻胶16一起移去。由此，形成连接焊盘5。之后，通过刻蚀除去阻挡层12的不要部分(形成连接焊盘5的部分以外的部分)。
接着，如图4D所示，通过在连接焊盘5的突出部14的整个表面(前端面14A和侧面14B)上粘接焊料，形成覆盖突出部14的整个表面(前端面14A和侧面14B)的大致球状的焊料球6。通过形成焊料球6使得覆盖突出部14的整个表面(前端面14A和侧面14B)，露出阻挡层12的侧面12C。由此，在应力缓冲层4上形成由应力缓冲层4的表面4A、阻挡层12的侧面12C和焊料球6的球面6A包围的间隙21。
然后，如图4E所示，在半导体晶片W上的整个区域上涂敷由用作有机保护膜20(参照图3)的材料的聚酰亚胺构成的有机保护层19。作为有机保护层19，例如可以采用感光性聚酰亚胺(例如正型感光性聚酰亚胺、负型聚酰亚胺)，在本实施方式中，采用正型感光性聚酰亚胺。
涂敷有机保护层19之后，在半导体晶片W上配置光刻胶(图中未示出)，该光刻胶在应该形成有机保护膜20的区域以外的区域上具有开口部。之后，如图4F所示，从该光刻胶上向有机保护层19照射紫外线(紫外线曝光)。
之后，如图4G所示，除去有机保护层19的紫外线曝光过的部分(有机保护膜20以外的部分)。由此，在间隙21中，形成接触并覆盖阻挡层12的侧面12C的有机保护膜20。之后，如图4H所示，沿着在半导体晶片W内的各半导体芯片1之间设定的切割线L，切断(切割)半导体晶片W。由此，获得图1所示结构的半导体装置。
如上所述，在该半导体装置中，在电极焊盘2的从贯通孔10露出的面、贯通孔10的内面以及应力缓冲层4上的贯通孔10的周边部11上，按照覆盖它们的方式，形成阻挡层12。在阻挡层12的、贯通孔10内的内面12A和应力缓冲层4上的外端面12B上，接触形成包括突出部14的连接焊盘5，该突出部14的整个表面(前端面14A和侧面14B)被用于与外部电连接的焊料球6覆盖。之后，阻挡层12的侧面12C的整个周边被有机保护膜20覆盖。
由于由聚酰亚胺构成的应力缓冲层4和由钛、镍、钛钨构成的阻挡层12的密接性低，因此在氧化(腐蚀)该阻挡层12上的连接焊盘5时，容易发生应力缓冲层4和阻挡层12之间的剥离。
像该半导体装置这样，在用有机保护膜20覆盖阻挡层12的侧面12C的整个周边的结构中，由于可以防止阻挡层12和连接焊盘5的接触界面暴露于水分而氧化(腐蚀)连接焊盘5，因此可以防止阻挡层12从应力缓冲层4上剥离。此外，由于连接焊盘5的突出部14的侧面14B被焊料球6覆盖、突出部14的侧面14B没有露出，由此可以防止连接焊盘5的氧化(腐蚀)。因此，可以进一步防止阻挡层12从应力缓冲层4剥离。
结果是，由于可以防止因阻挡层12的剥离伴随而来的焊料球6相对于半导体芯片1的剥离，因此可以实现连接可靠性高的半导体装置。
此外，通过焊料球6与外部的安装基板7上的焊盘8连接，该半导体装置被安装到该安装基板7上。在该安装状态下，即使在焊料球6上发生因半导体芯片1和安装基板7的热膨胀/热收缩导致的应力，在焊料球6与连接焊盘5的突出部14粘接的状态下，由于突出部14向焊料球6的内部突出，因此通过向焊料球6的内部突出的突出部14可以缓和一部分该应力。因此，可以防止焊料球6中发生裂纹。
此外，突出部14的周边部15向应力缓冲层4的贯通孔10的周边部11伸出。由此，在用突出部14缓和应力时，可以使该突出部14经受的应力逃向应力缓冲层4。因此，即使在焊料球6上产生大的应力，也可以通过连接焊盘5和应力缓冲层4很好地缓和该应力，可以防止在半导体芯片1中产生裂纹。
此外，由于连接焊盘5的突出部14形成为圆柱形，其侧面14B上没有角。因此，可以通过突出部14(圆柱)的侧面14B分散吸收在焊料球6上产生的应力。
而且，在本实施方式中，尽管有机保护膜20在间隙21中按照覆盖并接触阻挡层12的侧面12C的方式形成，但如果能防止阻挡层12的露出部分(在本实施方式中为侧面12C)和外部的接触，则有机保护膜20也可以具有其他结构。如图5所示，有机保护膜20例如可以形成为在有机保护膜20和阻挡层12的侧面12C之间形成空间23。
尽管前面说明了本发明的实施方式，但是本发明也可以用其它实施方式来实施。
例如，在上述实施方式中，尽管连接焊盘5采用铜形成，但是只要是具有焊料湿润性的金属即可，不限于铜。例如，连接焊盘5可以采用金来形成。这种情况下，例如，如图6所示，在连接焊盘5的突出部14和焊料球6的界面上，优选形成用于防止金扩散的由镍构成的扩散防止层22。
此外，例如，在上述实施方式中，尽管连接焊盘5的突出部14形成为圆柱状，例如，如图7所示，代替连接焊盘5，还可以形成包括突出部26的金属焊盘29，其中突出部26由在层叠方向配置在应力缓冲层4一侧上的上侧突出部27和在上侧突出部27的下侧被一体地形成的下侧突出部28构成。此外，例如，如图8所示，连接焊盘5还可以形成为半椭圆球状。
此外，在上述实施方式中，关于半导体芯片1中电极焊盘2的配置形态，尽管电极焊盘2沿着半导体芯片1的外周边以平面视图为矩形环状被并列配置成两列，但是如果是在半导体芯片1的功能面1A上被规则配置的形态，则不限于矩形环状，例如，可以配置成矩阵状等。
此外，在上述实施方式中，尽管以WL-CSP的半导体装置为例进行了说明，但除了WL-CSP的半导体装置以外，本发明也能够适用于相对于安装基板、使半导体芯片的表面对置、并以露出半导体芯片的背面的状态安装(裸晶片安装)的半导体装置。
尽管前面已经详细介绍了本发明的实施方式，但是这些只不过是用于使本发明的技术内容清楚的具体例子，本发明不能被限定和解释为这些具体例子，本发明的精神和范围仅仅由所附权利要求书来限定。
本申请对应于2006年12月25日在日本特许厅提出的特许公开2006-348572号，这里引用其全部内容。

Claims (3)

1.一种半导体装置，包括：
半导体芯片；
在所述半导体芯片的表面上形成的电连接用的内部焊盘；
在所述半导体芯片上形成的、具有露出所述内部焊盘的开口部的应力缓冲层；
形成为覆盖所述内部焊盘的从所述开口部露出的面、所述开口部的内面以及所述应力缓冲层上的所述开口部的周边部的凸块基底层；
形成在所述凸块基底层上的、用于与外部电连接的焊料端子；以及
形成在所述应力缓冲层上的、包围所述凸块基底层的周围、覆盖所述凸块基底层的侧面的保护层。
2.根据权利要求1记载的半导体装置，其中，所述应力缓冲层由聚酰亚胺构成，
所述凸块基底层包含：由含有钛或镍的金属构成的阻挡层；以及在该阻挡层上层叠的、由具有焊料湿润性的金属构成的连接焊盘。
3.根据权利要求2记载的半导体装置，其中，所述焊料端子覆盖所述连接焊盘的侧面。
CN2007101611248A 2006-12-25 2007-12-18 半导体装置 Expired - Fee Related CN101211877B (zh)

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