CN101542704B - 半导体装置 - Google Patents
半导体装置 Download PDFInfo
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- CN101542704B CN101542704B CN200780043399XA CN200780043399A CN101542704B CN 101542704 B CN101542704 B CN 101542704B CN 200780043399X A CN200780043399X A CN 200780043399XA CN 200780043399 A CN200780043399 A CN 200780043399A CN 101542704 B CN101542704 B CN 101542704B
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- Prior art keywords
- protuberance
- connection pads
- semiconductor device
- stress relaxation
- relaxation layer
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Abstract
本发明的半导体装置,包括:半导体芯片;形成于所述半导体芯片的表面的电连接用的内部焊盘;表面保护膜,其覆盖所述半导体芯片上的表面,具有使所述内部焊盘露出的焊盘开口;应力缓和层,其形成于所述表面保护膜上,具有使从所述焊盘开口露出的所述内部焊盘露出的开口部;具备埋设部及突出部的连接焊盘,所述埋设部埋设于所述焊盘开口及所述开口部,与所述内部焊盘连接,所述突出部和所述埋设部一体地形成,突出于所述应力缓和层上,具有比所述开口部的开口宽度大的宽度;以及金属球,其以覆盖所述连接焊盘的所述突出部的方式形成,用于与外部的电连接。
Description
技术领域
本发明涉及半导体装置,详细是涉及应用WL-CSP(晶片级芯片尺寸封装:Wafer Level-Chip Size Package)技术的半导体装置。
背景技术
近年来,随着半导体装置的高功能化、多功能化,WL-CSP(晶片级芯片尺寸封装:Wafer Level-Chip Size Package,以下记为“WL-CSP”。)技术的实用化正在发展。在WL-CSP技术中,以晶片状态完成封装工序,并通过切割切出的各个芯片尺寸成为封装尺寸。
应用WL-CSP技术的半导体装置,如图19所示,具备:表面由表面保护膜81覆盖的半导体芯片82、层叠于表面保护膜81上的应力缓和层83、配置在应力缓和层83上的金属球84(例如,焊料球)。在表面保护膜81上形成有用于使半导体芯片82的内部布线的一部分作为电极焊盘85露出的焊盘开口86。在应力缓和层83上形成有用于使从焊盘开口86露出的电极焊盘85露出的贯通孔87。
按照覆盖电极焊盘85的表面、贯通孔87的内面及应力缓和层83的表面的贯通孔87周缘的方式形成有由钛等金属构成的凸起基底层88。而且,金属球84设置在凸起基底层88上,经由凸起基底层88与电极焊盘85电连接。该半导体装置通过金属球84与安装基板89上的焊盘90连接,可实现向安装基板89的安装(相对于安装基板的电及机械性连接)。
专利文献1:(日本)特开平8-340002号公报
在半导体装置安装在安装基板89的状态下,金属球84以被夹在半导体芯片82上的凸起基底层88和安装基板89上的焊盘90之间的状态固着在它们上。因此,当半导体芯片82及安装基板89热膨胀/热收缩时,在金属球84上产生应力,由于该应力而在金属球84与凸起基底层88的接合界面附近可能会发生裂纹。
此外,金属球84与凸起基底层88的关系是只与凸起基底层88的表面接触,其接触面积较小。因此,不能得到金属球84相对凸起基底层88(半导体芯片82)的充分的粘接强度,当在金属球84上产生由于半导体芯片82或安装基板89进行热膨胀/热收缩引起的应力时,由于该应力会使得金属球84可能会从凸起基底层88剥离。
发明内容
本发明的目的在于提供一种能够缓和产生于金属球的应力且能够防止金属球的裂纹发生的半导体装置。
此外,本发明的另一目的在于提供一种能够提高焊料端子相对半导体芯片的粘接强度且能够防止焊料端子剥离的半导体装置。
本发明第一方面提供一种半导体装置,包括:半导体芯片;内部焊盘,其形成于所述半导体芯片的表面,用于电连接;表面保护膜,其覆盖所述半导体芯片上的表面,具有使所述内部焊盘露出的焊盘开口;应力缓和层,其形成于所述表面保护膜上,具有使从所述焊盘开口露出的所述内部焊盘露出的开口部;连接焊盘,其具备埋设部及突出部,所述埋设部埋设于所述焊盘开口及所述开口部,与所述内部焊盘连接,所述突出部与所述埋设部一体形成,突出于所述应力缓和层上,具有比所述开口部的开口宽度大的宽度;以及金属球,其以覆盖所述连接焊盘的所述突出部的方式形成,用于与外部的电连接。
根据该结构,配置在应力缓和层的开口部的连接焊盘一体地具有:埋设于焊盘开口及开口部的埋设部、和突出于应力缓和层上的突出部。而且,用于与外部电连接的金属球以覆盖连接焊盘的突出部的方式形成。
该半导体装置通过金属球与外部的安装基板上的焊盘连接而安装在其安装基板上。在该安装状态下,即使因半导体芯片或安装基板的热膨胀/热收缩而在金属球上产生应力,也能够利用突出于金属球内部的突出部缓和其应力的一部分。因此,能够防止金属球的裂纹的发生。其结果,可以实现连接可靠性高的半导体装置。
此外,当形成为连接焊盘的突出部的宽度比应力缓和层的开口部的开口宽度小、即突出部的宽度比埋设部的宽度小时,在由突出部缓和应力时, 突出部的变形引起的应力会在埋设部和内部焊盘的接合部产生,在半导体芯片上可能会发生裂纹。
与之相对,在上述的结构中,形成为连接焊盘的突出部的宽度比应力缓和层的开口部的开口宽度大。即,突出部从应力缓和层的开口部的周围伸出。由此,在由突出部缓和应力时,能够使其突出部受的应力向应力缓和层转移。因此,即使在金属球上产生大的应力,也能够利用连接焊盘及应力缓和层良好地缓和其应力。其结果,能够防止半导体芯片的裂纹的发生。
此外,在所述半导体装置中,优选为所述连接焊盘的所述突出部为圆柱状。
根据该结构,由于连接焊盘的突出部为圆柱状,因此突出部的侧面没有棱角。因此,可以用突出部(圆柱)的侧面分散并吸收产生于金属球的应力。
此外,优选为所述连接焊盘还具备第二突出部,所述第二突出部与所述突出部一体形成,具有比所述突出部的宽度小的宽度。
根据该结构,在连接焊盘上还具备在突出部上一体形成的第二突出部。由此,连接焊盘的突出于应力缓和层上的部分形成为由突出部和第二突出部构成的两段结构。通过形成为这种两段结构,连接焊盘的突出于应力缓和层上的部分的高度提高第二突出部的量。因此,在金属球中,即使发生达到超过突出部高度的位置的裂纹,也能够由第二突出部阻止该裂纹。其结果,能够抑制裂纹向金属球整体传播而破坏金属球。
此外,第二突出部具有比突出部的宽度小的宽度。因此,即使将与不具有第二突出部的连接焊盘接合的金属球相同体积的金属球、与具有第二突出部的连接焊盘接合,从应力缓和层的表面到金属球的顶部的高度也不会大幅度地增加。其结果,在将半导体装置安装在安装基板上时,能够抑制半导体装置和安装基板的间隔变大,且能够得到上述的效果。
本发明另一方面提供一种半导体装置,包括:半导体芯片;内部焊盘,其形成于所述半导体芯片的表面,用于电连接;表面保护膜,其覆盖所述半导体芯片上的表面,具有使所述内部焊盘露出的焊盘开口;应力缓和层,其形成于所述表面保护膜上,具有使从所述焊盘开口露出的所述内部焊盘 露出的开口部;连接焊盘,其由具有焊料润湿性的金属构成,形成在所述内部焊盘的面对所述焊盘开口及所述开口部的部分上,突出于所述应力缓和层上,且其从所述应力缓和层上突出的部分的表面被粗糙化;以及焊料端子,其以覆盖所述连接焊盘的被粗糙化的表面的方式形成,用于与外部的电连接。
根据该结构,配置于应力缓和层的开口部的连接焊盘由具有焊料润湿性的金属构成,形成为从开口部突出于应力缓和层上的形状。连接焊盘的突出于应力缓和层上的部分的表面被粗糙化而形成微小的凹凸,加大了表面积。而且,以覆盖该被粗糙化的表面的方式形成用于与外部的电连接的焊料端子。
由于连接焊盘的与焊料端子的接触面被粗糙化,因此能够提高其接触面的焊料润湿性。其结果,能够提高焊料端子相对连接焊盘的粘接强度。
此外,由于连接焊盘的与焊料端子的接触面的粗糙化,增大了其接触面的表面积,由此,也能够提高焊料端子相对连接焊盘的粘接强度。
此外,由于通过粗糙化来提高焊料润湿性,因此即使焊料端子的材料即焊料的量少,也能够使少量的焊料充分润湿,以使其覆盖连接焊盘的突出于应力缓和层上的部分。即,即使是少量的焊料,也能够良好地以覆盖其突出部分的方式与连接焊盘粘接。
而且,该半导体装置通过焊料端子与外部的安装基板上的焊盘连接而安装在该安装基板上。在该安装状态下,即使由于半导体芯片或安装基板的热膨胀/热收缩引起的应力产生在焊料端子,焊料端子也能够以充分的粘接强度与连接焊盘粘接,因此不必担心焊料端子自连接焊盘剥离。其结果,能够实现连接可靠性高的半导体装置。
此外,由于连接焊盘的突出于应力缓和层上的部分在焊料端子与连接焊盘粘接的状态下突出于焊料端子的内部,因此,在焊料端子上产生应力的情况下,也能够通过突出于焊料端子的内部的突出部分缓和其应力的一部分。因此,能够防止焊料端子的裂纹的发生,
此外,优选为所述连接焊盘形成为突出于所述应力缓和层上的部分从所述开口部的周围伸出的形状。
根据该结构,连接焊盘的突出于应力缓和层上的部分从应力缓和层的 开口部的周围上伸出。由此,在由该突出部分缓和应力时,能够将该突出部分受的应力向应力缓和层转移。因此,即使在焊料端子上产生大的应力,也能够良好地利用连接焊盘及应力缓和层缓和该应力,也能够防止半导体芯片的裂纹的发生。
此外,优选所述半导体装置包括金属凸沿部,该金属凸沿部由具有焊料润湿性的金属构成,以围绕所述连接焊盘的突出于所述应力缓和层上的部分的周围的方式形成。
根据该结构,以围绕连接焊盘的突出于应力缓和层上的部分的周围的方式形成由具有焊料润湿性的金属构成的金属凸沿部。由此,能够容易使焊料扩展润湿到该突出部分的周围。其结果,能够进一步提高焊料端子的粘接强度。
本发明的上述的及另一目的、特征及效果通过参照附图进行下述的实施方式的说明可以看出。
附图说明
图1是本发明第一实施方式的半导体装置的图解底面图。
图2是在图1所示的A-A剖切面剖切时的剖面图。
图3A是按工序顺序表示图1的半导体装置的制造方法的图解剖面图。
图3B是表示图3A的下一工序的图。
图3C是表示图3B的下一工序的图。
图3D是表示图3C的下一工序的图。
图3E是表示图3D的下一工序的图。
图4是表示在图1所示的半导体装置中,以突出部的宽度(直径)比贯通孔的开口宽度(直径)小的方式形成突出部时的图解剖面图。
图5是表示图1所示的半导体装置变形例的图解剖面图,是将连接焊盘采用另一种结构的图。
图6是本发明第二实施方式半导体装置金属焊盘附近的图解剖面图。
图7是表示在图6所示的半导体装置的金属球上发生裂纹状态的图。
图8是表示图6所示的半导体装置变形例的图解剖面图,是将金属焊盘采用另一种结构的图。
图9是表示图1所示的半导体装置变形例的图解剖面图,是将连接焊盘的突出部采用另一种结构的图。
图10是本发明第三实施方式半导体装置的图解底面图。
图11是在图10所示的B-B剖切面剖切时的剖面图。
图12是放大表示图11所示的半导体装置的连接焊盘和焊料球的连接部分的图解剖面图。
图13A是按工序顺序表示图10的半导体装置制造方法的图解剖面图。
图13B是表示图13A的下一工序的图。
图13C是表示图13B的下一工序的图。
图13D是表示图13C的下一工序的图。
图13E是表示图13D的下一工序的图。
图13F是表示图13E的下一工序的图。
图14是表示图10所示的半导体装置变形例的图解剖面图,是将连接焊盘采用另一种结构的图。
图15是本发明第四实施方式的半导体装置的图解剖面图。
图16A是按工序顺序表示图15的半导体装置制造方法的图解剖面图。
图16B是表示图16A的下一工序的图。
图16C是表示图16B的下一工序的图。
图16D是表示图16C的下一工序的图。
图16E是表示图16D的下一工序的图。
图16F是表示图16E的下一工序的图。
图16G是表示图16F的下一工序的图。
图16H是表示图16G的下一工序的图。
图17是表示图10所示的半导体装置变形例的图解剖面图,是将连接焊盘的突出部采用另一种结构的图。
图18是表示图10所示的半导体装置变形例的图解剖面图,是将连接焊盘采用另一种结构的图。
图19是表示现有半导体装置结构的图解剖面图,是将半导体装置安装在安装基板上的状态的图。
标号说明
1...半导体芯片,2...电极焊盘,3...表面保护膜,4...应力缓和层,5...连接焊盘,6...金属球,9...焊盘开口,10...贯通孔,13...埋设部,14...突出部,24...金属焊盘,25...埋设部,26...突出部,27...上侧突出部,28...下侧突出部,41...半导体芯片,42...电极焊盘,43...表面保护膜,44...应力缓和层,45...接连焊盘,46...焊料球,49...焊盘开口,50...贯通孔,54...突出部,54A...前端面,54B...侧面,60...表面,61...周缘部,64...外周铜膜,66...突出部,67...上侧突出部,67A...下面,67B...侧面,68...下侧突出部,68A...前端面,68B...侧面,69...金属焊盘。
具体实施方式
图1是本发明第一实施方式的半导体装置的图解底面图(表示向安装基板的接合面的图)。图2是用图1所示的A-A剖切面剖切时的剖面图。此外,图2中,通过用剖切线将半导体装置剖切,从而省略其一部分进行表示。
该半导体装置为利用WL-CSP技术制作的半导体装置,其具备:半导体芯片1、覆盖半导体芯片1的功能面1A(在半导体芯片上装入有功能元件的面)的表面保护膜3、形成于表面保护膜3上的应力缓和层4、突出于应力缓和层4上的连接焊盘5、以及与连接焊盘5接合且用于与外部的电连接的金属球6。而且,该半导体装置通过将各金属球6与安装基板7上的焊盘8连接,来实现向安装基板7的安装(相对于安装基板7的电及机械性的连接)。
半导体芯片1为例如平面看大致矩形的硅芯片,在其功能面1A上形成有多个电极焊盘2(内部焊盘)。
电极焊盘2为例如平面看大致矩形的铝焊盘,其与装入半导体芯片1的功能面1A的功能元件电连接。此外,电极焊盘2沿半导体芯片1的外周缘平面看矩形环状地排列配置二列,在彼此相邻的电极焊盘2之间分别隔开适当的间隔(参照图1)。
表面保护膜3由氧化硅或氮化硅构成。在表面保护膜3上形成有用于使各电极焊盘2露出的焊盘开口9。
应力缓和层4由例如聚酰亚胺构成。应力缓和层4以覆盖表面保护层 3的表面整个区域的方式形成,具有吸收并缓和作用于该半导体装置的应力的功能。此外,在应力缓和层4上,在与各电极焊盘2相对的位置贯通形成有贯通孔10(开口部),自焊盘开口9露出的电极焊盘2穿过贯通孔10而面向外部。而且,以覆盖电极焊盘2表面、贯通孔10的内面及应力缓和层4的表面的贯通孔10的周缘部11的方式形成有由例如钛、铬、钛钨等构成的凸起基底层12。
连接焊盘5例如由铜构成。该连接焊盘5具备:埋设于焊盘开口9及贯通孔10的埋设部13、和与该埋设部13一体形成且突出于应力缓和层4上的突出部14。
埋设部13例如形成为圆柱状,经由凸起基底层12与电极焊盘2电连接。
突出部14例如形成为高度10~50μm的圆柱状。此外,突出部14形成为,与半导体芯片1和应力缓和层4的层叠方向(以下简称“层叠方向”。)正交的方向上的宽度(直径)比贯通孔10在同方向上的开口宽度(直径)大(宽度宽)。由此,突出部14的周缘部15在与层叠方向正交的方向上伸出,隔着凸起基底层12与应力缓和层4的表面在层叠方向上相对。
金属球6例如用焊料材料形成为球状,覆盖连接焊盘5的突出部14的整个表面(前端面14A及侧面14B)。由此,金属球6经由凸起基底层12及连接焊盘5与电极焊盘2相对,作为整体,沿半导体芯片1的外周缘平面看大致矩形环状地排列配置二列(参照图1)。
图3A~图3E是表示图1所示的半导体装置制造方法的图解剖面图。
制造该半导体装置时,如图3A所示,首先,准备装入多个半导体芯片1且由表面保护膜3覆盖其表面整个区域的晶片W1。此外,在表面保护膜3上形成有使电极焊盘2露出的焊盘开口9。
在该晶片W1的状态下,在表面保护膜3上形成应力缓和层4。接着,如图3B所示,在应力缓和层4上形成贯通孔10。
形成贯通孔10后,如图3C所示,在晶片W1上依次形成凸起基底层12、光致抗蚀剂16及金属层17。更具体而言,首先,在晶片W1上的整个区域利用溅射法等形成凸起基底层12。然后,利用公知的光刻技术在该凸起基底层12上形成在要形成连接焊盘5的突出部14的区域形成具有开 口部18的光致抗蚀剂16。形成光致抗蚀剂16后,在晶片W1的整个区域,利用溅射法等形成由用作连接焊盘5的材料的铜构成的金属层17。
其后,通过除去光致抗蚀剂16,使金属层17的不需要部分(连接焊盘5以外的部分)与光致抗蚀剂16一同被剥离。由此,形成连接焊盘5。然后,通过蚀刻除去凸起基底层12的不需要部分(形成有连接焊盘5的部分以外的部分)。
接着,如图3D所示,按照覆盖连接焊盘5的突出部14的整个表面(前端面14A及侧面14B)的方式形成金属球6。然后,如图3E所示,沿着设定于晶片W1内的各半导体芯片1之间的切割线L1切断(切割)晶片W1。由此得到图1所示的结构的半导体装置。
如上所述,在该半导体装置中,配置于应力缓和层4的贯通孔10的连接焊盘5一体地具有:埋设于焊盘开口9及贯通孔10的埋设部13、和突出于应力缓和层4上的突出部14。而且,用于与外部电连接的金属球6以覆盖连接焊盘5的突出部14的方式与连接焊盘5接合。
因此,在金属球6与安装基板7上的焊盘8连接的安装状态下,即使因半导体芯片1或安装基板7的热膨胀/热收缩而在金属球6上产生应力,也能够由突出于金属球6内部的突出部14的侧面缓和该应力的一部分。因此,能够防止金属球6的裂纹的发生。其结果,能够实现连接可靠性高的半导体装置。
此外,如图4所示,当连接焊盘5的突出部14的宽度(直径)形成为比应力缓和层4的贯通孔10的开口宽度(直径)小、即突出部14的宽度(直径)比埋设部13的宽度(直径)小时,在由突出部14缓和应力时,突出部14的变形引起的应力会在埋设部13和电极焊盘2的接合部22产生,在半导体芯片1上可能会发生裂纹23。
对此,在该实施方式中,连接焊盘5的突出部14的宽度(直径)形成为比应力缓和层4的贯通孔10的开口宽度(直径)大。即,突出部14的周缘部15在应力缓和层4的贯通孔10的周缘部11伸出。由此,在用突出部14缓和应力时,能够使其突出部14受的应力向应力缓和层4转移。因此,即使在金属球6上产生大的应力,也能够通过连接焊盘5及应力缓和层4良好地缓和其应力。其结果,能够防止半导体芯片1的裂纹的发生。
此外,由于连接焊盘5的突出部14形成为圆柱状,因此其侧面没有棱角。因此,能够由突出部14(圆柱)的侧面分散并吸收产生于金属球6的应力。
此外,在该实施方式中,虽然用铜形成连接焊盘5,但连接焊盘5也可以用金形成。在该情况下,例如图5所示,优选为在连接焊盘5的突出部和金属球6的界面上形成用于防止金扩散的由镍构成的防扩散层19。
图6是本发明第二实施方式的半导体装置的金属焊盘附近的图解剖面图。在该图6中,在对应于图1或图2所示的各部的部分标注与图1或图2的情况相同的参照标号来表示。
在图6所示的结构中,在凸起基底层12上形成有由铜构成的金属焊盘24以代替连接焊盘5。金属焊盘24具备:埋设于焊盘开口9及贯通孔10的埋设部25、和与该埋设部25一体地形成且突出于应力缓和层4的突出部26。
埋设部25例如形成为圆柱状,经由凸起基底层12与电极焊盘2电连接。
突出部26具备:在层叠方向上配置于应力缓和层4一侧(以下以该侧为上侧。)的上侧突出部27、和一体地形成于上侧突出部27下侧的下侧突出部28(第二突出部)。
上侧突出部27例如形成为高度10~50μm的圆柱状。此外,上侧突出部27的与层叠方向正交的方向上的宽度(直径)形成为比贯通孔10的同方向上的开口宽度(直径)大(宽度宽)。由此,上侧突出部27的周缘部29在与层叠方向正交的方向伸出,隔着凸起基底层12与应力缓和层4在层叠方向上相对。
下侧突出部28和上侧突出部27同样,例如形成为高度10~50μm的圆柱状。此外,下侧突出部28的与层叠方向正交的方向上的宽度(直径)形成为比上侧突出部27的同方向上的宽度(直径)小。
根据该图6所示的构成,金属球6也按照覆盖上侧突出部27及下侧突出部28的整个表面(上侧突出部27的下面27A及侧面27B以及下侧突出部28的前端面28A及侧面28B)的方式与金属焊盘24接合。因此,能够实现与图1及图2所示的构成同样的作用效果。
此外,金属焊盘24还具备一体形成于上侧突出部27上的下侧突出部28,由此,金属焊盘24的突出于应力缓和层4上的部分形成为由上侧突出部27和下侧突出部28构成的两段结构。通过形成为这种两段结构,金属焊盘24的突出于应力缓和层4上的部分的高度提高了下侧突出部28的量。因此,例如图7所示,即使在金属球6上发生到达超过上侧突出部27高度的位置的裂纹31,也能够通过下侧突出部28阻止该裂纹31。其结果,能够抑制裂纹31向金属球6整体传播而割裂金属球6。
此外,下侧突出部28的与层叠方向正交的方向上的宽度(直径)形成为比上侧突出部27的同方向上的宽度(直径)小。因此,例如,如图1所示,即使与不具有下侧突出部28的连接焊盘5接合的金属球6相同体积的金属球、如图6所示与具有下侧突出部28的金属焊盘24接合,从应力缓和层4的表面到金属球6顶部的高度也不会大幅度地增加。其结果,在将半导体装置安装在安装基板上时,可以抑制半导体装置和安装基板的间隔变大,且可以得到上述的效果。
此外,在该实施方式中,也与第一实施方式同样,金属焊盘24也可以由金形成。在该情况下,例如图8所示,优选为在金属焊盘24的上侧突出部27及下侧突出部28、和金属球6的界面上形成用于防止金扩散的由镍构成的防扩散层33。
图10是本发明第三实施方式的半导体装置的图解底面图(表示向安装基板的接合面的图)。图11是用图10所示的B-B剖切面剖切时的剖面图。此外,图11中,通过用剖切线将半导体装置剖切,而省略其一部分进行表示。图12是放大表示图11所示的半导体装置的连接焊盘和焊料球的连接部分的图解剖面图。
该半导体装置为利用WL-CSP技术制作的半导体装置,具备:半导体芯片41、覆盖半导体芯片41的功能面41A(在半导体芯片上装入有功能元件的面)的表面保护膜43、形成于表面保护膜43上的应力缓和层44、突出于应力缓和层44上的连接焊盘45、与连接焊盘45粘接且用于与外部的电连接的焊料球46(焊料端子)。而且,该半导体装置通过将各焊料球46与安装基板47上的焊盘48连接,来实现向安装基板47的安装(相对于安装基板47的电及机械性的连接)。
半导体芯片41例如为平面看大致矩形的硅芯片,在其功能面41A上形成有多个电极焊盘42(内部焊盘)。
电极焊盘42例如为平面看大致矩形的铝焊盘,与装入半导体芯片41的功能面41A的功能元件电连接。此外,电极焊盘42沿半导体芯片41的外周缘平面看矩形环状地排列配置二列,在彼此相邻的电极焊盘42之间分别隔开适当的间隔(参照图10)。
表面保护膜43由氧化硅或氮化硅构成。在表面保护膜43上形成有用于使各电极焊盘42露出的焊盘开口49。
应力缓和层44例如由聚酰亚胺构成。应力缓和层44以覆盖表面保护层43的表面整个区域的方式形成,具有吸收并缓和作用于该半导体装置的应力的功能。此外,在应力缓和层44上,在与各电极焊盘42相对的位置贯通形成有贯通孔50(开口部),从焊盘开口49露出的电极焊盘42穿过贯通孔50而面向外部。而且,以覆盖电极焊盘42的表面、贯通孔50的内面及应力缓和层44的表面上的贯通孔50的周缘部51的方式,形成有由例如钛、铬、钛钨等构成的凸起基底层52。
连接焊盘45用具有焊料润湿性的金属、例如铜形成。该连接焊盘45具备:埋设于焊盘开口49及贯通孔50的埋设部53、和与该埋设部53一体地形成且突出于应力缓和层44上的突出部54。
埋设部53例如形成为圆柱状,经由凸起基底层52和电极焊盘42电连接。
突出部54例如形成为高度10~50μm的圆柱状。此外,突出部54形成为:与半导体芯片41和应力缓和层44的层叠方向(以下简称“层叠方向”。)正交的方向上的宽度(直径)比贯通孔50的同方向上的开口宽度(直径)大(宽度宽)。由此,突出部54的周缘部55在与层叠方向正交的方向上伸出,隔着凸起基底层52与应力缓和层44在层叠方向上相对。此外,突出部54如图12所示,通过在其整个表面(前端面54A及侧面54B)形成微小的凹凸而粗糙化。
焊料球46例如用焊料材料形成为大致球状,覆盖已粗糙化的连接焊盘45的突出部54的整个表面(前端面54A及侧面54B)。由此,焊料球46隔着凸起基底层52及连接焊盘45和电极焊盘42相对,作为整体,沿 半导体芯片41的外周缘平面看大致矩形环状地排列配置二列(参照图10)。
图13A~图13F是表示图10所示的半导体装置的制造方法的图解剖面图。
在制造该半导体装置时,如图13A所示,首先,准备装入多个半导体芯片41且由表面保护膜43覆盖其表面整个区域的晶片W2。此外,在表面保护膜43上形成有使电极焊盘42露出的焊盘开口49。在该晶片W2的状态下,在表面保护膜43上形成应力缓和层44。
接着,如图13B所示,在应力缓和层44上形成贯通孔50。
形成贯通孔50后,如图13C所示,在晶片W2上依次形成凸起基底层52、光致抗蚀剂56及金属层57。更具体而言,首先,在晶片W2上的整个区域,利用溅射法等形成凸起基底层52。然后,利用公知的光刻技术,在该凸起基底层52上形成:在应形成连接焊盘45的突出部54的区域具有开口部58的光致抗蚀剂56。形成光致抗蚀剂56后,在晶片W2的整个区域,利用溅射法等形成由用作连接焊盘45的材料的铜构成的金属层57。
其后,通过除去光致抗蚀剂56,金属层57的不需要的部分(连接焊盘45以外的部分)和光致抗蚀剂56一同被剥离。由此,形成连接焊盘45。而且,通过蚀刻除去凸起基底层52的不需要的部分(形成有连接焊盘45的部分以外的部分)。
接着,如图13D所示,在连接焊盘45的突出于应力缓和层44上的突出部54的整个表面(前端面54A及侧面54B),通过例如蚀刻(例如,干刻)等方法形成微小的凹凸,从而形成已粗糙化的前端面54A及侧面54B。
接着,如图13E所示,以覆盖已粗糙化的连接焊盘45的突出部54的整个表面(前端面54A及侧面54B)的方式将焊料球46与连接焊盘45粘接。而且,如图13F所示,沿着设定于晶片W2内的各半导体芯片41间的切割线L2切断(切割)晶片W2。由此,得到图10所示的构成的半导体装置。
如上所述,在该半导体装置中,配置于应力缓和层44的贯通孔50的连接焊盘45具备由具有焊料润湿性的金属(例如铜)构成且自贯通孔50突出于应力缓和层44上的突出部54。突出部54的整个表面(前端面54A 及侧面54B)通过粗糙化而形成微小的凹凸,可使表面积增大。而且,以覆盖该已粗糙化的突出部54的整个表面(前端面54A及侧面54B)的方式形成有焊料球46。
由于连接焊盘45和焊料球46的接触面即突出部54的整个表面(前端面54A及侧面54B)被粗糙化,因此能够提高其表面的焊料润湿性。其结果能够提高焊料球46相对于连接焊盘45的粘接强度。
此外,通过突出部54的整个表面(前端面54A及侧面54B)的粗糙化,加大了其表面的表面积,由此,也能够提高焊料球46相对于连接焊盘45的粘接强度。
此外,由于通过其整个表面(前端面54A及侧面54B)的粗糙化来提高焊料润湿性,因此即使减少焊料球46的材料即焊料的量,也能够使其少量的焊料充分润湿,以使其覆盖突出部54。即,即使是少量的焊料,也能够良好地以覆盖突出部54的方式与连接焊盘45粘接。
而且,该半导体装置中,焊料球46通过与外部的安装基板47上的焊盘48连接而安装在其安装基板47上。在该安装状态下,即使半导体芯片41及安装基板47的热膨胀/热收缩引起的应力在焊料球46上产生,由于焊料球46以充分的粘接强度与焊盘45粘接,因此也不必担心焊料球46从连接焊盘45上剥离。其结果,能够实现连接可靠性高的半导体装置。
此外,在焊料球46与连接焊盘45连接的状态下,突出部54突出于焊料球46的内部,因此,在焊料球46上产生了应力的情况下,能够用突出于焊料球46内部的突出部54的侧面54B缓和其应力的一部分。因此,能够防止焊料球46的裂纹的发生。
此外,突出部54的周缘部55伸出到应力缓和层44的贯通孔50的周缘部51。由此,在通过突出部54缓和应力时,能够将其突出部54受的应力向应力缓和层44转移。因此,即使在焊料球46上产生大的应力,也能够良好地利用连接焊盘45及应力缓和层44缓和其应力,从而能够防止半导体芯片41的裂纹的发生。
此外,由于连接焊盘45的突出部54形成为圆柱状,因此其侧面没有角。因此,可以用突出部54(圆柱)的侧面54B分散并吸收产生于焊料球46的应力。
此外,在该实施方式中,设定为用铜形成连接焊盘45,但连接焊盘45只要是具有焊料润湿性的金属,就不局限于铜。例如,连接焊盘45也可以用金形成。在其情况下,例如图14所示,优选为在连接焊盘45的突出部54和焊料球46的界面上形成用于防止金扩散的由镍构成的防扩散层59。
图15是本发明第四实施方式的半导体装置的图解剖面图。在该图15中,在对应于图10或图11所示的各部的部分标注和图10或图11的情况相同的参照标号进行表示。
在图15所示的构成中,在凸起基底层52上顺序形成有外周铜膜64及连接焊盘45。
外周铜膜64由具有焊料润湿性的金属(例如,铜)构成。此外,外周铜膜64形成为平面看大致圆形,以例如厚度0.1~2μm形成。
连接焊盘45和第一实施方式的半导体装置同样地具备埋设部53和突出部54。
埋设部53例如形成为圆柱状,经由凸起基底层52及外周铜膜64和电极焊盘42电连接。
突出部54例如形成为高度10~50μm的圆柱状。此外,突出部54形成为:与层叠方向正交的方向上的宽度(直径)比外周铜膜64的同方向上的宽度(直径)小。由此,外周铜膜64的周缘部61构成金属凸沿部,该金属凸沿部伸出到突出部54的侧方,围绕突出部54的周围,形成为比突出部54向应力缓和层44上的突出量小的厚度。此外,突出部54通过在其整个表面(前端面54A及侧面54B)形成微小的凹凸而粗糙化。
而且,焊料球46以覆盖已粗糙化的连接焊盘45的突出部54的整个表面(前端面54A及侧面54B)及外周铜膜64的周缘部61的表面61A的方式粘接于连接焊盘45。
图16A~图16H是表示图15所示的半导体装置的制造方法的图解剖面图。
制造图15表示的半导体装置时,如图16A所示,首先,准备装入多个半导体芯片41且由表面保护膜43覆盖其表面整个区域的晶片W3。此外,在表面保护膜43上形成有使电极焊盘42露出的焊盘开口49。在该晶片W3的状态下,在表面保护膜43上形成应力缓和层44。
接着,如图16B所示,在应力缓和层44上形成贯通孔50。
形成贯通孔50后,如图16C所示,在晶片W3上顺序形成凸起基底层52及铜膜65。
接着,如图16D所示,在铜膜65上形成光致抗蚀剂56及金属层57。更具体而言,首先,利用公知的光刻技术,在铜膜65上,在连接焊盘45的要形成突出部54的请于形成具有开口部58的光致抗蚀剂56。形成光致抗蚀剂56后,在晶片W3的整个区域,利用溅射法等,形成由用作连接焊盘45的材料的铜构成的金属层57。
其后,通过除去光致抗蚀剂56,金属层57的不需要的部分(连接焊盘45以外的部分)和光致抗蚀剂56一同被剥离。由此,形成连接焊盘45。
接着,如图16E所示,通过蚀刻除去铜膜65及凸起基底层52的不需要的部分(应形成外周铜膜64的部分以外的部分)。由此,形成由围绕连接焊盘45的突出部54的外周铜膜64的周缘部61构成的金属凸沿部。
而且,如图16F所示,在连接焊盘45的突出于应力缓和层44上的突出部54的整个表面(前端面54A及侧面54B),利用例如蚀刻(例如,干刻)等方法形成微小的凹凸并形成已粗糙化的前端面54A及侧面54B。
接着,如图16G所示,按照覆盖已粗糙化的连接焊盘45的突出部54的整个表面(前端面54A及侧面54B)及外周铜膜64的周缘部61的表面61A的方式将焊料球46与连接焊盘45粘接。然后,如图16H所示,沿着设定于晶片W3内的各半导体芯片41间的切割线L3切割(切割)晶片W3。由此,得到图15表示的构成的半导体装置。
如上所述,根据该图15表示的构成,焊料球46也澳门增加覆盖突出部54的整个表面(前端面54A及侧面54B)的方式与连接焊盘45粘接。因此,能够实现和图10及图11表示的构成同样的作用效果。
此外,在该第四实施方式中,以围绕应力缓和层44上的突出部54的周围的方式形成有由铜构成的外周铜膜64的周缘部61。由此,不仅能够易使焊料扩展润湿于突出部54的前端面54A,而且能够容易使焊料扩展润湿到外周铜膜64的周缘部61的表面61A,其结果,能够进一步提高焊料球46的粘接强度。
以上对本发明的几个实施方式进行了说明。但本发明也可以用其他的方式实施。
例如,在第一实施方式中,设定为连接焊盘5的突出部14形成为圆柱状,但例如图9所示,连接焊盘5也可以形成为半椭圆球状。
此外,在第一及第二实施方式中,关于半导体芯片1的电极焊盘2的配置方式,电极焊盘2沿半导体芯片1的外周缘平面看矩形环状地排列配置二列,但只要是规则地配置在半导体芯片1的功能面1A的方式,则不局限于矩形环状,例如,也可以以矩阵状等配置。
例如,在第三及第四实施方式中,设定为连接焊盘45的突出部54形成为圆柱状,但例如图17所示,连接焊盘45也可以形成为半椭圆球状。在该情况下,只要通过在半椭圆球状的表面60上形成微小的凹凸来粗糙化即可。
此外,例如图18所示,代替连接焊盘45,也可以形成具备突出部66的金属焊盘69,高突出部66由在层叠方向上配置于应力缓和层44侧的上侧突出部67、和一体地形成于上侧突出部67的下侧的下侧突出部68构成。在该情况下,只要通过在上侧突出部67的下面67A及侧面67B、以及下侧突出部68的前端面68A及侧面68B形成微小的凹凸来粗糙化即可。
此外,在第三及第四实施方式中,设定为连接焊盘45和外周铜膜64被分别形成,但两者也可以用同一材料一体地形成。
此外,在第三及第四实施方式中,将与连接焊盘45粘接的焊料端子设定为大致球状的焊料球46,但例如也可以减少使用的焊料的量而将薄板状的焊料端子粘接。
此外,在第三及第四实施方式中,就半导体芯片41的电极焊盘42的配置方式而言,电极焊盘42沿半导体芯片41的外周缘,平面看矩形环状地排列配置二列,但只要是规则地配置在半导体芯片41的功能面41A的方式,不局限于矩形环状,例如,也可以以矩阵状等配置。
对本发明的实施方式进行了详细的说明,但这些只不过是为了阐明本发明的技术内容而使用的具体例,本发明不应限定于这些具体例进行解释,本发明的精神及范围只利用附带的技术方案进行限定。
该申请对应于2006年12月25日在日本国专利厅提出的特愿2006-348571号及2006年12月25日在日本国专利厅提出的特愿2006-348574号,这些申请的全部开示在这里通过引用被编入。
Claims (11)
1.一种半导体装置,其特征在于,包括:
半导体芯片;
内部焊盘,其在所述半导体芯片的表面形成为矩形,用于电连接;
表面保护膜,其覆盖所述半导体芯片上的表面,具有使所述内部焊盘露出的焊盘开口;
应力缓和层,其形成于所述表面保护膜上,具有使从所述焊盘开口露出的所述内部焊盘露出的开口部;
连接焊盘,其具备埋设部及突出部,所述埋设部埋设于所述焊盘开口及所述开口部,与所述内部焊盘连接,所述突出部与所述埋设部一体形成,突出于所述应力缓和层上,具有比所述开口部的开口宽度大的宽度,并且该突出部由微小的凹凸而被粗糙化;以及
金属球,其以覆盖所述连接焊盘的所述突出部的方式形成,用于与外部的电连接。
2.如权利要求1所述的半导体装置,其特征在于,
所述连接焊盘的所述突出部为圆柱状。
3.如权利要求1所述的半导体装置,其特征在于,
所述连接焊盘还具有第二突出部,所述第二突出部在所述突出部上一体形成,并具有比所述突出部的宽度小的宽度。
4.如权利要求1所述的半导体装置,其特征在于,
包括金属凸沿部,其由具有焊料润湿性的金属构成,且以包围所述连接焊盘的突出于所述应力缓和层上的部分的周围的方式形成。
5.如权利要求3所述的半导体装置,其特征在于,
所述突出部及所述第二突出部的全部表面被粗糙化。
6.如权利要求1所述的半导体装置,其特征在于,
所述连接焊盘由金构成,所述金属球使用焊料材料形成,在所述连接焊盘与所述金属球的界面上形成有用于防止金的扩散的防扩散层。
7.如权利要求6所述的半导体装置,其特征在于,
所述防扩散层为镍。
8.如权利要求1所述的半导体装置,其特征在于,
在所述连接焊盘与所述应力缓和层之间具有凸起基底层。
9.如权利要求1所述的半导体装置,其特征在于,
在所述连接焊盘与所述应力缓和层之间具有外周铜膜。
10.如权利要求9所述的半导体装置,其特征在于,
所述外周铜膜的厚度为0.1μm~2μm。
11.如权利要求3所述的半导体装置,其特征在于,
所述第二突出部具有比所述突出部的宽度小且比所述开口部的开口宽度大的宽度。
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JP348571/2006 | 2006-12-25 | ||
JP348574/2006 | 2006-12-25 | ||
PCT/JP2007/074564 WO2008078655A1 (ja) | 2006-12-25 | 2007-12-20 | 半導体装置 |
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CN101542704B true CN101542704B (zh) | 2011-04-20 |
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EP (1) | EP2099065A4 (zh) |
JP (1) | JP5570727B2 (zh) |
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CN (1) | CN101542704B (zh) |
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US8446008B2 (en) | 2013-05-21 |
US20100044863A1 (en) | 2010-02-25 |
EP2099065A1 (en) | 2009-09-09 |
WO2008078655A1 (ja) | 2008-07-03 |
KR20090101435A (ko) | 2009-09-28 |
JP5570727B2 (ja) | 2014-08-13 |
US20130234327A1 (en) | 2013-09-12 |
CN101542704A (zh) | 2009-09-23 |
EP2099065A4 (en) | 2011-02-23 |
JPWO2008078655A1 (ja) | 2010-04-22 |
TW200836314A (en) | 2008-09-01 |
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