WO2008078655A1 - 半導体装置 - Google Patents

半導体装置 Download PDF

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Publication number
WO2008078655A1
WO2008078655A1 PCT/JP2007/074564 JP2007074564W WO2008078655A1 WO 2008078655 A1 WO2008078655 A1 WO 2008078655A1 JP 2007074564 W JP2007074564 W JP 2007074564W WO 2008078655 A1 WO2008078655 A1 WO 2008078655A1
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WO
WIPO (PCT)
Prior art keywords
pad
opening
section
semiconductor chip
internal
Prior art date
Application number
PCT/JP2007/074564
Other languages
English (en)
French (fr)
Inventor
Masaki Kasai
Hiroshi Okumura
Original Assignee
Rohm Co., Ltd.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rohm Co., Ltd. filed Critical Rohm Co., Ltd.
Priority to CN200780043399XA priority Critical patent/CN101542704B/zh
Priority to JP2008551072A priority patent/JP5570727B2/ja
Priority to EP07850989A priority patent/EP2099065A4/en
Priority to US12/311,027 priority patent/US8446008B2/en
Publication of WO2008078655A1 publication Critical patent/WO2008078655A1/ja
Priority to US13/866,049 priority patent/US9018762B2/en

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Wire Bonding (AREA)

Abstract

 本発明の半導体装置は、半導体チップと、前記半導体チップの表面に形成された電気接続用の内部パッドと、前記半導体チップ上の表面を被覆し、前記内部パッドを露出させるパッド開口を有する表面保護膜と、前記表面保護膜上に形成され、前記パッド開口から露出する前記内部パッドを露出させる開口部を有する応力緩和層と、前記パッド開口および前記開口部に埋設され、前記内部パッドに接続される埋設部および、前記埋設部と一体的に形成され、前記応力緩和層上に突出し、前記開口部の開口幅よりも大きい幅を有する突出部を備える接続パッドと、前記接続パッドの前記突出部を覆うように形成され、外部との電気接続のための金属ボールとを含んでいる。
PCT/JP2007/074564 2006-12-25 2007-12-20 半導体装置 WO2008078655A1 (ja)

Priority Applications (5)

Application Number Priority Date Filing Date Title
CN200780043399XA CN101542704B (zh) 2006-12-25 2007-12-20 半导体装置
JP2008551072A JP5570727B2 (ja) 2006-12-25 2007-12-20 半導体装置
EP07850989A EP2099065A4 (en) 2006-12-25 2007-12-20 SEMICONDUCTOR COMPONENT
US12/311,027 US8446008B2 (en) 2006-12-25 2007-12-20 Semiconductor device bonding with stress relief connection pads
US13/866,049 US9018762B2 (en) 2006-12-25 2013-04-19 Semiconductor device bonding with stress relief connection pads

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP2006-348571 2006-12-25
JP2006-348574 2006-12-25
JP2006348571 2006-12-25
JP2006348574 2006-12-25

Related Child Applications (2)

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US12/311,027 A-371-Of-International US8446008B2 (en) 2006-12-25 2007-12-20 Semiconductor device bonding with stress relief connection pads
US13/866,049 Continuation US9018762B2 (en) 2006-12-25 2013-04-19 Semiconductor device bonding with stress relief connection pads

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CN (1) CN101542704B (ja)
TW (1) TW200836314A (ja)
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US9583425B2 (en) * 2012-02-15 2017-02-28 Maxim Integrated Products, Inc. Solder fatigue arrest for wafer level package
US9484291B1 (en) * 2013-05-28 2016-11-01 Amkor Technology Inc. Robust pillar structure for semicondcutor device contacts
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US10665473B2 (en) * 2017-11-08 2020-05-26 Taiwan Semiconductor Manufacturing Co., Ltd. Package structure and method of fabricating the same
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EP2099065A4 (en) 2011-02-23
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KR20090101435A (ko) 2009-09-28
CN101542704B (zh) 2011-04-20
JP5570727B2 (ja) 2014-08-13
US8446008B2 (en) 2013-05-21
US20100044863A1 (en) 2010-02-25
JPWO2008078655A1 (ja) 2010-04-22
US9018762B2 (en) 2015-04-28
CN101542704A (zh) 2009-09-23
TW200836314A (en) 2008-09-01

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