GB0001918D0 - Flip-chip bonding arrangement - Google Patents
Flip-chip bonding arrangementInfo
- Publication number
- GB0001918D0 GB0001918D0 GBGB0001918.2A GB0001918A GB0001918D0 GB 0001918 D0 GB0001918 D0 GB 0001918D0 GB 0001918 A GB0001918 A GB 0001918A GB 0001918 D0 GB0001918 D0 GB 0001918D0
- Authority
- GB
- United Kingdom
- Prior art keywords
- under
- bumps
- bump portions
- flip
- solder
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
Classifications
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- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
- H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
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Abstract
A flip-chip bonding arrangement for use with for example, a GaAs monolithic microwave integrated circuit (MMIC) 42, or an opto-electronic device, has one or more metal under-bump portions 44 attached to a first substrate 40. Corresponding bump portions 52 of an interconnecting metal are attached to the surface of the under bump portions 44 remote from the first substrate. The arrangement is characterised in that the sides of the under-bump portions are non-wettable by the interconnecting metal, and the height of the under-bump portion substantially determines the overall separation between the first and a second substrates when the two are bonded. The under bump portions 44 may be made from nickel or copper, and have a height of at least 10 žm, and of at most 100 žm. A method of providing a flip-chip bonding arrangement uses a seed layer, photoresist, under bumps and bumps formed in openings in the photoresist (Figures 5a-5g). A further method of bonding two substrates uses a plurality of solder bumps and contact means. A thin layer of gold is deposited on the solder bumps. Without the application of a flux, the temperature of the solder-bumps is raised so that a solder connection is made between the bumps and the contact means.
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GBGB0001918.2A GB0001918D0 (en) | 2000-01-27 | 2000-01-27 | Flip-chip bonding arrangement |
PCT/GB2001/000335 WO2001056081A1 (en) | 2000-01-27 | 2001-01-26 | Flip-chip bonding arrangement |
GB0102085A GB2364172A (en) | 2000-01-27 | 2001-01-26 | Flip Chip Bonding Arrangement |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GBGB0001918.2A GB0001918D0 (en) | 2000-01-27 | 2000-01-27 | Flip-chip bonding arrangement |
Publications (1)
Publication Number | Publication Date |
---|---|
GB0001918D0 true GB0001918D0 (en) | 2000-03-22 |
Family
ID=9884479
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GBGB0001918.2A Ceased GB0001918D0 (en) | 2000-01-27 | 2000-01-27 | Flip-chip bonding arrangement |
GB0102085A Withdrawn GB2364172A (en) | 2000-01-27 | 2001-01-26 | Flip Chip Bonding Arrangement |
Family Applications After (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB0102085A Withdrawn GB2364172A (en) | 2000-01-27 | 2001-01-26 | Flip Chip Bonding Arrangement |
Country Status (2)
Country | Link |
---|---|
GB (2) | GB0001918D0 (en) |
WO (1) | WO2001056081A1 (en) |
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6930032B2 (en) * | 2002-05-14 | 2005-08-16 | Freescale Semiconductor, Inc. | Under bump metallurgy structural design for high reliability bumped packages |
US20040007779A1 (en) * | 2002-07-15 | 2004-01-15 | Diane Arbuthnot | Wafer-level method for fine-pitch, high aspect ratio chip interconnect |
US20070273025A1 (en) * | 2002-11-06 | 2007-11-29 | Koninklijke Philips Electronics N.V. | Device Comprising Circuit Elements Connected By Bonding Bump Structure |
EP1536469A1 (en) * | 2003-11-28 | 2005-06-01 | EM Microelectronic-Marin SA | Semiconductor device with connecting bumps |
WO2005093816A1 (en) | 2004-03-05 | 2005-10-06 | Infineon Technologies Ag | Semiconductor device for radio frequency applications and method for making the same |
EP1805799A1 (en) * | 2004-10-20 | 2007-07-11 | Koninklijke Philips Electronics N.V. | Substrate with electric contacts and method of manufacturing the same |
CN102881607B (en) * | 2012-09-27 | 2015-02-18 | 中国科学院长春光学精密机械与物理研究所 | Novel focal plane array electrical interconnection process |
US9806043B2 (en) | 2016-03-03 | 2017-10-31 | Infineon Technologies Ag | Method of manufacturing molded semiconductor packages having an optical inspection feature |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3993515A (en) * | 1975-03-31 | 1976-11-23 | Rca Corporation | Method of forming raised electrical contacts on a semiconductor device |
US4930001A (en) * | 1989-03-23 | 1990-05-29 | Hughes Aircraft Company | Alloy bonded indium bumps and methods of processing same |
US5130779A (en) * | 1990-06-19 | 1992-07-14 | International Business Machines Corporation | Solder mass having conductive encapsulating arrangement |
US5192835A (en) * | 1990-10-09 | 1993-03-09 | Eastman Kodak Company | Bonding of solid state device to terminal board |
US5334804A (en) * | 1992-11-17 | 1994-08-02 | Fujitsu Limited | Wire interconnect structures for connecting an integrated circuit to a substrate |
US5508561A (en) * | 1993-11-15 | 1996-04-16 | Nec Corporation | Apparatus for forming a double-bump structure used for flip-chip mounting |
US5656858A (en) * | 1994-10-19 | 1997-08-12 | Nippondenso Co., Ltd. | Semiconductor device with bump structure |
EP0708481A3 (en) * | 1994-10-20 | 1997-04-02 | Hughes Aircraft Co | Improved flip chip high power monolithic integrated circuit thermal bumps and fabrication method |
US5789271A (en) * | 1996-03-18 | 1998-08-04 | Micron Technology, Inc. | Method for fabricating microbump interconnect for bare semiconductor dice |
US5790377A (en) * | 1996-09-12 | 1998-08-04 | Packard Hughes Interconnect Company | Integral copper column with solder bump flip chip |
-
2000
- 2000-01-27 GB GBGB0001918.2A patent/GB0001918D0/en not_active Ceased
-
2001
- 2001-01-26 WO PCT/GB2001/000335 patent/WO2001056081A1/en active Application Filing
- 2001-01-26 GB GB0102085A patent/GB2364172A/en not_active Withdrawn
Also Published As
Publication number | Publication date |
---|---|
WO2001056081A1 (en) | 2001-08-02 |
GB0102085D0 (en) | 2001-03-14 |
GB2364172A (en) | 2002-01-16 |
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