JP5368008B2 - パッケージ型二端子半導体装置 - Google Patents
パッケージ型二端子半導体装置 Download PDFInfo
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- JP5368008B2 JP5368008B2 JP2008136718A JP2008136718A JP5368008B2 JP 5368008 B2 JP5368008 B2 JP 5368008B2 JP 2008136718 A JP2008136718 A JP 2008136718A JP 2008136718 A JP2008136718 A JP 2008136718A JP 5368008 B2 JP5368008 B2 JP 5368008B2
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- terminal
- chip
- lead
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- lead terminal
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/838—Bonding techniques
- H01L2224/83801—Soldering or alloying
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/84—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
- H01L2224/848—Bonding techniques
- H01L2224/84801—Soldering or alloying
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/84—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01005—Boron [B]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01006—Carbon [C]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
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- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Lead Frames For Integrated Circuits (AREA)
Description
「先端に幅広のチップ接合部を一体的に設けた金属板製の一方のリード端子と,前記一方のリード端子におけるチップ接合部の上面にマウントした半導体チップと,前記半導体チップを挟んで前記一方のリード端子の反対側から延びていて先端に前記半導体チップの上面に重ね接合されるチップ接合部を一体的に備えた金属板製の他方のリード端子と,前記半導体チップ及び両リード端子のチップ接合部をパッケージした熱硬化性合成樹脂製モールド部とからなり,前記両リード端子は前記モールド部の下方に露出した基部を有していて,前記両リード端子の基部の一部が前記モールド部の外側に突出している構成であって,
前記他方のリード端子は,前記基部から上向きに延びる立ち上がり部を有しており,前記立ち上がり部を,前記基部の幅寸法のままで立ち上がってから幅寸法を前記一方のリード端子におけるチップ接合部の幅寸法より小さく縮小させた構成として,前記立ち上がり部のうち幅寸法が縮小した部分を折り曲げることにより,前記他方のリード端子のチップ接合部の幅寸法を前記一方のリード端子のチップ接合部よりも幅狭に形成している」
ことを特徴としている。
また,他方のリード端子2においてチップ接合部2aは半導体チップ3の上に位置しているので,他方のリード端子2は,基部2bから上向きに延びる立ち上がり部2cを有しており,立ち上がり部2cの上端にチップ接合部2aを曲げ形成している。そして,立ち上がり部2cは,図1,2から理解できるように,基部2bの幅寸法W0のままで立ち上がってから途中の高さで幅寸法がW2になるように縮小し,W2の幅寸法のままで曲げることでチップ接合部2aになっている。
また,前記一方のリード端子1では,幅寸法は,チップ接合部1aの高さにおいてW0からW1に広がっている。
1a 一方のリード端子の端子部
1b 一方のリード端子の基部
2 他方のリード端子
2a 他方のリード端子の端子部
2b 他方のリード端子の基部
2c 他方のリード端子の立ち上がり部
3 半導体チップ
4 モールド部
Claims (5)
- 先端に幅広のチップ接合部を一体的に設けた金属板製の一方のリード端子と,前記一方のリード端子におけるチップ接合部の上面にマウントした半導体チップと,前記半導体チップを挟んで前記一方のリード端子の反対側から延びていて先端に前記半導体チップの上面に重ね接合されるチップ接合部を一体的に備えた金属板製の他方のリード端子と,前記半導体チップ及び両リード端子のチップ接合部をパッケージした熱硬化性合成樹脂製モールド部とからなり,前記両リード端子は前記モールド部の下方に露出した基部を有していて,前記両リード端子の基部の一部が前記モールド部の外側に突出している構成であって,
前記他方のリード端子は,前記基部から上向きに延びる立ち上がり部を有しており,前記立ち上がり部を,前記基部の幅寸法のままで立ち上がってから幅寸法を前記一方のリード端子におけるチップ接合部の幅寸法より小さく縮小させた構成として,前記立ち上がり部のうち幅寸法が縮小した部分を折り曲げることにより,前記他方のリード端子のチップ接合部の幅寸法を前記一方のリード端子のチップ接合部よりも幅狭に形成している,
パッケージ型二端子半導体装置。 - 前記一方のリード端子は,前記チップ接合部と同じ高さにおいて幅寸法を変化させている,
請求項1に記載したパッケージ型二端子半導体装置。 - 前記他方のリード端子におけるチップ接合部の幅寸法を,前記一方のリード端子におけるチップ接合部の幅寸法の40〜60バーセントにしている,
請求項1又は2に記載にしたパッケージ型二端子半導体装置。 - 前記他方のリード端におけるチップ接合部の幅寸法を前記半導体チップの幅寸法よりも狭くしている,
請求項1〜3のいずれかに記載したパッケージ型二端子半導体装置。 - 前記両リード端子における基部の幅寸法を同じ幅寸法にしている,
請求項1〜4のいずれかに記載したパッケージ型二端子半導体装置。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2008136718A JP5368008B2 (ja) | 2008-05-26 | 2008-05-26 | パッケージ型二端子半導体装置 |
Applications Claiming Priority (1)
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JP2008136718A JP5368008B2 (ja) | 2008-05-26 | 2008-05-26 | パッケージ型二端子半導体装置 |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
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JP2000043188A Division JP2001237358A (ja) | 2000-02-21 | 2000-02-21 | パッケージ型二端子半導体装置の構造 |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
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JP2012171399A Division JP5653974B2 (ja) | 2012-08-01 | 2012-08-01 | パッケージ型二端子半導体装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2008235935A JP2008235935A (ja) | 2008-10-02 |
JP5368008B2 true JP5368008B2 (ja) | 2013-12-18 |
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Application Number | Title | Priority Date | Filing Date |
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JP2008136718A Expired - Lifetime JP5368008B2 (ja) | 2008-05-26 | 2008-05-26 | パッケージ型二端子半導体装置 |
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JP (1) | JP5368008B2 (ja) |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
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US4935803A (en) * | 1988-09-09 | 1990-06-19 | Motorola, Inc. | Self-centering electrode for power devices |
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