CN102254889A - 一种大功率半导体器件及其封装方法 - Google Patents
一种大功率半导体器件及其封装方法 Download PDFInfo
- Publication number
- CN102254889A CN102254889A CN2011101861184A CN201110186118A CN102254889A CN 102254889 A CN102254889 A CN 102254889A CN 2011101861184 A CN2011101861184 A CN 2011101861184A CN 201110186118 A CN201110186118 A CN 201110186118A CN 102254889 A CN102254889 A CN 102254889A
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- lead frame
- chip
- copper sheet
- pin
- sintering
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L24/36—Structure, shape, material or disposition of the strap connectors prior to the connecting process
- H01L24/37—Structure, shape, material or disposition of the strap connectors prior to the connecting process of an individual strap connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L2224/36—Structure, shape, material or disposition of the strap connectors prior to the connecting process
- H01L2224/37—Structure, shape, material or disposition of the strap connectors prior to the connecting process of an individual strap connector
- H01L2224/37001—Core members of the connector
- H01L2224/37099—Material
- H01L2224/371—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/37138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/37147—Copper [Cu] as principal constituent
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
- H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
- H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
- H01L2224/401—Disposition
- H01L2224/40151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/40221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/40245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/77—Apparatus for connecting with strap connectors
- H01L2224/7725—Means for applying energy, e.g. heating means
- H01L2224/77272—Oven
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/84—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
- H01L2224/8438—Bonding interfaces outside the semiconductor or solid-state body
- H01L2224/84385—Shape, e.g. interlocking features
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/84—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
- H01L2224/848—Bonding techniques
- H01L2224/84801—Soldering or alloying
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
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- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Die Bonding (AREA)
Abstract
Description
Claims (5)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN2011101861184A CN102254889A (zh) | 2011-07-05 | 2011-07-05 | 一种大功率半导体器件及其封装方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN2011101861184A CN102254889A (zh) | 2011-07-05 | 2011-07-05 | 一种大功率半导体器件及其封装方法 |
Publications (1)
Publication Number | Publication Date |
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CN102254889A true CN102254889A (zh) | 2011-11-23 |
Family
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Family Applications (1)
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CN2011101861184A Pending CN102254889A (zh) | 2011-07-05 | 2011-07-05 | 一种大功率半导体器件及其封装方法 |
Country Status (1)
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CN (1) | CN102254889A (zh) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104037148B (zh) * | 2014-05-23 | 2017-02-01 | 南通皋鑫科技开发有限公司 | 一种低废品率轴向二极管引线及其焊接方法 |
CN106783762A (zh) * | 2017-02-22 | 2017-05-31 | 捷捷半导体有限公司 | 一种双芯片垂直并联方式的二极体封装结构和制造方法 |
CN107316843A (zh) * | 2017-06-23 | 2017-11-03 | 青岛佳恩半导体有限公司 | 一种电力电子器件的绝缘结构的制造方法 |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1041065A (zh) * | 1988-09-09 | 1990-04-04 | 莫托罗拉公司 | 功率器件的自对准电报 |
US20040056362A1 (en) * | 2002-09-19 | 2004-03-25 | Kabushiki Kaisha Toshiba | Semiconductor device |
CN101179055A (zh) * | 2007-12-14 | 2008-05-14 | 江苏宏微科技有限公司 | 半导体功率模块及其散热方法 |
US20090194859A1 (en) * | 2008-02-04 | 2009-08-06 | Fairchild Korea Semiconductor, Ltd. | Semiconductor package and methods of fabricating the same |
CN101901789A (zh) * | 2010-06-28 | 2010-12-01 | 启东市捷捷微电子有限公司 | 内绝缘型塑封半导体器件及其制造方法 |
-
2011
- 2011-07-05 CN CN2011101861184A patent/CN102254889A/zh active Pending
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1041065A (zh) * | 1988-09-09 | 1990-04-04 | 莫托罗拉公司 | 功率器件的自对准电报 |
US20040056362A1 (en) * | 2002-09-19 | 2004-03-25 | Kabushiki Kaisha Toshiba | Semiconductor device |
CN101179055A (zh) * | 2007-12-14 | 2008-05-14 | 江苏宏微科技有限公司 | 半导体功率模块及其散热方法 |
US20090194859A1 (en) * | 2008-02-04 | 2009-08-06 | Fairchild Korea Semiconductor, Ltd. | Semiconductor package and methods of fabricating the same |
CN101901789A (zh) * | 2010-06-28 | 2010-12-01 | 启东市捷捷微电子有限公司 | 内绝缘型塑封半导体器件及其制造方法 |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104037148B (zh) * | 2014-05-23 | 2017-02-01 | 南通皋鑫科技开发有限公司 | 一种低废品率轴向二极管引线及其焊接方法 |
CN106783762A (zh) * | 2017-02-22 | 2017-05-31 | 捷捷半导体有限公司 | 一种双芯片垂直并联方式的二极体封装结构和制造方法 |
CN106783762B (zh) * | 2017-02-22 | 2024-01-02 | 捷捷半导体有限公司 | 一种双芯片垂直并联方式的二极体封装结构和制造方法 |
CN107316843A (zh) * | 2017-06-23 | 2017-11-03 | 青岛佳恩半导体有限公司 | 一种电力电子器件的绝缘结构的制造方法 |
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C06 | Publication | ||
PB01 | Publication | ||
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C53 | Correction of patent of invention or patent application | ||
CB02 | Change of applicant information |
Address after: 226200, No. 8, Xinglong Road, Chengbei Industrial Zone, Qidong Economic Development Zone, Jiangsu, Nantong Applicant after: Jiangsu Jiejie Microelectronics Co., Ltd. Address before: 226200, No. 8, Xinglong Road, Chengbei Industrial Zone, Qidong Economic Development Zone, Jiangsu, Nantong Applicant before: Qidong Jiejie Micro-electronic Co., Ltd. |
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COR | Change of bibliographic data |
Free format text: CORRECT: APPLICANT; FROM: QIDONG JIEJIE MICRO-ELECTRONIC CO., LTD. TO: JIANGSU JIEJIE MICROELECTRONICS CO., LTD. |
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C53 | Correction of patent of invention or patent application | ||
CB02 | Change of applicant information |
Address after: 226200, 8, Xinglong Road, Qidong science and Technology Pioneer Park, Jiangsu Applicant after: Jiangsu Jiejie Microelectronics Co., Ltd. Address before: 226200, No. 8, Xinglong Road, Chengbei Industrial Zone, Qidong Economic Development Zone, Jiangsu, Nantong Applicant before: Jiangsu Jiejie Microelectronics Co., Ltd. |
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C02 | Deemed withdrawal of patent application after publication (patent law 2001) | ||
WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20111123 |