TWI584299B - 半導體記憶裝置及其封裝 - Google Patents
半導體記憶裝置及其封裝 Download PDFInfo
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- TWI584299B TWI584299B TW101142114A TW101142114A TWI584299B TW I584299 B TWI584299 B TW I584299B TW 101142114 A TW101142114 A TW 101142114A TW 101142114 A TW101142114 A TW 101142114A TW I584299 B TWI584299 B TW I584299B
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Links
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- 230000015654 memory Effects 0.000 claims description 224
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Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1006—Data managing, e.g. manipulating data before writing or reading out, data bus switches or control circuits therefor
- G11C7/1009—Data masking during input/output
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
- G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
- G11C11/165—Auxiliary circuits
- G11C11/1675—Writing or programming circuits or methods
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/408—Address circuits
- G11C11/4085—Word line control circuits, e.g. word line drivers, - boosters, - pull-up, - pull-down, - precharge
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4096—Input/output [I/O] data management or control circuits, e.g. reading or writing circuits, I/O drivers or bit-line switches
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4097—Bit-line organisation, e.g. bit-line layout, folded bit lines
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/02—Disposition of storage elements, e.g. in the form of a matrix array
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/06—Arrangements for interconnecting storage elements electrically, e.g. by wiring
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1006—Data managing, e.g. manipulating data before writing or reading out, data bus switches or control circuits therefor
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1015—Read-write modes for single port memories, i.e. having either a random port or a serial port
- G11C7/1045—Read-write mode select circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1078—Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
- G11C7/1096—Write circuits, e.g. I/O line write drivers
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/12—Bit line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, equalising circuits, for bit lines
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2211/00—Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C2211/56—Indexing scheme relating to G11C11/56 and sub-groups for features not covered by these groups
- G11C2211/564—Miscellaneous aspects
- G11C2211/5647—Multilevel memory with bit inversion arrangement
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Databases & Information Systems (AREA)
- Dram (AREA)
- Memory System (AREA)
- Semiconductor Memories (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1020120020397A KR20130098681A (ko) | 2012-02-28 | 2012-02-28 | 반도체 메모리 장치 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| TW201335946A TW201335946A (zh) | 2013-09-01 |
| TWI584299B true TWI584299B (zh) | 2017-05-21 |
Family
ID=48950912
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW101142114A TWI584299B (zh) | 2012-02-28 | 2012-11-13 | 半導體記憶裝置及其封裝 |
Country Status (6)
| Country | Link |
|---|---|
| US (4) | US9087592B2 (enExample) |
| JP (2) | JP6073150B2 (enExample) |
| KR (1) | KR20130098681A (enExample) |
| CN (2) | CN107993684B (enExample) |
| DE (1) | DE102013101218A1 (enExample) |
| TW (1) | TWI584299B (enExample) |
Families Citing this family (52)
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| US8750053B2 (en) * | 2011-06-09 | 2014-06-10 | Taiwan Semiconductor Manufacturing Company, Ltd. | SRAM multiplexing apparatus |
| KR20130098681A (ko) | 2012-02-28 | 2013-09-05 | 삼성전자주식회사 | 반도체 메모리 장치 |
| KR20140072276A (ko) * | 2012-11-29 | 2014-06-13 | 삼성전자주식회사 | 불휘발성 메모리 및 불휘발성 메모리의 동작 방법 |
| US9064602B2 (en) * | 2013-10-23 | 2015-06-23 | International Business Machines Corporation | Implementing memory device with sub-bank architecture |
| KR20150050834A (ko) * | 2013-11-01 | 2015-05-11 | 에스케이하이닉스 주식회사 | 반도체 장치 및 이를 포함하는 메모리 시스템 |
| US9411391B2 (en) | 2014-02-07 | 2016-08-09 | Apple Inc. | Multistage low leakage address decoder using multiple power modes |
| KR102169615B1 (ko) * | 2014-04-03 | 2020-10-26 | 에스케이하이닉스 주식회사 | 반도체 메모리 장치 |
| KR20160076889A (ko) * | 2014-12-23 | 2016-07-01 | 에스케이하이닉스 주식회사 | 반도체장치 및 반도체시스템 |
| US10262712B2 (en) | 2015-03-09 | 2019-04-16 | Toshiba Memory Corporation | Memory device with a control circuit to control data reads |
| JP2017123208A (ja) * | 2016-01-06 | 2017-07-13 | ルネサスエレクトロニクス株式会社 | 半導体記憶装置 |
| US10008287B2 (en) | 2016-07-22 | 2018-06-26 | Micron Technology, Inc. | Shared error detection and correction memory |
| US10373657B2 (en) * | 2016-08-10 | 2019-08-06 | Micron Technology, Inc. | Semiconductor layered device with data bus |
| US10580735B2 (en) | 2016-10-07 | 2020-03-03 | Xcelsis Corporation | Stacked IC structure with system level wiring on multiple sides of the IC die |
| US10672744B2 (en) | 2016-10-07 | 2020-06-02 | Xcelsis Corporation | 3D compute circuit with high density Z-axis interconnects |
| US10672745B2 (en) * | 2016-10-07 | 2020-06-02 | Xcelsis Corporation | 3D processor |
| US10593667B2 (en) | 2016-10-07 | 2020-03-17 | Xcelsis Corporation | 3D chip with shielded clock lines |
| US10600780B2 (en) | 2016-10-07 | 2020-03-24 | Xcelsis Corporation | 3D chip sharing data bus circuit |
| US10600735B2 (en) | 2016-10-07 | 2020-03-24 | Xcelsis Corporation | 3D chip sharing data bus |
| US10607136B2 (en) | 2017-08-03 | 2020-03-31 | Xcelsis Corporation | Time borrowing between layers of a three dimensional chip stack |
| US10580757B2 (en) | 2016-10-07 | 2020-03-03 | Xcelsis Corporation | Face-to-face mounted IC dies with orthogonal top interconnect layers |
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| US10672743B2 (en) * | 2016-10-07 | 2020-06-02 | Xcelsis Corporation | 3D Compute circuit with high density z-axis interconnects |
| KR102393946B1 (ko) | 2016-10-07 | 2022-05-03 | 엑셀시스 코포레이션 | 직접-접합된 네이티브 상호접속부 및 능동 베이스 다이 |
| US10586786B2 (en) | 2016-10-07 | 2020-03-10 | Xcelsis Corporation | 3D chip sharing clock interconnect layer |
| US10672663B2 (en) | 2016-10-07 | 2020-06-02 | Xcelsis Corporation | 3D chip sharing power circuit |
| KR102663804B1 (ko) | 2016-11-30 | 2024-05-07 | 에스케이하이닉스 주식회사 | 반도체장치 |
| KR102738401B1 (ko) * | 2016-12-07 | 2024-12-04 | 삼성전자주식회사 | 반도체 소자 |
| KR102406719B1 (ko) * | 2016-12-09 | 2022-06-07 | 삼성전자주식회사 | 반도체 장치 및 그 제조 방법 |
| JP6995377B2 (ja) * | 2017-02-14 | 2022-02-04 | 国立大学法人東北大学 | メモリ装置 |
| US9947419B1 (en) | 2017-03-28 | 2018-04-17 | Qualcomm Incorporated | Apparatus and method for implementing design for testability (DFT) for bitline drivers of memory circuits |
| KR102432849B1 (ko) * | 2017-09-08 | 2022-08-17 | 에스케이하이닉스 주식회사 | 데이터 제어 회로 및 이를 포함하는 반도체 메모리 장치 및 반도체 시스템 |
| JP2019057053A (ja) | 2017-09-20 | 2019-04-11 | 東芝メモリ株式会社 | 半導体記憶装置 |
| KR102441578B1 (ko) * | 2017-10-27 | 2022-09-07 | 삼성전자주식회사 | 다중 데이터 버스 반전 동작을 수행하는 방법 및 메모리 장치 |
| KR102538703B1 (ko) * | 2018-05-02 | 2023-06-01 | 에스케이하이닉스 주식회사 | 모드레지스터제어회로를 포함하는 반도체시스템 |
| US10699763B2 (en) * | 2018-05-18 | 2020-06-30 | Marvell International Ltd. | Merged write driver based on local source line MRAM architecture |
| US10664432B2 (en) | 2018-05-23 | 2020-05-26 | Micron Technology, Inc. | Semiconductor layered device with data bus inversion |
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| JP2020166346A (ja) * | 2019-03-28 | 2020-10-08 | ラピスセミコンダクタ株式会社 | 半導体記憶装置 |
| US10998037B2 (en) * | 2019-05-07 | 2021-05-04 | Memryx Incorporated | Memory processing units and methods of computing dot products |
| KR102634614B1 (ko) * | 2019-07-12 | 2024-02-08 | 에스케이하이닉스 주식회사 | 수직형 메모리 장치 |
| CN110390973B (zh) * | 2019-07-22 | 2021-08-17 | 上海兆芯集成电路有限公司 | 存储器控制器 |
| US11081192B2 (en) * | 2019-10-30 | 2021-08-03 | SanDiskTechnologies LLC | Memory plane structure for ultra-low read latency applications in non-volatile memories |
| US11599299B2 (en) | 2019-11-19 | 2023-03-07 | Invensas Llc | 3D memory circuit |
| JP2021140851A (ja) * | 2020-03-06 | 2021-09-16 | キオクシア株式会社 | 半導体記憶装置 |
| US20200251159A1 (en) | 2020-04-21 | 2020-08-06 | Intel Corporation | Stacked memory device with end to end data bus inversion |
| KR20240043298A (ko) | 2022-09-27 | 2024-04-03 | 삼성전자주식회사 | 글로벌 입출력 라인의 부하에 의한 영향을 감소시킬 수 있는 반도체 메모리 장치 및 이의 동작 방법 |
| KR20240068224A (ko) | 2022-11-10 | 2024-05-17 | 에스케이하이닉스 주식회사 | 데이터 버스 인버전 회로 및 이를 포함하는 반도체 장치 |
| US12154641B2 (en) * | 2022-11-24 | 2024-11-26 | Nanya Technology Corporation | Testing method and testing system |
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| JPH10223000A (ja) * | 1997-02-04 | 1998-08-21 | Mitsubishi Electric Corp | 半導体記憶装置 |
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| KR100481820B1 (ko) * | 2002-09-26 | 2005-04-11 | (주)실리콘세븐 | 패러티로서 비유효한 출력 데이터를 보정하는 에스램 호한메모리와 그 구동방법 |
| KR100546339B1 (ko) * | 2003-07-04 | 2006-01-26 | 삼성전자주식회사 | 차동 데이터 스트로빙 모드와 데이터 반전 스킴을 가지는단일 데이터 스트로빙 모드를 선택적으로 구현할 수 있는반도체 장치 |
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| JP2006004475A (ja) * | 2004-06-15 | 2006-01-05 | Toshiba Corp | 半導体集積回路装置 |
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2012
- 2012-02-28 KR KR1020120020397A patent/KR20130098681A/ko not_active Withdrawn
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2013
- 2013-02-07 DE DE102013101218A patent/DE102013101218A1/de active Pending
- 2013-02-20 JP JP2013030742A patent/JP6073150B2/ja active Active
- 2013-02-25 US US13/775,935 patent/US9087592B2/en active Active
- 2013-02-28 CN CN201711307538.7A patent/CN107993684B/zh active Active
- 2013-02-28 CN CN201310063157.4A patent/CN103295616B/zh active Active
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2015
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2016
- 2016-07-08 US US15/206,106 patent/US9640233B2/en active Active
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2017
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Also Published As
| Publication number | Publication date |
|---|---|
| JP6465846B2 (ja) | 2019-02-06 |
| CN107993684A (zh) | 2018-05-04 |
| US9390780B2 (en) | 2016-07-12 |
| US9640233B2 (en) | 2017-05-02 |
| JP2013178868A (ja) | 2013-09-09 |
| US20130223140A1 (en) | 2013-08-29 |
| TW201335946A (zh) | 2013-09-01 |
| DE102013101218A1 (de) | 2013-08-29 |
| US20170221534A1 (en) | 2017-08-03 |
| US10014037B2 (en) | 2018-07-03 |
| CN103295616B (zh) | 2018-01-02 |
| JP6073150B2 (ja) | 2017-02-01 |
| JP2017016727A (ja) | 2017-01-19 |
| KR20130098681A (ko) | 2013-09-05 |
| US20150318028A1 (en) | 2015-11-05 |
| CN107993684B (zh) | 2021-07-13 |
| US20160322085A1 (en) | 2016-11-03 |
| US9087592B2 (en) | 2015-07-21 |
| CN103295616A (zh) | 2013-09-11 |
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