TWI473245B - 半導體電子零件及使用該半導體電子零件之半導體裝置 - Google Patents

半導體電子零件及使用該半導體電子零件之半導體裝置 Download PDF

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TWI473245B
TWI473245B TW96140526A TW96140526A TWI473245B TW I473245 B TWI473245 B TW I473245B TW 96140526 A TW96140526 A TW 96140526A TW 96140526 A TW96140526 A TW 96140526A TW I473245 B TWI473245 B TW I473245B
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Prior art keywords
semiconductor wafer
semiconductor
electronic component
resin
solder
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TW96140526A
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English (en)
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TW200834878A (en
Inventor
Satoru Katsurayama
Tomoe Yamashiro
Takashi Hirano
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Sumitomo Bakelite Co
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Publication of TW200834878A publication Critical patent/TW200834878A/zh
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Publication of TWI473245B publication Critical patent/TWI473245B/zh

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    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L24/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
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    • C08G59/18—Macromolecules obtained by polymerising compounds containing more than one epoxy group per molecule using curing agents or catalysts which react with the epoxy groups ; e.g. general methods of curing
    • C08G59/40—Macromolecules obtained by polymerising compounds containing more than one epoxy group per molecule using curing agents or catalysts which react with the epoxy groups ; e.g. general methods of curing characterised by the curing agents used
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    • C09J179/04—Polycondensates having nitrogen-containing heterocyclic rings in the main chain; Polyhydrazides; Polyamide acids or similar polyimide precursors
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Description

半導體電子零件及使用該半導體電子零件之半導體裝置
本發明係關於晶片堆疊型的半導體電子零件及使用該半導體電子零件之半導體裝置。詳細而言，本發明係關於能夠對應於半導體積體電路高密度化的要求之半導體電子零件及使用該半導體電子零件之半導體裝置。
近年來，隨著電子機器之高功能化及小型化的要求，半導體積體電路的高密度安裝技術之開發正在進行。做為該安裝技術當中的一種，有以朝下方式於半導體晶片上裝載其他半導體晶片之晶片堆疊(chip－on－chip)型的系統化封裝(SiP：System In Package)。由於此構造可謀求封裝的薄型化，且具有優良的電性連接可靠度，因而受到矚目。
於晶片堆疊型SiP中，半導體晶片間的連接一般係以隔介微細凸塊之覆晶方式進行。此時，為了確保電性連接強度及機械連接強度，而於半導體晶片間注入密封樹脂(底部填充密封)。
然而，於此底部填充密封製程中，有注入於半導體晶片間之密封樹脂滲出，污染下段的半導體晶片表面上所設置之外部電極，而無法進行導線接合之問題。因此，必須將上段的半導體晶片側面與下段的半導體晶片上所設置之外部電極之間的距離，空出大約1.5mm。此外，由於在半導體晶片間注入黏著劑，因此必須將晶片空隙擴大為至少40 μm左右，而阻礙半導體積體電路的高密度安裝。
另一方面，為人所知者有隔介異向性導電膜，一次進行半導體晶片間的電性連接及封裝之方法。例如，於日本特開昭61－276873號公報(專利文獻1)中，係記載有一種包含焊料粒子之黏著膠帶。於同文獻中，係記載有使該黏著膠帶介置於構件間並進行熱壓著，藉此使焊料粒子介置於兩構件間的電性連接部之間，且於其他部分填入樹脂成分之方法。此外，於日本特許第3769688號公報(專利文獻2)中，係記載有一種端子間的連接方法，其係使用包含導電性粒子及於該導電性粒子的熔點下未完全硬化的樹脂成分之導電性黏著劑。
然而，並無法藉由這些方法，於晶片堆疊型SiP中實現半導體積體電路之更進一步的高密度化。
於該狀況下，係期望開發出能夠對應於半導體積體電路更進一步的高密度化要求之晶片堆疊型的半導體電子零件及半導體裝置。
本發明人等係針對上述先前技術的問題點進行精心的探討，結果成功地於黏著膜的熔融時抑制樹脂成分的滲出於最低限度，且能夠一次進行半導體晶片間的電性連接及密封。藉此可獲得能夠對應於更進一步的高密度化要求之晶片堆疊型的半導體電子零件及半導體裝置。
亦即，本發明係為提供下列的半導體電子零件及使用該半導體電子零件之半導體裝置等者。
[1]一種半導體電子零件，係為具備：具有設置有第1內部電極及第1外部電極之電路面的第1半導體晶片、及具有設置有與上述第1內部電極電性連接之第2內部電極之電路面的第2半導體晶片，且上述第1半導體晶片的電路面及上述第2半導體晶片的電路面為對向配設而成之晶片堆疊型的半導體電子零件，該半導體電子零件之特徵為：上述第1半導體晶片與上述第2半導體晶片之間的間隙係填入有絕緣性樹脂；上述第1半導體晶片與上述第2半導體晶片之間的間隔距離為50 μm以下；上述第2半導體晶片側面與上述第1外部電極之間的最短間隔距離為1mm以下。
[2]一種半導體電子零件，係為具備：具有設置有第1內部電極及第1外部電極之電路面的第1半導體晶片、及具有設置有與上述第1內部電極電性連接之第2內部電極之電路面的第2半導體晶片，且上述第1半導體晶片的電路面及上述第2半導體晶片的電路面為對向配設而成之晶片堆疊型的半導體電子零件，其特徵為：於上述第1半導體晶片與上述第2半導體晶片之間的間隙係填入有絕緣性樹脂；上述第1半導體晶片與上述第2半導體晶片之間的間隔距離為25 μm以下；上述第2半導體晶片側面與上述第1外部電極之間的最短間隔距離為1mm以下。
[3]如[1]或[2]所記載之半導體電子零件，其中，鄰接之上述第1內部電極間的最短間隔距離為50 μm以下。
[4]如[1]至[3]中任一項所記載之半導體電子零件，其中，上述第2半導體晶片係配設於上述第1半導體晶片之大致為中央的區域。
[5]如[1]至[4]中任一項所記載之半導體電子零件，其中，上述第1外部電極係設置於上述第1半導體晶片的周緣部。
[6]如[1]至[5]中任一項所記載之半導體電子零件，其中，使設置在上述第1內部電極上及上述第2內部電極上的至少一方之焊料凸塊、及包含助熔化合物之熱硬化性黏著膜介置於上述第1半導體晶片與上述第2半導體晶片之間，並使其熱熔著，藉此將上述第1內部電極與上述第2內部電極予以電性連接，且於上述第1半導體晶片與上述第2半導體晶片之間的間隙，填入上述絕緣性樹脂。
[7]如[6]所記載之半導體電子零件，其中，上述熱硬化性黏著膜係含有膜形成性樹脂10至50重量%、硬化性樹脂30至80重量%、及具有助熔活性之硬化劑1至20重量%。
[8]如[7]所記載之半導體電子零件，其中，上述膜形成性樹脂係從由(甲基)丙烯酸系樹脂、苯氧基樹脂及聚醯亞胺樹脂所組成之群組中選擇之至少1種。
[9]如[7]或[8]所記載之半導體電子零件，其中，上述硬化性樹脂為環氧樹脂。
[10]如[7]至[9]中任一項所記載之半導體電子零件，其中，上述具有助熔活性之硬化劑係從由脂肪族二羧酸及具有羧基與酚羥基之化合物所組成之群組中選擇之至少1種。
[11]如[6]至[10]中任一項所記載之半導體電子零件，其中，關於上述熱硬化性黏著膜，於將直徑500 μm的含錫焊球配置於上述熱硬化性黏著膜上，且於較該含錫焊球的熔點還高30℃的溫度中加熱20秒時，以下列第(I)式所表示之焊料潤濕擴散率為40%以上，焊料潤濕擴散率(%)＝[{(焊球直徑)－(潤濕擴散後的焊料厚度)}/(焊球直徑)]×100 (I)。
[12]如[6]至[11]中任一項所記載之半導體電子零件，其中，上述熱硬化性黏著膜於厚度為100 μm時，223℃之熔融黏度為10Pa．s至200000 Pa．s。
[13]如[1]至[5]中任一項所記載之半導體電子零件，其中，使包含焊料粉及助熔化合物之熱硬化性黏著膜介置於上述第1半導體晶片與上述第2半導體晶片之間並使其進行熱熔著，藉此將上述第1內部電極與上述第2內部電極予以電性連接，且於上述第1半導體晶片與上述第2半導體晶片之間的間隙，填入上述絕緣性樹脂。
[14]如[13]所記載之半導體電子零件，其中，上述熱硬化性黏著膜之焊料粉以外的構成成分係含有膜形成性樹脂10至50重量%、硬化性樹脂30至80重量%及具有助熔活性之硬化劑1至20重量%。
[15]如[13]或[14]所記載之半導體電子零件，其中，上述熱硬化性黏著膜相對於焊料粉以外的構成成分之合計量100重量份，係含有焊料粉30至200重量份。
[16]如[14]或[15]所記載之半導體電子零件，其中，上述膜形成性樹脂係從由(甲基)丙烯酸系樹脂、苯氧基樹脂、及聚醯亞胺樹脂所組成之群組中選擇之至少1種。
[17]如[14]至{16}中任一項所記載之半導體電子零件，其中，上述硬化性樹脂為環氧樹脂。
[18]如[14]至[17]中任一項所記載之半導體電子零件，其中，上述具有助熔活性之硬化劑係從由脂肪族二羧酸及具有羧基與酚類羥基之化合物所組成之群組中選擇之至少1種。
[19]如[13]至[18]中任一項所記載之半導體電子零件，其中，上述熱硬化性黏著膜的硬化溫度T1 及上述焊料粉的熔點T2 係滿足下列第(II)式，T1 ≧T2 ＋20℃ (II)；上述焊料粉的熔點T2 之上述熱硬化性黏著膜的熔融黏度為50Pa．s至5000Pa．s。
[20]如[13]至[19]中任一項所記載之半導體電子零件，其中，上述熱硬化性黏著膜於厚度為100 μm時，138℃之熔融黏度為1Pa．s至10000Pa．s。
[21]如[1]至[20]中任一項所記載之半導體電子零件，該半導體電子零件係於上述第2半導體晶片之與電路面為相反側的面，復配設有半導體晶片而成。
[22]如[1]至[21]中任一項所記載之半導體電子零件，復具備：具有設置有第3內部電極之電路面的第3半導體晶片；其中，上述第3半導體晶片的電路面係配設成相對向於上述第2半導體晶片之與電路面為相反側之面；上述第2半導體晶片與上述第3半導體晶片之間的間隙係填入有絕緣性樹脂；上述第3內部電極係透過於上述第2半導體晶片的厚度方向所設置之通孔而與上述第2內部電極電性連接而成。
[23]一種半導體裝置，其特徵為：安裝有[1]至[22]項中任一項所記載之半導體電子零件而成。
本發明可提供半導體晶片間的間隔距離為50 μm以下、較宜為25 μm以下之半導體電子零件。藉由使用本發明之半導體電子零件，可薄化作為半導體裝置所封裝化之零件全體的總厚度，使封裝化的零件全體達成輕量化。
此外，本發明可提供一種半導體電子零件，其中，上段的半導體晶片側面與下段的半導體晶片上所設置之外部電極之間的最短間隔距離為1mm以下。藉由使用本發明之半導體電子零件，可提高1個封裝內所能夠裝載之半導體晶片的積體密度，此外，亦可使封裝化的零件全體達成小型化。
再者，根據本發明的較佳型態，本發明可提供一種半導體晶片的表面上所設置之內部電極間的最短間隔距離為50 μm以下之半導體電子零件。藉由使用本發明之半導體電子零件，可增加1個封裝內所能夠收納之資訊量。
此外，根據本發明的較佳型態，本發明可提供一種層積多數段之多數個半導體晶片而成之多段堆疊型半導體電子零件。根據本發明的較佳型態，於本發明之多段堆疊型半導體電子零件中，半導體晶片間的間隔距離為50 μm以下，較宜為25 μm以下，上段的半導體晶片側面與下段的半導體晶片上所設置之外部電極之間的最短間隔距離為1mm以下。此外，根據本發明的較佳型態，於本發明之多段堆疊型半導體電子零件中，半導體晶片的表面上所設置之內部電極間的最短間隔距離為50 μm以下。藉由使用本發明之半導體電子零件，可更進一步提高1個封裝內所能夠裝載之半導體晶片的積體密度。
再者，本發明可提供一種半導體裝置，其係於基板上安裝有本發明的半導體電子零件而成。本發明之半導體裝置由於可提高1個封裝內所能夠裝載之半導體晶片的積體密度，因此可對應於電子機器之高功能化及小型化的要求。
以下係參照圖式，說明本發明之較佳實施形態。
1.半導體電子零件
首先，參照第1圖，說明有關本發明之一實施形態的半導體電子零件。
第1圖(a)係顯示本發明的一項實施形態之半導體電子零件之示意俯視圖，第1圖(b)係顯示第1圖(a)之A－A’的示意剖面圖。於第1圖(b)中，本實施形態之半導體電子零件1係構成為，以設置有內部電極21之第2半導體晶片20的電路面(圖中未顯示)相對向於設置有內部電極11之第1半導體晶片10的電路面(圖中未顯示)之方式而配設。如第1圖(b)所示，內部電極11係以對應於內部電極21之方式而形成圖案，且於相對向的內部電極11與內部電極21之間形成有焊料區域100。藉由此焊料區域100，使相對向的內部電極間電性地連接。此外，於半導體晶片10與半導體晶片20之間的間隙，係填入有絕緣性樹脂而形成絕緣性區域101，並藉由此絕緣性區域101，使鄰接的內部電極間電性地絕緣。於半導體晶片10的電路面係設置有用以將半導體晶片10的電路面所形成之圖中未顯示的積體電路連接於由矽等所構成的安裝基板之外部電極12。
半導體晶片10與半導體晶片20之間的間隔距離X為50 μm以下，較宜為25 μm以下，更宜為5 μm以下，尤宜為3 μm以下。於藉由後述之本發明的第1實施形態之製造方法來製造本發明的半導體電子零件時，間隔距離X係受到焊球的大小之影響。例如，於使用50 μm直徑的焊球時，間隔距離X較宜為35至48 μm，更宜為40至45 μm。此外，於藉由後述之本發明的第2實施形態之製造方法而製造本發明的半導體電子零件時，間隔距離X較宜為5 μm以下，更宜為3 μm以下。在此，間隔距離X為半導體晶片10的電路面與半導體晶片20的電路面之間的距離。就確保半導體晶片間的連接強度之觀點來看，間隔距離X較宜為1 μm以上。
此外，半導體晶片20的側面20a與在半導體晶片10的電路面所設置之外部電極12之間的最短間隔距離Y為1mm以下，較宜為0.7mm以下，更宜為0.5mm以下。此外，雖然無特別限制，但為了確保導線接合的空間，最短間隔距離Y一般為0.05mm以上。在此，於「半導體晶片20的側面20a與在半導體晶片10上所設置之外部電極12之間的最短間隔距離Y」中，使用所謂的「最短」之用語的意圖在於，於各半導體晶片20的側面20a與在半導體晶片10的電路面所設置之外部電極12之間的距離並非一定時，表現出最為接近之距離。
再者，經設置多數個於半導體晶片的電路面之鄰接的內部電極間的最短間隔距離Z較宜為50 μm以下，更宜為30 μm以下，尤宜為20 μm以下。就確保電性連接可靠度之觀點來看，較宜為10至30 μm。在此，於「經設置多數個於半導體晶片上之鄰接的內部電極間的最短間隔距離Z」中，使用所謂的「最短」之用語的意圖在於，於鄰接的內部電極間的間隔距離Z並非一定時，表現出最為接近之距離。
此外，雖然無特別限制，但第1半導體晶片10的尺寸較宜為較第2半導體晶片20還大，就提升半導體晶片的積體密度之觀點來看，如第1圖(a)所示，半導體晶片20較宜為配設於半導體晶片10之大致為中央的區域。此外，半導體晶片10上所設置之外部電極12，較宜為設置於半導體晶片10的周緣部。
焊料區域100為焊料成分熔融並固著所形成之區域，藉由此區域導通相對向的內部電極間。焊料區域100所使用之焊料成分並無特別限定，但以例如包含從由錫(Sn)、銀(Ag)、鉍(Bi)、銦(In)、鋅(Zn)及銅(Cu)所組成之群組中選擇至少2種以上之合金為佳。此外，焊料區域100所使用之焊料成分的使用量，只要在可將相對向的內部電極間予以導通之範圍內，使無特別限制。
此外，絕緣性區域101為填入有絕緣性樹脂所形成之區域，藉由此區域，令鄰接的內部電極間電性地絕緣。絕緣性區域101所使用之絕緣性樹脂，就提高電性連接強度及機械連接強度之觀點來看，較宜為硬化性樹脂。絕緣性區域101所使用之絕緣性樹脂的使用量，只要在可將鄰接的內部電極間予以電性絕緣之範圍內，使無特別限制。
關於焊料區域100及絕緣性區域101所使用之材料等，將於後述之製造方法的項目中詳細說明。
此外，雖然無特別限制，但半導體晶片10及半導體晶片20的厚度，較宜為分別為10 μm至1000 μm，更宜為750 μm以下。此外，內部電極、外部電極的大小及材質並無特別限制，只需因應用途而適當選擇。關於本發明中所使用之半導體晶片、內部電極、外部電極等，例如可參照「CSP技術大全(CSP技術)Part 2」(萩本英二著、工業調查會發行)的p.62至72、p.84至88、p.39至60；「SiP技術大全(SiP技術)」(赤澤隆著、工業調查會發行)的p.176至188、p.192至205；日本特開2004－63753號公報的記載等。
於本實施形態中，由於具有上述構成，因此可使封裝化的零件全體達成薄型化及小型化，且能夠使封裝化的零件全體達成輕量化。
此外，於本發明中，亦可於半導體電子零件1再層積其他半導體晶片，而構成多段堆疊型半導體電子零件。第2圖係顯示有關本發明的一實施形態之多段堆疊型半導體電子零件之示意剖面圖。
如第2圖所示，於半導體晶片20之與設有內部電極21之電路面為相反側的面，配設設置有內部電極31之半導體晶片30，而構成多段堆疊型半導體電子零件2。
設置於半導體晶片30的電路面之內部電極31，係藉由焊料區域100透過設置於半導體晶片20的厚度方向之通孔102而與半導體晶片20的電路面導通，而電性連接於半導體晶片20上的內部電極21。在此，通孔102係例如藉由鑽孔加工等而於半導體晶片20的厚度方向形成貫通孔，並於該貫通孔的內壁施以電鍍，且於施以電鍍後的貫通孔內填入樹脂劑而形成。另外，關於通孔，例如可參照日本特開2001－127243號公報、日本特開2002－026241號公報等。另外，於半導體晶片20與半導體晶片30之間的間隙，係填入有絕緣性樹脂而形成絕緣性區域101，藉由此絕緣性區域101，使鄰接的內部電極間電性絕緣。
於本實施形態中，亦可多段地裝載如此之半導體晶片。此外，雖然無特別限制，但半導體晶片20與半導體晶片30之間的間隔距離，較宜為與半導體晶片10與半導體晶片20之間的間隔距離X為相同之範圍。此外，半導體晶片30的側面30a與在半導體晶片10的電路面所設置之外部電極12之間的最短間隔距離，較宜為等同於半導體晶片20的側面20a與在半導體晶片10的電路面所設置之外部電極12之間的最短間隔距離Y之範圍。再者，經設置多數個於半導體晶片30的電路面之鄰接的內部電極間的最短間隔距離，較宜為與經設置多數個。於半導體晶片10至20的電路面之鄰接的內部電極間的最短間隔距離Z為相同之範圍。
2.半導體電子零件的製造方法
接下來參照第3圖及第4圖，說明有關本發明的一實施形態之半導體電子零件的製造方法。第3圖係顯示有關本發明的一實施形態之半導體電子零件的製造方法(第1實施形態)之製程說明圖，第4圖係顯示有關本發明其他實施形態之半導體電子零件的製造方法(第2實施形態)之製程說明圖。
(1)第1實施形態首先參照第3圖，說明有關本發明的第1實施形態之半導體電子零件的製造方法。
如第3圖(a)所示，首先準備於電路面設置有內部電極11之半導體晶片10以及於電路面設置有內部電極21之半導體晶片20。為了形成良好的電性連接，可於內部電極11及內部電極21的表面，預先施以洗淨、研磨、電鍍及表面活化等處理。例如，如第3圖(a)所示，於內部電極11及內部電極21的表面，使用Ti、Ti/Cu、Cu、Ni、Cr/Ni等而形成UBM(Under Barrier Metal：底層阻障金屬)層103、104。UBM層可為單層亦可為多數層。此外，就保護半導體元件之目的下，亦可預先於半導體晶片10及半導體晶片20的表面施以表面安定化處理，例如可形成SiN膜等之鈍化膜113。此外，雖然圖中未顯示，但亦可形成聚醯亞胺膜、聚苯并唑膜、苯環丁烯膜等有機樹脂保護膜，作為將殘留於焊料凸塊與UBM層之間的接合部及內部電極之應力予以緩和之層。
接著如第3圖(b)所示，於內部電極11及21之至少一方形成焊料凸塊105。焊料凸塊105可藉由電鍍法所形成，亦可藉由焊料膏印刷法而形成。另外，於第3圖(a)中，焊料凸塊105係形成於內部電極21上，但亦可僅形成於內部電極11上，或是形成於內部電極11及21兩者。焊料凸塊105亦可於形成後施以回焊處理。
構成焊料凸塊105之焊料成分，較宜為包含從由錫(Sn)、銀(Ag)、鉍(Bi)、銦(In)、鋅(Zn)及銅(Cu)所組成之群組中選擇至少2種以上之合金。其中，就考量到熔融溫度及機械物性時，較宜為Sn－Bi合金、Sn－Ag－Cu合金、Sn－In合金等之含Sn合金。就充分確保熱硬化性黏著膜中之樹脂成分的流動性之觀點來看，焊料凸塊的熔點一般為100℃以上，較宜為130℃以上。此外，為了防止黏著時安裝基板或半導體晶片上所設置之元件的熱劣化，焊料凸塊的熔融溫度一般為250℃以下，較宜為230℃以下。此外，關於焊料凸塊的熔點，係例如使用DSC，於升溫速度10℃/分下測定出構成焊料凸塊之焊料粉單體時之吸熱峰值溫度。
關於焊料凸塊105的大小，就充分確保電性連接可靠度之觀點來看，直徑較宜為5至500 μm，更宜為10至300 μm，尤宜為20至200 μm。
接著如第3圖(c)所示，使包含助熔化合物之熱硬化性黏著膜106介置於半導體晶片10與半導體晶片20之間，緩慢加熱至熱硬化性黏著膜106尚未結束硬化且焊料凸塊105產生熔融之溫度為止。藉由此加熱，構成焊料凸塊105之焊料成分產生熔融，且熔融後的焊料成分凝聚於內部電極表面。之後，內部電極表面與焊料成分接合而形成焊料區域100，而電性連接相對向的內部電極間。
焊料凸塊的熔點之熱硬化性黏著膜的熔融黏度，於熱硬化性黏著膜的厚度為100 μm的情形，較宜為50Pa．s至5000Pa．s，更宜為100Pa．s至4000 Pa．s。若焊料凸塊的熔點之熱硬化性黏著膜的熔融黏度位於上述範圍，則可抑制焊料成分從內部電極間擴散，此外亦可抑制樹脂成分的滲出。為了防止半導體電子零件的熱劣化，熱硬化性黏著膜的硬化溫度較宜為未滿250℃。關於熱硬化性黏著膜的熔融黏度，可使用黏著膜的厚度為100 μm之樣本，使用動態黏彈性測定裝置，於頻率數0.1Hz、於升溫速度10℃/分下進行測量。
於加熱溫度到達焊料凸塊的熔點之時點，亦可加壓半導體晶片10與半導體晶片20，使相對向的內部電極間之距離接近。
如此，藉由加熱所熔融之焊料成分凝聚於相對向的內部電極間而固著，形成如第3圖(c)所示之焊料區域100，並藉此使對向的內部電極間電性地連接。另一方面，熱硬化性黏著膜106中所含之樹脂成分，係填入於半導體晶片10與半導體晶片20之間的間隙而形成絕緣性區域101，藉由此絕緣性區域101，使鄰接的內部電極間電性絕緣。
接著使熱硬化性黏著膜106的樹脂成分完全硬化，以確保電性連接強度及機械連接強度。於本實施形態中，可將相對向的內部電極間予以電性連接，且以絕緣性樹脂將半導體晶片10與半導體晶片20之間的間隙予以密封。
(a)助熔化合物在此，熱硬化性黏著膜106係包含助熔化合物。助熔化合物係為可使樹脂成分有效率地於內部電極與焊料凸塊之間的界面移動，並去除焊料凸塊105表面的氧化膜且提高焊料凸塊的潤濕性之化合物。藉此，可降低相對向的內部電極間之連接電阻值。藉由使用此助熔化合物，可省略助熔洗淨製程而簡化製程。
助熔化合物例如有包含酚類羥基、羧基之化合物等。含酚類羥基之化合物，例如有酚類、鄰甲酚、2,6－二甲苯酚、對甲酚、間甲酚、鄰乙酚、2,4－二甲苯酚、2,5－二甲苯酚、間乙酚、2,3－二甲苯酚、2,4,6－三甲苯酚(mesitol)、3,5－二甲苯酚、對三級丁酚、兒茶酚、對三級戊酚、間苯二酚、對辛酚、對苯酚、雙酚F、雙酚F、雙酚AF、二酚、二芳香基雙酚F、二芳香基雙酚A、參酚、肆酚等之含酚類羥基之單體類；酚酚醛樹脂、鄰甲酚酚醛樹脂、雙酚F酚醛樹脂、雙酚A酚醛樹脂等。
此外，就含羧基之化合物而言，例如有脂肪族酐、脂環式酐、芳香族酐、脂肪族羧酸、芳香族羧酸、酚類等。
在此，就脂肪族酐而言，例如有琥珀酐、聚己二酐、聚壬二酐、聚癸二酐等。
就脂環式酐而言，例如有甲基四氫基苯二甲酐、甲基六氫基苯二甲酐、甲基降冰片烯二酐、六氫基苯二甲酐、四氫基苯二甲酐、三烷基四氫基苯二甲酐、甲基環己烯二羧酐等。
就芳香族酐而言，例如有苯二甲酐偏苯三甲酐、苯均四二酐、二苯酮四羧二酐、乙二醇雙偏苯三甲酸酯、甘油參偏苯三甲酸酯等。
就脂肪族羧酸而言，例如有甲酸、醋酸、丙酸、丁酸、戊酸、三甲基乙酸己酸、辛酸、月桂酸、肉豆蔻酸、棕櫚酸、硬脂酸、丙烯酸、甲基丙烯酸、巴豆酸、油酸、反丁烯二酸、順丁烯二酸、草酸、丙二酸、琥珀酸、戊二酸、己二酸、癸二酸、十二烷二酮酸、庚二酸等。其中，較宜為以HOOC－(CH2 )n －COOH(n為0至20的整數)所表示之脂肪族羧酸，例如為己二酸、癸二脂酸、十二烷二酮酸。
就芳香族羧酸而言，例如有苯甲酸、鄰苯二甲酸、異苯二甲酸、對苯二甲酸、半蜜臘酸、偏苯三甲酸、1,3,5－苯三甲酸、1,2,3,5－苯四甲酸、1,2,3,4－苯四甲酸、苯均四酸、苯六甲酸、甲苯甲酸、二苯甲酸、3,4－二甲苯甲酸、均三甲苯酸、2,3,4－三甲苯甲酸、甲苯甲酸、肉桂酸、水楊酸、2,3－二羥基苯甲酸、2,4－二羥基苯甲酸、龍膽酸(2,5－二羥基苯甲酸)、2,6－二羥基苯甲酸、3,5－二羥基苯甲酸、浸食子酸(3,4,5－三羥基苯甲酸)、4－二羥基－2－萘甲酸、3,5－二羥基－2－萘甲酸、3,5－2－二羥基－2－萘甲酸等之萘甲酸衍生物；酚酞啉；二酚酸等。
其中，較宜為具有熱硬化性黏著膜的樹脂成分之硬化劑的功能者。亦即，本實施形態中所使用之助熔化合物，較宜為具有能夠將焊料凸塊表面的氧化膜還原至可與導電構件電性連接之程度的作用，且為具有與樹脂成分鍵結之官能基之化合物(具有助熔活性之硬化劑)。具有助熔活性之硬化劑，於熱硬化性黏著膜的熔融時，將焊料凸塊表面的氧化膜還原，提高構成焊料凸塊之焊料成分的潤濕性，促進焊料成分往半導體晶片之相對向的內部電極間凝聚，而容易形成焊料區域。另一方面，於半導體晶片間形成電性連接後，可作為硬化劑發揮功能，且附加於樹脂而提高樹脂的彈性率或Tg。藉由使用上述具有助熔活性之硬化劑，不需進行助熔洗淨，而能夠抑制起因於助熔成分殘渣之離子遷移的產生。
本發明中所使用之具有助熔活性之硬化劑，較宜為至少具有1個羧基。與具有助熔活性之硬化劑中所包含的樹脂成分結合之官能基，可因應所使用之硬化性樹脂的種類等而適當選擇。例如，於樹脂成分中包含環氧樹脂時，具有助熔活性之硬化劑，可具有羧基，以及與環氧基反應之基(羧基、羥基、胺基等)。
具體而言，本發明中所使用之具有助熔活性之硬化劑，較宜為從由脂肪族二羧酸及具有羧基與酚類羥基之化合物所組成之群組中所選擇之至少1種。
本發明中所使用之脂肪族二羧酸，只要為於脂肪族烴中鍵結有2個羧基之化合物者，則無特別限制。脂肪族烴基可為飽和或不飽和的非環式，亦可為飽和或不飽和的環式。於脂肪族烴基為非環式時，可為直鏈狀或分枝狀。
就上述脂肪族二羧酸而言，例如有以下列第(1)式所表示之化合物。
HOOC－(CH2 )n －COOH (1)
式中，n為1至20的整數，較宜為3至10的整數。若位於此範圍，則於黏著時的逸氣及熱硬化性黏著膜於硬化後的彈性率及玻璃轉移溫度之間的均衡性為良好。尤其若將n設定為3以上，則可抑制熱硬化性黏著膜於硬化後之彈性率的增加，並提高與被黏著物之間的黏著性。此外，藉由將n設定為10以下，可抑制彈性率的降低並更為提高連接可靠度。
就上述以第(1)式所表示之化合物的具體例而言，例如有戊二酸、己二酸、庚二酸、辛二酸、壬二酸、癸二酸、十一烷二酸、十二烷二酸、十三烷二酸、十四烷二酸、十五烷二酸、十八烷二酸、十九烷二酸、二十烷二酸等。其中，較宜為己二酸、辛二酸、癸二酸、十二烷二酸，更宜為癸二酸。
就具有羧基與酚類羥基之化合物而言，可舉出例如有水楊酸、2,3－二羥基苯甲酸、2,4－二羥基苯甲酸、龍膽酸(2,5－二羥基苯甲酸)、2,6－二羥基苯甲酸、3,4－二羥基苯甲酸、浸食子酸(3,4,5－三羥基苯甲酸)等之苯甲酸衍生物；1,4－二羥基－2－萘甲酸、3,5－二羥基－2－萘甲酸等之萘甲酸衍生物；酚酞；二酚酸等。其中，較宜為酚酞、龍膽酸、2,4－二羥基苯甲酸、2,6－二羥基苯甲酸，更宜為酚酞、龍膽酸、或這些的組合。
此外，由於這些化合物均容易吸濕而成為造成空隙之原因，因此於使用時，較宜為預先進行乾燥。
於本發明中，具有助熔活性之硬化劑可使用1種或是兼用2種以上。
助熔化合物的含有量，相對於熱硬化性黏著膜之構成成分的合計量，較宜為0.1至30重量%，更宜為1至20重量%，尤宜為3至18重量%，特宜為5至15重量%。若位於此範圍，則可充分將焊料凸塊表面的氧化膜還原至能夠電性接合之程度，且於樹脂成分的硬化時可有效率地附加於樹脂中，而提高樹脂的彈性率或Tg。此外，亦可抑制起因於未反應的助熔化合物之離子遷移的產生。
(b)樹脂成分此外，本發明中所使用之熱硬化性黏著膜，除了助熔化合物之外，亦包含樹脂成分。所使用之樹脂成分，就可獲得期望的成膜性及熔融黏度之觀點來看，較宜為包含熱硬化性樹脂及熱可塑性樹脂。
就熱硬化性樹脂而言，可舉出環氧樹脂、氧環丁烷樹脂、酚樹脂、(甲基)丙烯酸酯樹脂、不飽和聚酯樹脂、鄰苯二甲酸二烯丙酯樹脂、順丁烯二醯亞胺樹脂等。其中，就具有良好的硬化性及保存性，且硬化物具有較佳的耐熱性、耐濕性、耐藥性之觀點來看，較宜使用環氧樹脂。
就熱可塑性樹脂而言，可舉出苯氧樹脂、聚酯樹脂、聚胺甲酸酯樹脂、聚醯亞胺樹脂、矽氧烷變性聚醯亞胺樹脂、聚丁二烯樹脂、聚丙烯、苯乙烯－丁烯－苯乙烯共聚物、聚縮醛樹脂、聚乙烯縮丁醛樹脂、聚乙烯縮醛樹脂、丁基橡膠、氯丁二烯橡膠、聚醯胺樹脂、丙烯腈－丁二烯共聚物、丙烯腈－丁二烯－丙烯酸共聚物、丙烯腈－丁二烯－苯乙烯共聚物、聚醋酸乙烯酯、尼龍、(甲基)丙烯酸系樹脂(包含丙烯酸橡膠)等。於提升黏著性或與其他樹脂的相溶性之目的，較宜為使用具有腈基、環氧基、羥基、羧基之樹脂，更宜為使用(甲基)丙烯酸系樹脂。
例如，於使用環氧樹脂作為熱硬化性樹脂時，環氧樹脂的調配比相對於熱硬化性黏著膜之構成成分的合計量，較宜為20至80重量%。此外，於使用(甲基)丙烯酸系樹脂作為熱可塑性樹脂時，(甲基)丙烯酸系樹脂相對於熱硬化性黏著膜之構成成分的合計量，較宜為10至50重量%。
更具體而言，本發明中所使用之熱硬化性黏著膜，就樹脂成分而言較宜為包含熱硬化性樹脂及熱可塑性樹脂。
(膜形成性樹脂)本發明中所使用之膜形成性樹脂，只要為可溶於有機溶劑，且具有單獨製膜性者，則並無特別限定。膜形成性樹脂可使用熱硬化性樹脂及熱可塑性樹脂的任一種，亦可兼用兩者。
就膜形成性樹脂而言，例如有(甲基)丙烯酸系樹脂、苯氧樹脂、聚酯樹脂、聚胺甲酸酯樹脂、聚醯亞胺樹脂、矽氧烷變性聚醯亞胺樹脂、聚丁二烯樹脂、聚丙烯、苯乙烯－丁烯－苯乙烯共聚物、苯乙烯－乙烯－丁烯－苯乙烯共聚物、聚縮醛樹脂、聚乙烯縮丁醛樹脂、聚乙烯縮醛樹脂、丁基橡膠、氯丁二烯橡膠、聚醯胺樹脂、丙烯腈－丁二烯共聚物、丙烯腈－丁二烯－丙烯酸共聚物、丙烯腈－丁二烯－苯乙烯共聚物、聚醋酸乙烯酯、尼龍等。這些樹脂可使用1種或是兼用2種以上。其中，較宜為從由(甲基)丙烯酸系樹脂、苯氧樹脂、及聚醯亞胺樹脂所組成之群組中所選出之至少1種。
於本說明書中，所謂的(甲基)丙烯酸系樹脂，係意味著(甲基)丙烯酸及該衍生物的聚合物，或是(甲基)丙烯酸及該衍生物與其他單體之共聚物。在此，於記載為(甲基)丙烯酸等時，係意味著丙烯酸或甲基丙烯酸。
就(甲基)丙烯酸系樹脂的具體例而言，例如有聚丙烯酸、聚甲基丙烯酸、聚丙烯酸甲酯、聚丙烯酸乙酯、聚丙烯酸丁酯、聚丙烯酸－2－乙基己酯等之聚丙烯酸酯；聚甲基丙烯酸甲酯、聚甲基丙烯酸乙酯、聚甲基丙烯酸丁酯等之聚甲基丙烯酸酯；聚丙烯腈、聚甲基丙烯腈、聚丙烯醯胺、丙烯酸丁酯－丙烯酸乙酯－丙烯腈共聚物、丙烯腈－丁二烯共聚物、丙烯腈－丁二烯－丙烯酸共聚物、丙烯腈－丁二烯－苯乙烯共聚物、丙烯腈－苯乙烯共聚物、甲基丙烯酸甲酯－苯乙烯共聚物、甲基丙烯酸甲酯－丙烯腈共聚物、甲基丙烯酸甲酯－α－甲基苯乙烯共聚物、丙烯酸丁酯－丙烯酸乙酯－丙烯腈－2－甲基丙烯酸羥乙酯－甲基丙烯酸共聚物、丙烯酸丁酯－丙烯酸乙酯－丙烯腈－2－甲基丙烯酸羥乙酯－丙烯酸共聚物、丙烯酸丁酯－丙烯腈－2－甲基丙烯酸羥乙酯共聚物、丙烯酸丁酯－丙烯腈－丙烯酸共聚物、丙烯酸丁酯－丙烯酸乙酯－丙烯腈共聚物、丙烯酸乙酯－丙烯腈－N,N－二甲基丙烯醯胺共聚物等。其中，較宜為丙烯酸丁酯－丙烯酸乙酯－丙烯腈共聚物、丙烯酸乙酯－丙烯腈－N,N－二甲基丙烯醯胺。
藉由使用將具有腈基、環氧基、羥基、羧基等的官能基之單體予以共聚合而成之(甲基)丙烯酸系樹脂，可提升對被覆物之密著性及與其他樹脂成分之相溶性。於如此之(甲基)丙烯酸系樹脂中，具有上述官能基之單體的使用量並無特別限定，但相對於(甲基)丙烯酸系樹脂的全重量，較宜為0.1至50mol%，更宜為0.5至45mol%，尤宜為1至40mol%。若調配量未滿上述下限值，則有密著性的提升效果降低的情形，若超過上述上限值，則有黏著力過強而使操作性的提升效果降低的情形。
上述(甲基)丙烯酸系樹脂的重量平均分子量並無特別限定，較宜為10萬以上，更宜為15萬至100萬，尤宜為25萬至90萬。若重量平均分子量位於此範圍，則可提升製膜性。
於使用苯氧樹脂作為膜形成性樹脂時，該數量平均分子量較宜為5000至15000，更宜為6000至14000，尤宜為8000至12000。藉由使用此苯氧樹脂，可抑制硬化前之熱硬化性黏著膜的流動性，且使熱硬化性黏著膜的層間厚度達到均一化。苯氧樹脂的骨幹，例如有雙酚A形式、雙酚F形式、聯苯架構形式等，但並不限定於此。其中，由於飽和吸水率為1%以下的苯氧樹脂於黏著時或焊料安裝時的高溫下可抑制發泡或剝離等的產生，因而較佳。飽和吸水率可藉由下列方式算出，亦即，將苯氧樹脂加工為25 μm厚的膜，於100℃環境中進行1小時的乾燥(極乾狀態)，之後將此膜放置於40℃、90%RH環境的恆溫高濕層，每隔24小時測定重量變化，並使用重量變化達到飽和的時點之重量，以下列式子算出。
飽和吸水率(%)＝{(達到飽和的時點之重量)－(極乾時點之重量)}/(極乾時點之重量)×100
本發明中所使用之聚醯亞胺樹脂，只要為於重覆單位中具有醯亞胺鍵結之樹脂，則並無特別限定。例如有使二胺與二酐進行反應，且加熱所獲得的聚醯胺酸以進行脫水閉環而藉此獲得者。二胺例如有芳香族二胺之3,3’－二甲基－4,4’－二胺二苯基、4,6－二甲基－m－伸苯基二胺、2,5－二甲基－p－伸苯基二胺；矽氧烷二胺之1,3－雙(3－胺基丙基)－1,1,3,3－四甲基二矽氧烷等，可單獨使用或混合2種以上。此外，二酐例如有3,3,4,4’－聯苯四羧酸、苯均四酸二酐、4,4’－氧基二苯二甲酸二酐等，可單獨使用或混合2種以上。聚醯亞胺樹脂可使用能夠溶解或無法溶解於溶劑者，但使用能夠溶解於溶劑者，於與其他成分混合時容易形成漆液而容易進行處置。尤其是矽氧烷變性聚醯亞胺樹脂由於可溶解於各種有機溶劑中因而較適合使用。
膜形成性樹脂可使用市售品，亦可在不損及本發明的效果之範圍內，調配各種可塑劑、安定劑、無機填充材、帶電防止劑或顏料等添加劑。
膜形成性樹脂的調配量，對於熱硬化性黏著膜之構成成分的合計量，較宜為10至50重量%，更宜為15至40重量%，尤宜為20至35重量%。若位於此範圍，則可抑制熱硬化性黏著膜於熔融前之樹脂成分的流動性，而容易進行熱硬化性黏著膜的處置。
(硬化性樹脂)本發明中所使用之硬化性樹脂，一般只要可做為半導體用的黏著成分使用者，則無特別限定。硬化性樹脂例如有環氧樹脂、氧環丁烷樹脂、酚樹脂、(甲基)丙烯酸酯樹脂、不飽和聚酯樹脂、鄰苯二甲酸二烯丙酯樹脂、順丁烯二醯亞胺樹脂等。其中，較宜使用硬化性及保存性，以及硬化物的耐熱性、耐濕性、耐藥性優良之環氧樹脂。
環氧樹脂可使用於室溫下為固形之環氧樹脂，以及於室溫下為液形之環氧樹脂的任一種。此外，樹脂亦可兼用於室溫下為固形之環氧樹脂以及於室溫下為液形之環氧樹脂兩者。藉此，更可提高樹脂的熔融動作之設計自由度。
室溫下為固形之環氧樹脂並無特別限定，例如有雙酚A型環氧樹脂、雙酚S型環氧樹脂、酚酚醛型環氧樹脂、甲酚酚醛型環氧樹脂、環氧丙胺型環氧樹脂、環氧丙酯型環氧樹脂、3官能環氧樹脂、4官能環氧樹脂。更具體而言，較宜為使用固形3官能環氧樹脂、甲酚酚醛型環氧樹脂等。在這當中，可使用1種或是兼用2種以上。
室溫下為固形之環氧樹脂的軟化點，較宜為40至120℃，更宜為50至110℃，尤宜為60至100℃。若位於此範圍，則可抑制熱硬化性黏著膜的膠黏性，而容易進行熱硬化性黏著膜的處置。
室溫下為液形之環氧樹脂並無特別限定，例如有雙酚A型環氧樹脂、雙酚F型環氧樹脂等。此外，亦可兼用雙酚A型環氧樹脂及雙酚F型環氧樹脂兩者。
室溫下為液形之環氧樹脂的環氧當量，較宜為150至300，更宜為160至250，尤宜為170至220。若環氧當量低於此範圍，則硬化物的收縮率有變大的傾向，使用上述熱硬化性黏著膜進行黏著之半導體晶片可能產生翹曲。此外，若環氧當量高於此範圍，則與膜形成性樹脂、尤其是聚醯亞胺樹脂之間的反應性有降低的情形。
環氧樹脂等的硬化性樹脂可使用市售品，亦可在不損及本發明的效果之範圍內，調配各種可塑劑、安定劑、無機填充材、帶電防止劑或顏料等添加劑。
硬化性樹脂的調配量相對於熱硬化性黏著膜之構成成分的合計量，較宜為30至80重量%，更宜為35至75重量%，尤宜為40至70重量%。若位於此範圍，則可確保半導體晶片間的電性連接強度及機械連接強度。
(c)硬化劑此外，於熱硬化性黏著膜中，更可調配酚樹脂等之具有助熔活性之硬化劑以外的硬化劑。所使用的硬化劑，例如有酚類、胺類、硫醇類等。這些硬化劑可因應所使用之硬化性樹脂的種類等而適當選擇。例如，於使用環氧樹脂作為硬化性樹脂時，就獲得與環氧樹脂之間的良好反應性、硬化時的低尺寸變化及硬化後的適當物性(例如耐熱性、耐濕性等)之觀點來看，較宜為使用酚類作為硬化劑。
本發明中所使用之酚類並無特別限定，就熱硬化性黏著膜於硬化後的物性較佳之觀點來看，較宜為2官能以上。例如有雙酚A、四甲基雙酚A、二烯丙基雙酚A、二酚、雙酚F、二烯丙基雙酚F、參酚、肆酚、酚酚醛類、甲酚酚醛類等。其中，就良好的熔融黏度及與環氧樹脂之間的反應性、以及硬化後的物性較佳之觀點來看，較適合使用酚酚醛類以及甲酚酚醛類。
可因應所使用之硬化性樹脂或硬化劑的種類，或具有助熔活性之硬化劑的種類或使用量而適當地選擇硬化劑的調配量。例如，於使用酚酚醛類作為硬化劑時，就能夠確實使硬化性樹脂硬化之觀點來看，相對於熱硬化性黏著膜之構成成分的合計量，較宜為5重量%以上，更宜為10重量%以上。若殘留環氧樹脂與未反應的酚酚醛類，則會導致離子遷移。因此，為了不使殘渣殘留，較宜為50重量%以下，更宜為30重量%以下，尤宜為25重量%以下。
酚酚醛樹脂的調配量，亦可由相對環氧樹脂之當量比所規定。例如，酚酚醛樹脂對環氧樹脂之當量比為0.5至1.2，較宜為0.6至1.1，更宜為0.7至0.98。藉由將酚酚醛樹脂對環氧樹脂之當量比設定為0.5以上，可確保硬化後的耐熱性、耐濕性。另一方面，藉由將此當量比設定為1.2以下，可降低於硬化後之環氧樹脂與未反應的酚類酚醛樹脂的量，而具有良好的耐離子遷移性。
這些硬化劑可使用1種或是兼用2種以上。
(d)硬化促進劑熱硬化性黏著膜更可包含硬化促進劑。硬化促進劑可因應樹脂的種類而適當的選擇，例如，可使用熔點為150℃以上的咪唑化合物。若所使用之硬化促進劑的熔點為150℃以上，則焊料成分可於熱硬化性黏著膜結束硬化前於內部電極表面移動，而形成內部電極間的良好連接。熔點為150℃以上的咪唑化合物，例如有2－苯基羥基咪唑、2－苯基－4－甲基羥基咪唑等。
硬化促進劑的調配量可適當的選擇，例如於使用咪唑化合物作為硬化促進劑時，相對於熱硬化性黏著膜106之構成成分的合計量，較宜為0.005至10重量%，更宜為0.01至5重量%。藉由將咪唑化合物的調配量設定為0.005重量%以上，更可有效發揮硬化促進劑的功能，而提升熱硬化性黏著膜的硬化性。此外，藉由將咪唑化合物的調配量設定為10重量%以下，不會使構成焊料凸塊之焊料成分的熔融溫度時之樹脂的熔融黏度變得過高，而可獲得良好的焊料接合構造。此外，亦更可提升熱硬化性黏著膜的保存性。
這些硬化促進劑可使用1種或是兼用2種以上。
(e)矽烷偶合劑此外，熱硬化性黏著膜更可包含矽烷偶合劑。藉由含有矽烷偶合劑，可提高黏著膜對半導體晶片之密著性。矽烷偶合劑例如可使用環氧矽烷偶合劑、含芳香族之胺基矽烷偶合劑等。這些矽烷偶合劑可使用1種或是兼用2種以上。矽烷偶合劑的調配量可適當的選擇，相對於熱硬化性黏著膜之構成成分的合計量，較宜為0.01至5重量%，更宜為0.01至5重量%，尤宜為0.05至5重量%，特宜為0.1至2重量%。
除了上述成分之外，為了提升樹脂的相溶性、安定性、操作性等各種特性，亦可於本實施形態中所使用之熱硬化性黏著膜中，適當的調配各種添加劑。
將這些成分混合於溶劑中，並將所獲得之漆液(varnish)塗佈於聚酯薄片等之施以剝離處理後的基材上，於預定溫度下乾燥至實質上不含溶劑之程度為止，而獲得熱硬化性黏著膜106。所使用的溶劑，只要為對所使用的成分不具有活性者，則無特別限定，較宜為使用丙酮、甲基乙基酮、甲基異丁酮、DIBK(二異丁酮)、環己酮、DAA(二丙酮醇)等的酮類；苯、二甲苯、甲苯等之芳香族烴類；甲醇、乙醇、異丙醇、正丁醇等之醇類；甲賽路蘇、乙賽路蘇、丁賽路蘇、乙酸甲賽路蘇、乙酸乙賽路蘇等之賽路蘇系；NMP(N－甲基－2－吡咯烷酮)、THF(四氫呋喃)、DMF(二甲基甲醯胺)、DBE(二元酸酯)、EEP(3－乙氧基丙酸乙酯)、DMC(碳酸二甲酯)等。溶劑的調配量，較宜為位於使混合於溶劑之成分的固形份成為10至60重量%之範圍。
熱硬化性黏著膜106的厚度並無特別限定，較宜為1至50 μm，更宜為3至30 μm。若位於此範圍，則可將樹脂成分充分填入於半導體晶片的間隙，而確保樹脂成分於硬化後之機械黏著強度。此外，可確保相對向的內部電極間之電性連接，而獲得期望之半導體晶片間的間隔距離。熱硬化性黏著膜106的大小，可因應使用時半導體晶片10與半導體晶片20之間的連接面被覆蓋之大小而適當地調整。若考量到黏著性等問題，則膜106的大小較宜為較半導體晶片的面積之至少一半還大。
此外，熱硬化性黏著膜106較宜為具有期望的焊料潤濕擴散率(%)。亦即，關於熱硬化性黏著膜106，於將直徑500 μm的含錫焊球配置於上述熱硬化性黏著膜上，且於較該含錫焊球的熔點還高30℃的溫度中加熱20秒時，以下列第(I)式所表示之焊料潤濕擴散率在40%以上為佳。
焊料潤濕擴散率(%)＝[{(焊球直徑)－(潤濕擴散後的焊料厚度)}/(焊球直徑)]×100 (I)。
於使用焊料凸塊將電路基板進行金屬接合時，焊料潤濕擴散率愈大，愈可增進金屬間之結合而增加接合強度。可充分防止接合不良的產生之焊料潤濕擴散率為40%以上，但若為了提高接合機率並考量到於接合後的種種環境下之接合可靠度，焊料潤濕擴散率較宜為45%以上，更宜為50%以上。
於焊料潤濕擴散率為60%以上時，上述助熔化合物較宜為包含脂肪族二羧酸。此係由於，於焊料潤濕擴散率高於60%而需要較強的還原力時，藉由使用助熔活性較高之脂肪族二羧酸，可提高焊料成分的潤濕性並確保電性連接可靠度之故。
另一方面，於焊料潤濕擴散率為40%至60%時，助熔化合物較宜為包含具有羧基與酚類羥基之化合物。這是因為，於焊料潤濕擴散率位於上述範圍而不需具有較強的還原力時，較宜使用與硬化性樹脂(例如為環氧樹脂)的反應性較高之化合物，而更能夠有效的抑制起因於助熔殘渣之離子遷移的產生。
關於焊料潤濕擴散率的測定條件，為了降低焊球之潤濕擴散程度的變動，可於較焊球的熔點還高30℃的溫度進行加熱，此外，就考量到助熔化合物產生熔融，且於焊球表面移動而使焊料潤濕擴散為止之時間，以及焊球之潤濕擴散程度的變動，將加熱時間設定為20秒。
焊料潤濕擴散率，具體而言係以下列測定方法所求取。
(1)將厚度為15 μm的熱硬化性黏著膜貼附於裸Cu板(平井精密工業株式會社(日本)製)。
(2)將下列直徑為500 μm的焊球靜置於熱硬化性黏著膜上。(i)「M31」(Sn/Ag/Cu、熔點217℃、日本千住金屬工業株式會社製)(ii)「L20」(Sn/Bi、熔點138℃、日本千住金屬工業株式會社製)
(3)依據ASTM B 545，將加熱板加熱至較各焊料的熔點還高30℃的溫度，並於加熱板上加熱上述樣本20秒。
(4)測量於裸Cu板上潤濕擴散後之焊球的高度。
(5)以下列第(I)式算出焊料潤濕擴散率。
焊料潤濕擴散率(%)＝[{(焊球直徑)－(潤濕擴散後的焊料厚度)}/(焊球直徑)]×100 (I)
此外，於厚度為100 μm時，223℃之熱硬化性黏著膜106的熔融黏度較宜為10Pa．s至200000 Pa．s。藉由設定該熔融黏度於10Pa．s以上，可抑制因加熱時熱硬化性黏著膜106從被覆物的半導體晶片中滲出所導致之連接可靠度的降低以及對周邊構件之污染。此外，亦可防止氣泡的產生，以及樹脂成分無法充分填入於半導體晶片的間隙等的缺失。再者，亦可防止焊料過度潤濕擴散而於鄰接電極間產生短路之問題。此外，藉由設定熔融黏度於200000Pa．s以下，於焊料凸塊與設置於半導體晶片之內部電極形成金屬接合時，由於焊料凸塊與該內部電極間的樹脂被排除，因此可抑制接合不良。熔融黏度較宜為10至10000Pa．s，更宜為50至5000Pa．s，尤宜為300至1500Pa．s。
熱硬化性黏著膜106的熔融黏度係以下列測定方法所求取。亦即，使用黏彈性測定裝置(JASCO International株式會社製)，於升溫速度30℃/分、頻率數1.0Hz，且以應變固定－應力檢測的條件，對厚度為100 μm的熱硬化性黏著膜進行測定，並以Sn/Ag＝96.5/3.5的熔點之環境溫度223℃下的黏度作為測定值。
(2)第2實施形態接下來參照第4圖，說明本發明的第2實施形態之半導體電子零件的製造方法。
如第4圖(a)所示，係將設置有內部電極11之半導體晶片10以及設置有內部電極21之半導體晶片20，以設置有內部電極之一面(電路面)互為相對向之方式而配置。
可於半導體晶片10及半導體晶片20的表面，以分別使內部電極11、21形成開口之方式形成保護膜107。例如可形成聚醯亞胺膜、聚苯并唑膜、苯環丁烯膜等之有機樹脂保護膜。藉此，使焊料成分容易被誘導至相對向的內部電極間，而達成內部電極之間良好的電性連接。此外，亦可具有應力緩和層之功能。此外，保護膜107的形狀只要為具有上述功能者，則並不限定於圖式中的形狀。此外，亦可於內部電極11及內部電極21的表面，預先施以洗淨、研磨、電鍍及表面活化等處理。例如，如第4圖(a)所示般，於內部電極11及內部電極21的表面，使用Ti、Ti/Cu、Cu、Ni、Cr/Ni等而形成UBM(Under Barrier Metal：底層阻障金屬)層103。UBM層可為單層或多數層。此外，就保護半導體元件之目的下，亦可預先於半導體晶片10及半導體晶片20的表面施以表面安定化處理，例如可形成SiN膜等之鈍化膜113。
接著如第4圖(b)所示，使熱硬化性黏著膜108介置於半導體晶片10與半導體晶片20之間。於熱硬化性黏著膜108中，係包含有焊料粉108a及助熔化合物。並且緩慢加熱至熱硬化性黏著膜108尚未結束硬化且熱硬化性黏著膜108中的焊料粉108a會熔融之溫度為止。藉由加熱，如第4圖(c)所示，焊料粉108a係熔融並於樹脂成分中移動，且自我整合地凝聚於內部電極表面而形成焊料區域100。藉由此焊料區域100，使內部電極表面與熔融的焊料粉接合，而將相對向的內部電極間予以電性地連接。另一方面，熱硬化性黏著膜的樹脂成分係填入於半導體晶片之間的間隙而形成絕緣性區域101，藉此使鄰接的內部電極間電性絕緣。
加熱溫度係依焊料粉及熱硬化性黏著膜的組成而適當地選擇，於本實施形態中，熱硬化性黏著膜108的硬化溫度T1 及焊料粉108a的熔點T2 ，較宜為滿足下列第(II)式。
T1 ≧T2 ＋20℃ (II)
若熱硬化性黏著膜108的硬化溫度T1 及焊料粉108a的熔點T2 滿足此關係，則可一邊控制熱硬化性黏著膜的硬化，一邊使熔融的焊料粉自我整合地凝聚於內部電極表面。硬化溫度T1 較宜為熔點T2 ＋30℃，更宜為熔點T2 ＋50℃。另外，例如使用DSC，以於升溫速度10℃/分下測定接著膜時之吸熱峰值溫度作為熱硬化性黏著膜108的硬化溫度T1 。此外，例如使用DSC，以於升溫速度10℃/分下測定焊料粉單體時之吸熱峰值溫度作為焊料粉的熔點T2 。
構成焊料粉之焊料成分，可使用與構成焊料凸塊之焊料成分為相同者。焊料成分可於使焊料粉成為期望的熔點之方式而適當地選擇。
此外，焊料粉的熔點T2 之熱硬化性黏著膜的熔融黏度，較宜為50Pa．s至5000Pa．s，更宜為100Pa．s至4000Pa．s。藉由設定於此範圍，可抑制焊料成分從內部電極間擴散，此外亦可抑制樹脂成分的滲出。熱硬化性黏著膜的熔融黏度，可使用黏著膜的厚度設為100 μm之樣本，使用動態黏彈性測定裝置，於頻率數0.1Hz、升溫速度10℃/分下測量出。
另外，於加熱溫度到達焊料粉的熔點之時點，亦可加壓半導體晶片10與半導體晶片20，使對向的內部電極間之距離接近。
接著使熱硬化性黏著膜108的樹脂成分完全硬化，以確保電性連接強度及機械連接強度。如此，可將對向的內部電極11及內部電極21予以電性連接，且以絕緣性樹脂將半導體晶片10與半導體晶片20之間的間隙予以密封。
在此，可因應半導體晶片的表面積及期望之半導體晶片間的間隔距離而適當選擇焊料粉的平均粒徑，較宜為1至100 μm，更宜為5至100 μm，尤宜為10至50 μm。若位於此範圍，則可抑制鄰接的內部電極間之橋接，而防止鄰接的內部電極間之短路。焊料粉的平均粒徑例如可藉由雷射繞射散射法所測定。
此外，就充分確保熱硬化性黏著膜108的黏著時之樹脂的流動性之觀點來看，焊料粉的熔點一般為100℃以上，較宜為130℃以上。此外，為了防止黏著時安裝基板或半導體晶片上所設置之元件的熱劣化，焊料粉的熔點一般為250℃以下，較宜為230℃以下。焊料粉的調配量相對於焊料粉以外之熱硬化性黏著膜的構成成分之合計100重量份，較宜為含有20至150重量份，更宜為含有40至100重量份。
另外，熱硬化性黏著膜108中所包含之助熔化合物，可使用與上述實施形態中所例示者相同者。此外，焊料粉以外之熱硬化性黏著膜的構成成分及調配量，可使用與上述熱硬化性黏著膜106的說明中所例示者相同者。各成分的調配比，係以相對於排除焊料粉後之成分的合計量之量所規定。將這些各成分及焊料粉混合於溶劑中，並將獲得之漆液塗佈於聚酯薄片上，進行乾燥後可獲得熱硬化性黏著膜108。
熱硬化性黏著膜108的厚度並無特別限定，較宜為1至50 μm，更宜為3至30 μm。若位於此範圍，則可將樹脂成分充分填入於半導體晶片的間隙，而可確保樹脂成分於硬化後之機械黏著強度。
於本實施形態中，於厚度為100 μm時，138℃之熱硬化性黏著膜的熔融黏度較宜為1Pa．s至10000Pa．s。藉由設定於此範圍，則可抑制焊料成分從內部電極間擴散，且同時可抑制樹脂成分的滲出。另外，熱硬化性黏著膜的熔融黏度，可使用黏彈性測定裝置(JASCO International株式會社製)，於升溫速度10℃/分、頻率數0.1Hz，且以應變固定－應力檢測的條件，對厚度為100 μm的熱硬化性黏著膜進行測定，並以Sn/Bi＝42/58的熔點之環境溫度138℃下的黏度作為測定值。
藉由設定上述熔融黏度於1Pa．s以上，可防止焊料粉從被覆物的半導體晶片中溢出，而抑制絕緣不良。此外亦能夠抑制因加熱時熱硬化性黏著膜108從被覆物的半導體晶片中滲出所導致之連接可靠度的降低以及對周邊構件之污染。再者，亦可防止氣泡的產生、以及樹脂成分無法充分填入於半導體晶片的間隙等的缺失。此外，藉由設定上述熔融黏度於10000Pa．s以下，可提高焊料粉及具有助熔活性之硬化劑的接觸機率，而可有效率地進行氧化膜的還原。此外，由於焊料粉容易移動，因此可降低焊料粉殘存於被覆物之半導體晶片的電極間之機率，而抑制絕緣不良的產生。此外，於焊料凸塊與設置於半導體晶片之內部電極形成金屬接合時，由於焊料凸塊與該內部電極間的樹脂被排除，因此可抑制接合不良。上述熔融黏度較宜為10至10000Pa．s，更宜為50至5000Pa．s，尤宜為100至4000Pa．s，最宜為100至2000Pa．s。
可因應使用時半導體晶片10與半導體晶片20之間的連接面被覆蓋之大小而適當地調整熱硬化性黏著膜108的大小。若考量到黏著性等問題，則膜108的大小期望為較半導體晶片的面積之至少一半還大。
本發明的一實施形態之多段型半導體電子零件，亦可藉由將其他半導體晶片電性連接於形成有通孔之半導體晶片上，而與上述相同的方式進行製造。此外，本發明的範圍亦包含以這些製造方法所製造之半導體電子零件。
3.半導體裝置
接下來參照第5圖及第6圖，說明於基板上安裝有本發明的一實施形態之半導體電子零件而成之半導體裝置。第5圖係顯示，安裝有本發明的一項實施形態之半導體電子零件1而成之半導體裝置之示意剖面圖。此外，第6圖係顯示，安裝有本發明的其他實施形態之多段堆疊型半導體電子零件2而成之半導體裝置之示意剖面圖。圖式中的符號，係對應於半導體電子零件1、半導體電子零件2的說明中之符號。
如第5圖所示，半導體晶片10上所設置之外部電極12與安裝基板109上所設置之電極(圖中未顯示)，係藉由導線110電性地連接，且半導體電子零件1係安裝於安裝基板109上。半導體電子零件1、安裝基板109及導線110係由密封樹脂111所密封。此外，於安裝基板109的內面，設置有多數個凸塊電極112。
此外，同樣於第6圖中，半導體晶片10上所設置之外部電極12與安裝基板109上所設置之電極(圖中未顯示)係藉由導線110所電性連接，且半導體電子零件2安裝於安裝基板109上。半導體電子零件2、安裝基板109及導線110係由密封樹脂111所密封。此外，於安裝基板109的內面，設置有多數個凸塊電極112。
本實施形態之半導體裝置係藉由使用本發明之半導體電子零件作為裝載於安裝基板上之半導體電子零件，而可達成封裝全體的薄型化及小型化。此外，本實施形態之半導體裝置係藉由縮小半導體電子零件之內部電極間的間隔距離，而可達成高功能化。
本實施形態之半導體裝置，可對應於電子機器之高功能化及小型化。本實施形態之半導體裝置可廣泛使用於例如行動電話、數位相機、數位攝影機、車載導航裝置、個人電腦、遊戲機、液晶電視、液晶顯示器、有機電激發光顯示器、印表機等。
實施例
以下係使用實施例而更具體說明本發明，但本發明並不限定於這些實施例。
<熱硬化性黏著膜的製作>
係以下列方式製作出熱硬化性黏著膜A至Y。
(1)熱硬化性黏著膜A的製作以第1表所示之配方A的調配量，使固形份成為40重量%之方式將各成分混合至丙酮，並使用逗點刮刀(comma knife)式塗佈機，將所獲得的漆液塗佈於施以靜電防止處理後的聚酯薄片，於上述丙酮揮發之溫度70℃下進行3分鐘的乾燥，而製作厚度為25 μm之熱硬化性黏著膜A。
(2)熱硬化性黏著膜B的製作以第1表所示之配方B的調配量，使固形份成為40重量%之方式將各成分混合至NMP(N－Methyl－2－Pyrrolidone：N－甲基－2－吡咯烷酮)，並使用逗點刮刀式塗佈機，將所獲得的漆液塗佈於施以靜電防止處理後的聚酯薄片，於上述NMP會揮發之溫度150℃下進行3分鐘的乾燥，而製作厚度為15 μm之熱硬化性黏著膜B。
(3)熱硬化性黏著膜C至F的製作以第1表所示之配方C至F的調配量，使固形份成為40重量%之方式將各成分混合至丙酮，並使用逗點刮刀式塗佈機，將所獲得的漆液塗佈於施以靜電防止處理後的聚酯薄片，於上述丙酮會揮發之溫度70℃下進行3分鐘的乾燥，而分別製作厚度為15 μm之熱硬化性黏著膜C至F。配方C、D中所含之矽改質聚醯亞胺，係以下列方式合成。
(矽改質聚醯亞胺的合成)將200g之脫水精製後的N－甲基－2－吡咯烷酮(NMP)放入於具有乾燥氮氣導入管、冷卻器、溫度計、攪拌機之四口燒瓶，一邊使氮氣流通一邊進行激烈攪拌10分鐘。
接著投入29g的1,3－雙－(3－胺基苯氧基)苯、10g的3,3－(1,1,3,3,5,5,7,7,9,9,11,11,131315,15,1717,19,19－二十甲基－1,19－十矽氧烷二基)雙－1－丙烷胺、及4g的1,3－雙(3－胺丙基)－1,1,3,3－四甲基二矽氧烷，並攪拌至均一為止。於均一地溶解後，以冰水浴冷卻至5℃後，以維持粉末狀的狀態花費15分鐘加入40g的4,4’－氧基二苯二甲酸二酐，之後攪拌2小時。於此期間，燒瓶係保持於5℃。
之後移除氮氣導入管及冷卻器，將裝滿有二甲苯之丁史塔克(Dean－Stark)管安裝於燒瓶，並將50g的甲苯添加至系統中。改為油浴，將系統加熱至170℃並將所產生的水排出至系統外。加熱4小時後，確認不再從系統中產生水。
冷卻後，將此反應溶液投入於大量的甲醇中，使聚醯亞胺矽氧烷析出。過濾固形份後，於80℃中進行12小時的減壓乾燥以去除溶劑，而獲得固形樹脂。以KBr錠劑法測定紅外線吸收光譜，結果確認出起因於環狀醯亞胺鍵結之5.6 μm的吸收，但未確認出起因於醯胺鍵結之6.06 μm的吸收，因此可確認出此樹脂幾乎100%的醯亞胺化。
(4)熱硬化性黏著膜G至Q的製作以第2表所示之配方G至Q的調配量，使固形份成為40重量%之方式將各成分混合至丙酮，並使用逗點刮刀式塗佈機，將所獲得的漆液塗佈於施以靜電防止處理後的聚酯薄片，於上述丙酮會揮發之溫度70℃下進行3分鐘的乾燥，而製作厚度為25 μm之熱硬化性黏著膜。
(5)熱硬化性黏著膜R至Y的製作以第3表所示之配方R至Y的調配量，使固形份成為40重量%之方式將各成分混合至NMP(N－甲基－2－吡咯烷酮)，並使用逗點刮刀式塗佈機，將所獲得的漆液塗佈於施以靜電防止處理後的聚酯薄片，於上述NMP會揮發之溫度150℃下進行3分鐘的乾燥，而製作厚度為50 μm之熱硬化性黏著膜。
[1]焊料熔點時之熔融黏度的測定以下列方式測定熱硬化性黏著膜A至Y之焊料熔點時之熔融黏度。關於熱硬化性黏著膜A及G至Q，係以下列測定條件1測定熔融黏度。此外，關於熱硬化性黏著膜B至D及R至Y，係以下列測定條件2測定熔融黏度。
(測定條件1)使用黏彈性測定裝置(JASCO International株式會社製)，於升溫速度10℃/分、頻率數0.1Hz，且以應變固定－應力檢測的條件，對厚度為100 μm的熱硬化性黏著膜進行測定，並以Sn/Bi＝42/58的熔點之環境溫度138℃下的黏度作為測定值。
(測定條件2)使用黏彈性測定裝置(JASCO International株式會社製)，於升溫速度30℃/分、頻率數1.0Hz，且以應變固定－應力檢測的條件，對厚度為100 μm的熱硬化性黏著膜進行測定，並以Sn/Ag＝96.5/3.5的熔點之環境溫度223℃下的黏度作為測定值。
[2]焊料潤濕擴散率的測定以下列方式測定熱硬化性黏著膜B至D及R至Y之焊料潤濕擴散率。
(1)將厚度為15 μm的熱硬化性黏著膜貼附於裸Cu板(平井精密工業株式會社製)。
(2)將下列直徑為500 μm的焊球靜置於熱硬化性黏著膜上。(i)「M31」(Sn/Ag/Cu、熔點217℃、日本千住金屬工業株式會社製)(ii)「L20」(Sn/Bi、熔點138℃、日本千住金屬工業株式會社製)
(3)依據ASTM B 545，將加熱板加熱至較各焊料的熔點還高30℃的溫度，並於加熱板上加熱上述樣本20秒。
(4)測量於裸Cu板上潤濕擴散後之焊球的高度。
(5)以下列第(I)式算出焊料潤濕擴散率。
焊料潤濕擴散率(%)＝[{(焊球直徑)－(潤濕擴散後的焊料厚度)}/(焊球直徑)]×100 (I)
焊料熔點時之熔融黏度及焊料潤濕擴散率的測定結果，係如第1表及第3表所示。
<半導體電子零件的製造>
接下來使用所獲得之熱硬化性黏著膜A至Y，以製造第1圖的構造之半導體電子零件。第7圖係為實施例1、2、及13至28之製造方法的製程說明圖。此外，第8圖係為實施例3至12及29至40之製造方法的製程說明圖。以下參照第7圖說明實施例1、2、及13至28，並參照第8圖說明實施例3至12及29至40。
(實施例1、2)首先，於半導體晶片10、20的電路面全體，形成0.4 μm厚的熱氧化膜114。接著將鋁/0.5Cu濺鍍0.4 μm厚以作為金屬層，並利用阻劑而對配線所需以外的部分進行乾式蝕刻，而形成內部電極11、12。於去除遮罩後，藉由CVD法於全面形成0.2 μm厚的SiN膜(鈍化膜)113。之後，利用光阻對金屬層部分(內部電極表面)進行軟式蝕刻。接下來塗佈3 μm厚的聚醯亞胺層並進行顯影，使金屬層部分形成開口，再使聚醯亞胺層硬化而形成應力緩和層(保護膜)107。之後依序濺鍍0.05 μm厚的Ti及1 μm厚的Cu，而形成UBM層103、104。如此，於半導體晶片10、20上形成連接墊(墊大小：60 μm見方、墊之間的距離：40 μm、墊節距(pitch)：100 μm)。在此，半導體晶片10係使用10mm見方且厚度為725 μm者，半導體晶片20係使用6mm見方且厚度為725 μm者。另外，於實施例1中，於半導體晶片10上，係以間隔距離Y成為750 μm之方式配置有外部電極，於實施例2中，係以間隔距離Y成為250 μm之方式配置有外部電極。
接下來，將熱硬化性黏著膜A裁切為半導體晶片10之連接墊面的大小(6mm見方)，於80℃的熱盤上進行貼附，之後將作為基材之聚酯薄片予以剝離。然後使半導體晶片20的連接墊面與半導體晶片10的連接墊面呈相對向並進行對準。對準係藉由下列方式進行，亦即藉由與覆晶接合機(涉谷工業製、DB200)一同設置之攝影機，辨識出位於晶片的連接墊面之對準標記而進行。之後使用此覆晶接合機，於第4表所記載之一次加熱條件下進行熱壓著，並實施焊料連接。再者，將烤箱設定於第4表所記載之二次加熱條件，進行預定的熱履歷下的加熱，以實施黏著劑的硬化。結果獲得具有如第4表所示之間隔距離X、Y、Z之半導體電子零件。
(實施例13至16)使用熱硬化性黏著膜G或H以取代熱硬化性黏著膜A，並以與實施例1及2相同的方法而獲得半導體電子零件。另外，於實施例13及15中，於半導體晶片10上，以間隔距離Y成為750 μm之方式配置外部電極，於實施例14及16中，以間隔距離Y成為250 μm之方式配置外部電極。結果獲得具有如第4表所示之間隔距離X、Y、Z之半導體電子零件。
(實施例17至28)除了使用如第5表所記載的配方之熱硬化性黏著膜及加熱條件之外，以與實施例1及2相同的方法獲得半導體電子零件。於實施例17至28中，於半導體晶片10上，以間隔距離Y成為250 μm之方式配置外部電極。結果獲得具有如第5表所示之間隔距離X、Y、Z之半導體電子零件。
(實施例3至12)首先，於半導體晶片10、20的電路面，以與實施例1及2相同的方法，形成連接墊(墊大小：60 μm見方、墊之間的距離：40 μm、墊節距：100 μm)。再於半導體晶片20所形成的連接墊上，利用UBM層104之部分形成開口之遮罩，將50 μm直徑的Sn－Ag焊球載置於塗布有助熔劑之UBM104上。接著通過回焊使焊球與UBM層104接合，而形成焊料凸塊105(參照第8圖)。半導體晶片10、20係使用與實施例1及2為相同者。
接著將熱硬化性黏著膜B至F分別裁切為半導體晶片10之連接墊面的大小(6mm見方)，於80℃的熱盤上進行貼附，之後將作為基材之聚酯薄片剝離。然後使半導體晶片20的連接墊面與半導體晶片10的連接墊面呈相對向，並進行與實施例1、2相同之對準。之後使用覆晶接合機，於第4表所記載之一次加熱條件下進行熱壓著，並實施焊料連接。再者，將烤箱設定於第4表所記載之二次加熱條件，進行預定的熱履歷下的加熱，以實施黏著劑的硬化。結果獲得具有如第4表所示之間隔距離X、Y、Z之半導體電子零件。
(實施例29至40)除了使用如第6表所記載的配方之熱硬化性黏著膜及加熱條件之外，以與實施例3至12相同的方法獲得半導體電子零件。另外，於實施例29至40中，於半導體晶片10上，以間隔距離Y成為250 μm之方式配置外部電極。結果獲得具有如第6表所示之間隔距離X、Y、Z之半導體電子零件。
<測試例>
以下列方式進行間隔距離X、Y、Z的測定、導通測試、以及外部電極的污染評估。
(l)間隔距離X、Y、Z的測定以熱硬化性環氧樹脂(日本化藥工業製：RE－403S、富士化成工業製：FUJICURE 5300)埋覆所獲得之半導體電子零件，並實施剖面研磨。將所獲得之剖面投影至Keyence製的數位示波器，並利用影像處理軟體VHS－500以算出間隔距離X、Y、Z。
(2)導通測試藉由手持測試機，於半導體晶片層積後以及溫度循環測試(交互進行－65℃ 1小時、150℃ 1小時的循環)1000小時後之兩者的時點，測定所獲得之半導體電子零件的半導體晶片連接率。連接率係以下列式子所算出。
連接率(%)＝{(導通的墊數)/(測定的墊數)}×100評估基準如下所述。○：連接率100%×：連接率未滿100%
(3)外部電極的污染評估於所獲得之半導體電子零件中，以金屬顯微鏡觀察半導體晶片10上的外部電極12(導線接合墊)，觀察熱硬化性黏著膜是否受到污染。評估基準如下所述。
外部電極無污染(熱硬化性黏著膜未到達外部電極)外部電極有污染(熱硬化性黏著膜到達外部電極)
結果如第4至6表所示。
如第4、5及6表所示，於實施例1至40中，均可獲得不會污染外部電極而能夠滿足期望的間隔距離X、Y、Z之半導體電子零件。此外，導通測試的結果亦良好，因此得知具有優良的連接可靠度。此外，可藉由一般方法將所獲得的半導體電子零件安裝於基板上，而獲得本發明之半導體裝置。
從以上說明中可得知，根據本發明，於晶片堆疊型的系統化封裝中，能夠製造出裝載有高密度的半導體晶片之半導體電子零件。
(產業利用可能性)
根據本發明，可獲得以高密度裝載有半導體積體電路之半導體電子零件及半導體裝置。藉由使用本發明之半導體電子零件及半導體裝置，可製造出能夠對應於高功能化及小型化的要求之電子零件。
1．．．半導體電子零件
2．．．多段堆疊型半導體電子零件
10．．．第1半導體晶片
11．．．第1內部電極
12．．．外部電極
20．．．第2半導體晶片
20a．．．第2半導體晶片側面
21．．．第2內部電極
30．．．第3半導體晶片
30a．．．第3半導體晶片側面
31．．．第3內部電極
100．．．焊料區域
101．．．絕緣性區域
102．．．通孔
103．．．UBM層
104．．．UBM層
105．．．焊料凸塊
106．．．熱硬化性黏著膜
107．．．保護膜
108．．．熱硬化性黏著膜
108a．．．焊料粉
109．．．安裝基板
110．．．導線
111．．．密封樹脂
112．．．凸塊電極
113．．．鈍化膜
114．．．熱氧化膜
第1圖(a)及(b)係為有關本發明的一實施形態之半導體電子零件之示意俯視圖及示意剖面圖。
第2圖係為有關本發明的一實施形態之多段堆疊型半導體電子零件之示意剖面圖。
第3圖(a)至(c)係為有關本發明的一實施形態之半導體電子零件的製造方法之製程說明圖。
第4圖(a)至(c)係為有關本發明的一實施形態之半導體電子零件的製造方法之製程說明圖。
第5圖係為有關本發明的一實施形態之半導體裝置之示意剖面圖。
第6圖係為有關本發明的一實施形態之多段堆疊型半導體裝置之示意剖面圖。
第7圖係為有關本發明的實施例之半導體電子零件的製造方法之製程說明圖。
第8圖係為有關本發明的實施例之半導體電子零件的製造方法之製程說明圖。
1．．．半導體電子零件
10．．．第1半導體晶片
11．．．第1內部電極
12．．．外部電極
20．．．第2半導體晶片
20a．．．第2半導體晶片側面
21．．．第2內部電極
100．．．焊料區域
101．．．絕緣性區域

Claims (22)

  1. 一種半導體電子零件，係為具備：具有設置有第1內部電極及第1外部電極之電路面的第1半導體晶片、及具有設置有與上述第1內部電極電性連接之第2內部電極之電路面的第2半導體晶片，且上述第1半導體晶片的電路面及上述第2半導體晶片的電路面為對向配設而成之晶片堆疊型的半導體電子零件，其特徵為：於上述第1半導體晶片與上述第2半導體晶片之間的間隙係填入有絕緣性樹脂；上述第1半導體晶片與上述第2半導體晶片之間的間隔距離為25μm以下；上述第2半導體晶片側面與上述第1外部電極之間的最短間隔距離為1mm以下。
  2. 如申請專利範圍第1項之半導體電子零件，其中，鄰接之上述第1內部電極間的最短間隔距離為50μm以下。
  3. 如申請專利範圍第1項或第2項之半導體電子零件，其中，上述第2半導體晶片係配設於上述第1半導體晶片之大致為中央的區域。
  4. 如申請專利範圍第1項或第2項之半導體電子零件，其中，上述第1外部電極係設置於上述第1半導體晶片的周緣部。
  5. 如申請專利範圍第1項或第2項之半導體電子零件，其中，使設置在上述第1內部電極上及上述第2內部電極上的至少一方之焊料凸塊、及包含助熔化合物之熱硬化 性黏著膜介置於上述第1半導體晶片與上述第2半導體晶片之間並使其熱熔著，藉此將上述第1內部電極與上述第2內部電極予以電性連接，且於上述第1半導體晶片與上述第2半導體晶片之間的間隙，填入上述絕緣性樹脂。
  6. 如申請專利範圍第5項之半導體電子零件，其中，上述熱硬化性黏著膜係含有膜形成性樹脂10至50重量%、硬化性樹脂30至80重量%、以及具有助熔活性之硬化劑1至20重量%。
  7. 如申請專利範圍第6項之半導體電子零件，其中，上述膜形成性樹脂係從由(甲基)丙烯酸系樹脂、苯氧基樹脂、及聚醯亞胺樹脂所組成之群組中選擇之至少1種。
  8. 如申請專利範圍第6項之半導體電子零件，其中，上述硬化性樹脂為環氧樹脂。
  9. 如申請專利範圍第6項之半導體電子零件，其中，上述具有助熔活性之硬化劑係從由脂肪族二羧酸及具有羧基與酚類羥基之化合物所組成之群組中選擇之至少1種。
  10. 如申請專利範圍第5項之半導體電子零件，其中，關於上述熱硬化性黏著膜，於將直徑500μm的含錫焊球配置於上述熱硬化性黏著膜上，且於較該含錫焊球的熔點還高30℃的溫度中加熱20秒時，以下列第(I)式所表示之焊料潤濕擴散率為40%以上，焊料潤濕擴散率(%)=[{(焊球直徑)-(潤濕擴散後 的焊料厚度)}/(焊球直徑)]×100 (I)。
  11. 如申請專利範圍第5項之半導體電子零件，其中，上述熱硬化性黏著膜於厚度為100μm時，223℃之熔融黏度為10Pa‧s至200000Pa‧s。
  12. 如申請專利範圍第1項或第2項之半導體電子零件，其中，使包含焊料粉及助熔化合物之熱硬化性黏著膜介置於上述第1半導體晶片與上述第2半導體晶片之間並使其熱熔著，藉此將上述第1內部電極與上述第2內部電極予以電性連接，且於上述第1半導體晶片與上述第2半導體晶片之間的間隙，填入上述絕緣性樹脂。
  13. 如申請專利範圍第12項之半導體電子零件，其中，上述熱硬化性黏著膜之焊料粉以外的構成成分係含有膜形成性樹脂10至50重量%、硬化性樹脂30至80重量%及具有助熔活性之硬化劑1至20重量%。
  14. 如申請專利範圍第12項之半導體電子零件，其中，上述熱硬化性黏著膜，相對於焊料粉以外的構成成分之合計量100重量份，係含有焊料粉30至200重量份。
  15. 如申請專利範圍第13項之半導體電子零件，其中，上述膜形成性樹脂係從由(甲基)丙烯酸系樹脂、苯氧基樹脂、以及聚醯亞胺樹脂所組成之群組中選擇之至少1種。
  16. 如申請專利範圍第13項之半導體電子零件，其中，上述硬化性樹脂為環氧樹脂。
  17. 如申請專利範圍第13項之半導體電子零件，其中，上 述具有助熔活性之硬化劑係從由脂肪族二羧酸及具有羧基與酚類羥基之化合物所組成之群組中選擇之至少1種。
  18. 如申請專利範圍第12項之半導體電子零件，其中，上述熱硬化性黏著膜的硬化溫度T1 及上述焊料粉的熔點T2 係滿足下列第(II)式，T1 ≧T2 +20℃ (II)；上述焊料粉的熔點T2 之上述熱硬化性黏著膜的熔融黏度為50Pa‧s至5000Pa‧s。
  19. 如申請專利範圍第12項之半導體電子零件，其中，上述熱硬化性黏著膜於厚度為100μm時，138℃之熔融黏度為1Pa‧s至10000Pa‧s。
  20. 如申請專利範圍第1項或第2項之半導體電子零件，其中，於上述第2半導體晶片之與電路面為相反側的一面上，復配設有半導體晶片而成。
  21. 如申請專利範圍第1項或第2項之半導體電子零件，復具備：具有設置有第3內部電極之電路面的第3半導體晶片；其中，上述第3半導體晶片的電路面係配設成相對向於上述第2半導體晶片之與電路面為相反側之面；上述第2半導體晶片與上述第3半導體晶片之間的間隙係填入有絕緣性樹脂；上述第3內部電極係透過於上述第2半導體晶片的厚度方向所設置之通孔而與上述第2內部電極電性連 接而成。
  22. 一種半導體裝置，其特徵為：安裝有申請專利範圍第1至21項中任一項之半導體電子零件而成。
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EP2079108A4 (en) 2011-04-06
US20100102446A1 (en) 2010-04-29
EP2096671A4 (en) 2011-04-06
US8629564B2 (en) 2014-01-14
SG176436A1 (en) 2011-12-29
KR20090074054A (ko) 2009-07-03
WO2008054011A1 (fr) 2008-05-08
US8319350B2 (en) 2012-11-27
TWI414580B (zh) 2013-11-11
JPWO2008054012A1 (ja) 2010-02-25
TW200834878A (en) 2008-08-16
JP5182094B2 (ja) 2013-04-10
SG176437A1 (en) 2011-12-29
KR20090076928A (ko) 2009-07-13
EP2079108A1 (en) 2009-07-15

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