JP2012191062A - 半導体装置 - Google Patents

半導体装置 Download PDF

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Publication number
JP2012191062A
JP2012191062A JP2011054534A JP2011054534A JP2012191062A JP 2012191062 A JP2012191062 A JP 2012191062A JP 2011054534 A JP2011054534 A JP 2011054534A JP 2011054534 A JP2011054534 A JP 2011054534A JP 2012191062 A JP2012191062 A JP 2012191062A
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Japan
Prior art keywords
semiconductor chip
resin
semiconductor
semiconductor device
underfill
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Pending
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JP2011054534A
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English (en)
Inventor
Masatoshi Fukuda
昌利 福田
Hiroshi Watabe
博 渡部
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Toshiba Corp
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Toshiba Corp
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Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP2011054534A priority Critical patent/JP2012191062A/ja
Priority to TW101104583A priority patent/TWI484601B/zh
Priority to US13/397,098 priority patent/US8710653B2/en
Priority to CN201210043825.2A priority patent/CN102683330B/zh
Publication of JP2012191062A publication Critical patent/JP2012191062A/ja
Pending legal-status Critical Current

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Abstract

【課題】温度サイクル等の印加時にアンダーフィル樹脂の剥離を抑制し、半導体チップの断線不良等を防止することを可能にした半導体装置を提供する。
【解決手段】実施形態によれば、半導体装置１０は、配線基板１と、この配線基板１上に搭載された半導体チップ積層体２と、半導体チップ積層体の各半導体チップ間に充填されたアンダーフィル４層と、半導体チップ積層体２等の外側に被覆・形成されたモールド樹脂硬化物の封止層８とを備える。アンダーフィル層４は、アミン系の硬化剤を含むアンダーフィル樹脂の硬化物であり、Ｔｇが６５℃以上１００℃以下の硬化物により構成されている。
【選択図】図１

Description

本発明の実施形態は、半導体装置に関する。
近年、電子機器の高機能化および小型化の要求に伴い、半導体集積回路の高密度実装技術の開発が進められている。そのような実装技術の一つとして、半導体チップ上に別の半導体チップをフェイスダウンで搭載するチップオンチップ型のシステムインパッケージがある。このようなチップオンチップ構造は、半導体パッケージの小型化、動作の高速化、省電力化に有効であることから着目されている。
チップオンチップ型の構造において半導体チップ間の接続は、通常、微小なバンプを介したフリップチップ方式で行われている。そして、接続部を湿度などの周囲の環境から保護し、かつ機械的な強度を確保するために、半導体チップ間には樹脂材料を注入してアンダーフィル層を形成している（例えば、特許文献１参照。）。
しかしながら、従来からのチップオンチップ型の半導体装置では、低温−高温の温度サイクルを繰り返すと、上段の半導体チップの側面と、アンダーフィル層を構成するアンダーフィル樹脂との間で剥離が生じやすかった。そして、この剥離がアンダーフィル樹脂内を亀裂となって伝播し、下段の半導体チップの内部配線を切断するなどの不良が発生することがあった。
ＷＯ２００８／０５４０１１公報
本発明の目的は、温度サイクル等の印加時にアンダーフィル樹脂の剥離を抑制し、半導体チップの断線不良等を防止することを可能にした半導体装置を提供することにある。
実施形態の半導体装置は、少なくとも一方の主面に配線層を有する配線基板と、前記配線基板の前記主面に実装された、２つ以上の半導体チップが所定の間隔をおいて重ねて配置され、かつ各半導体チップが互いにバンプを介して電気的に接続された半導体チップ積層体と、前記半導体チップ積層体の各半導体チップ間に充填された樹脂材料からなるアンダーフィル層と、前記半導体チップ積層体の外側に被覆・形成されたモールド樹脂の硬化物からなる封止層とを備えた半導体装置であり、前記アンダーフィル層は、アミン系の硬化剤を含む樹脂硬化物からなり、かつ前記樹脂硬化物のガラス転移温度（Ｔｇ）が６５℃以上１００℃以下であることを特徴とする。
アンダーフィル層を構成する樹脂材料（アンダーフィル樹脂）は、平均粒径が０．５μｍ未満の無機充填材を含有する。半導体チップ積層体を構成する半導体チップ間の隙間は４０μｍ以下が好ましい。また、半導体チップ積層体を構成する２つ以上の半導体チップの厚さは、いずれも３５０μｍ以下が好ましい。さらに、モールド樹脂の硬化物は、Ｔｇが１３０〜２００℃で、Ｔｇ未満の温度における熱膨張率（ＣＴＥ1）が０．８〜１．４ｐｐｍ／℃、Ｔｇ以上の温度における熱膨張率（ＣＴＥ2）が３．０〜４．９ｐｐｍ／℃であり、曲げ弾性率が１５〜３０ＧＰａであることが好ましい。
第１の実施形態の半導体装置を示す断面図である。 第２の実施形態の半導体装置を示す断面図である。
以下、実施形態の半導体装置について、図面を参照して説明する。
（第１の実施形態）
図１は、第１の実施形態の半導体装置を示す断面図である。
図１に示す半導体装置１０は、一方の主面である表面（図１では上面）に配線回路（図示を省略。）を有する配線基板１と、この配線基板１の前記表面に搭載されて電気的に接続された半導体チップ積層体２を備えており、ＦＢＧＡ（Fine pitch Ball Grid Array）パッケージの形態を有する。
半導体チップ積層体２は、フェイスアップに配置された第１の半導体チップ２ａの上に、第１の半導体チップ２ａよりも小面積の第２の半導体チップ２ｂの回路面（素子回路面）が対向するように配置され、バンプ３を介して接続された構造を有する。第１および第２の半導体チップ２ａ、２ｂの厚さは、いずれも３５０μｍ以下となっている。
また、バンプ３は、Ｓｎ−Ａｇはんだ（融点２２１℃）、Ｓｎ−Ｃｕはんだ（融点２２７℃）等のはんだや、Ａｕ、Ｓｎ（融点２３２℃）等の金属材料からなり、バンプ径は５〜５０μｍで配列のピッチは１０〜１００μｍとなっている。第１および第２の半導体チップ２ａ、２ｂと接続するバンプ３の接続には、熱圧着やリフロー等が用いられている。
そして、半導体チップ積層体２において、第１の半導体チップ２ａと第２の半導体チップ２ｂとの間の隙間には、熱硬化性樹脂材料が充填されアンダーフィル層４が形成されている。ここで、アンダーフィル層４を構成するアンダーフィル樹脂は、アミン系の硬化剤を含有するエポキシ系樹脂の硬化物からなり、この硬化物のＴｇは６５℃以上１００℃以下となっている。硬化物の好ましいＴｇは６５℃以上９５℃以下であり、より好ましいＴｇは６５℃以上９０℃以下である。
硬化剤として、アミン系以外の例えば酸無水物系の化合物が配合された樹脂を使用してアンダーフィル層４を形成した場合には、温度サイクル印加時において半導体チップ側面でのアンダーフィル樹脂の剥離を抑制することができない。また、アンダーフィル樹脂の硬化物のＴｇが１００℃を超える場合にも、同様に、温度サイクル印加時のアンダーフィル樹脂の剥離を抑制することができない。なお、アンダーフィル樹脂の剥離抑制の観点では、樹脂硬化物のＴｇが低いほど効果がある。
アンダーフィル樹脂のＴｇの測定は、ＴＭＡ（熱機械分析）により行うことができる。ＴＭＡは、試料の温度を一定のプログラムによって変化させながら、圧縮、引張り、曲げ等の非振動的荷重を加え、その物質の変形を温度または時間の関数として測定する方法である。温度変化に対応して試料の熱膨張や軟化等の変形が起こると、変形に伴う変位量が、プローブの位置変化量として変位検出部で計測される。実施形態に記載されたＴｇは、ＴＭＡ法により測定されたものである。
なお、Ｔｇの測定は、ＤＭＡ（動的粘弾性測定）により行うことも可能である。
また、半導体チップ間に充填されるアンダーフィル樹脂には、熱膨張率をシリコンチップのそれに近づけるために、シリカ粉末等の無機充填材（フィラー）が含有されている。実施形態において、アンダーフィル樹脂に含有されるフィラーは、平均粒径が０．５μｍ未満で最大粒径が３．０μｍ以下のものである。フィラーの平均粒径は好ましくは０．４μｍ未満であり、さらに好ましくは０．３μｍ未満である。なお、平均粒径は、レーザー回折散乱法により測定されたものとする。
アンダーフィル樹脂に含有されるフィラーの平均粒径が０．５μｍ以上である場合には、フィラーによって狭い隙間へのアンダーフィル樹脂の流動が妨げられるため、実施形態のチップオンチップ型の半導体装置において、半導体チップ２ａ、２ｂ間の狭い隙間（５〜５０μｍ）にアンダーフィル樹脂が充填しにくく、ボイドや偏析がなく均一な組成のアンダーフィル層４を形成することが難しい。
アンダーフィル層は、チップオンチップ型の半導体装置に限らず、基板上にチップを搭載するフリップチップＢＧＡ（以下、ＦＣ−ＢＧＡと示す。）にも設けられる。そして、このようなＦＣ−ＢＧＡのアンダーフィル樹脂としても、アミン系硬化剤を含有し、硬化物のＴｇが１００℃以下のエポキシ系樹脂が使用されているが、そのような樹脂（以下、ＦＣ−ＢＧＡ用樹脂と示す。）は、実施形態で使用されるアンダーフィル樹脂に比べて、粒径の大きい（平均粒径０．５μｍ以上、最大粒径３μｍ以上）フィラー（シリカ粉末）を含有する。したがって、ＦＣ−ＢＧＡ用樹脂は、実施形態で使用されるアンダーフィル樹脂に比べて、流動性が悪い。そのため、従来からのＦＣ−ＢＧＡ用樹脂は、基板と半導体チップとの間の比較的広い隙間（５０〜７０μｍ）には充填可能であるが、実施形態の半導体装置１０における半導体チップ２ａ、２ｂ間の狭い隙間（５〜５０μｍ）には充填しにくく、未充填が発生した。
実施形態に使用されるアンダーフィル樹脂と従来からのＦＣ−ＢＧＡ用樹脂の流動性を調べた結果を、以下に記載する。なお、実施形態のアンダーフィル樹脂は、平均粒径が０．３μｍで最大粒径が３．０μｍのシリカ粉末を５０質量％の割合で含有する後述するアンダーフィル樹脂Ｇである。また、ＦＣ−ＢＧＡ用樹脂としては、アミン系硬化剤を含有し、平均粒径が０．６μｍで最大粒径が３．０μｍのシリカ粉末を５０質量％の割合で含有する、硬化物のＴｇが１００℃のエポキシ系樹脂を使用した。
（流動性の比較実験）
２枚のガラス板を２０μｍの隙間を作るように固定し、その隙間に実施形態のアンダーフィル樹脂とＦＣ−ＢＧＡ用樹脂をそれぞれ浸透させ、所定の距離（２０ｍｍ）だけ浸透するのに要する時間を測定した。なお、ガラス板は１１０℃に加熱した。
測定の結果、実施形態のアンダーフィル樹脂とＦＣ−ＢＧＡ用樹脂の充填時間はともに３００秒であり、同じであった。しかし、ＦＣ−ＢＧＡ用樹脂では、浸透後にフローマークが見られた。フローマークとは、樹脂中のフィラーや他の成分の偏析等によって、不均一になった部分が筋状に見えるものであり、樹脂の流動性が悪い場合に発生する。フローマークが発生すると、流動の先端形状が乱れ、浸透時にエアを巻き込んでボイドが発生し易くなるので好ましくない。この実験により、実施形態のアンダーフィル樹脂がＦＣ−ＢＧＡ用樹脂に比べて流動性が良好であることが確かめられた。
第１の実施形態の半導体装置１０において、半導体チップ積層体２は、以下に示すように配線基板１の上に搭載され、電気的に接続されている。半導体チップ積層体２の下段側の第１の半導体チップ２ａの下面が、配線基板１上にダイアタッチ材５により固定され、この第１の半導体チップ２ａの上面（素子回路面）の周辺部に配置された接続パッド２１ａと配線基板１の接続端子１ａとが、金線等のボンディングワイヤ６により接続されている。配線基板１の裏面には、はんだボール等により形成された外部接続用端子７が配設されている。
そして、半導体チップ積層体２、および半導体チップ積層体２と配線基板１との前記接続部の外側を覆うように、モールド樹脂の硬化物からなる封止層８が形成されている。
封止層８を構成するモールド樹脂としては、エポキシ系の樹脂が使用される。硬化物の物性値が以下に示す範囲のモールド樹脂を使用することが好ましい。なお、これらの物性値は、前記したＴＭＡの測定により得られた値とする。
Ｔｇ：１３０〜２００℃
Ｔｇ未満の温度における熱膨張率（ＣＴＥ1）：０．８〜１．４ｐｐｍ／℃
Ｔｇ以上の温度における熱膨張率（ＣＴＥ2）：３．０〜４．９ｐｐｍ／℃
弾性率：１５〜３０ＧＰａ
硬化物の物性値が前記範囲にあるモールド樹脂を使用した場合は、封止層８による熱応力の緩和効果が高く、特にパッケージ全体の反りを低減させるという優れた効果がある。
第１の実施形態においては、アミン系の硬化剤を含有し、硬化物のＴｇが６５℃以上１００℃以下のアンダーフィル樹脂によりアンダーフィル層４を構成することにより、温度サイクル印加時の第２の半導体チップ２ｂ側面でのアンダーフィル樹脂の剥離を抑制し、第１の半導体チップ２ａの内部配線の切断等の断線不良を防止することができる。
一般に、温度サイクル印加時のアンダーフィル樹脂の剥離は、半導体チップ（第２の半導体チップ２ｂ）の側面とアンダーフィル樹脂との間に働く引き剥がし応力に起因して発生すると考えられる。アンダーフィル樹脂の硬化物のＴｇを１００℃以下に下げることは、前記した引き剥がし応力の低減に効果がある。また、アンダーフィル樹脂にアミン系の硬化剤を含有させることは、半導体チップ側面へのアンダーフィル樹脂の密着力を増大させる効果がある。実施形態では、これら２つの効果を合わせることで、アンダーフィル樹脂の剥離を防止することができる。
なお、図1に示す第１の実施形態において、半導体チップ積層体２の上にさらに別の半導体チップ（メモリチップ等）を積層した構造とすることもできる。すなわち、半導体チップ積層体２の第２の半導体チップ２ｂの上に第３の半導体チップをフェイスアップ（素子回路面を上側）にして積層し、ダイアタッチ材等で固定するとともに、ボンディングワイヤにより接続した形態を採ることもできる。
次に、このような第１の実施形態の具体的な実施例について説明する。
実施例１〜１１、比較例１〜６
（アンダーフィル樹脂Ａ〜Ｌ）
まず、エポキシ系樹脂に、表１に示す粒径（平均粒径および最大粒径）のフィラー（シリカ粉末）を同表に示す配合割合（質量％）となるように混合し、さらに表１に示す硬化剤を添加・混合してなるアンダーフィル樹脂Ａ〜Ｌを用意した。
アンダーフィル樹脂Ａ〜Ｌについては、ＴＭＡによって求めたＴｇ、熱膨張率（ＣＴＥ1、ＣＴＥ2）および曲げ弾性率（２５℃）を、それぞれ表１に示す。なお、ＴＭＡ測定には、MAC SCIENCE社製の熱機械分析装置を用いた。
Figure 2012191062
（半導体装置の製造）
次に、第１の半導体チップ２ａと第２の半導体チップ２ｂとの間の隙間に充填する樹脂として、表１に示すＡ〜Ｌの各樹脂を使用し、さらに以下に示す物性値を有するａおよびｂの２種類のモールド樹脂を使用して封止層８を形成し、図１に示す半導体装置１０を製造した。モールド樹脂の物性値は、ＴＭＡ法により測定された値である。
なお、第１の半導体チップ２ａのサイズは７．５ｍｍ×７．１ｍｍ、第２の半導体チップ２ｂのサイズは５．９ｍｍ×５．２ｍｍであり、厚さはいずれも１５０μｍであった。また、これらの半導体チップ間を接続するバンプ３は、Ｓｎ−Ｃｕはんだバンプであり、バンプ径は３０μｍ、ピッチは６０μｍとした。モールド樹脂ａの物性値は、Ｔｇが１３０℃、ＣＴＥ1が０．８ｐｐｍ／℃、ＣＴＥ2が３．０ｐｐｍ／℃、２５℃における曲げ弾性率が３０ＧＰａであった。また、モールド樹脂ｂの物性値は、Ｔｇが２００℃、ＣＴＥ1が１．４ｐｐｍ／℃、ＣＴＥ2が４．９ｐｐｍ／℃、２５℃における曲げ弾性率が１５ＧＰａであった。
（信頼性試験）
実施例１〜１１および比較例１〜６で得られた半導体装置１０の信頼性を、温度サイクル試験（−５５℃／１２５℃）で確認した。これらの半導体装置１０に、−５５℃／１２５℃の温度サイクルを５００サイクル加えた後、第２の半導体チップ２ｂの側面とアンダーフィル樹脂との間の剥離の有無を、断面解析して調べた。結果を表２に示す。
Figure 2012191062
表２の結果から、実施例１〜１１においては、アミン系の硬化剤を含み、かつ硬化物のＴｇが６５℃以上１００℃以下であるアンダーフィル樹脂Ｂ〜Ｉを用いてアンダーフィル層４が形成されているので、温度サイクル試験（ＴＣＴ）でアンダーフィル層４の剥離が生じることがなく、信頼性の高い半導体装置１０が得られることが確かめられた。
（第２の実施形態）
図２は、第２の実施形態の半導体装置を示す断面図である。
図２に示す第２の実施形態の半導体装置１０は、一方の主面である表面（図２では上面）に配線回路を有し、裏面に金めっき等により形成された外部接続用端子７を有する配線基板１の表面に、第１から第４までの４個の半導体チップ２ａ、２ｂ、２ｃ、２ｄが互いに所定の間隔をおいて配置された半導体チップ積層体２が実装された構造を有する。なお、第１の半導体チップ２ａ、第２の半導体チップ２ｂ、第３の半導体チップ２ｃおよび第４の半導体チップ２ｄの厚さは、いずれも５０μｍ以下となっている。
配線基板１の表面には、金めっき層からなる接続端子１ａが形成され、この接続端子１ａの上に、最下段の半導体チップである第１の半導体チップ２ａが、第１のバンプ接続部３ａを介して接続されている。また、この第１の半導体チップ２ａの上に、第２の半導体チップ２ｂが配置されており、第２の半導体チップ２ｂと第１の半導体チップ２ａとは、第２のバンプ接続部３ｂを介して接続されている。また、第２の半導体チップ２ｂの上に第３の半導体チップ２ｃが配置され、第２の半導体チップ２ｂと第３の半導体チップ２ｃとは、第３のバンプ接続部３ｃを介して接続されており、さらに第３の半導体チップ２ｃの上に第４の半導体チップ２ｄが配置され、これらの半導体チップは第４のバンプ接続部３ｄを介して接続されている。
第２のバンプ接続部３ｂ、第３のバンプ接続部３ｃ、および第４のバンプ接続部３ｄでは、各半導体チップの下段側にＳｎ−Ａｇはんだ（融点２２１℃）やＳｎ−Ｃｕはんだ（融点２２７℃）等のはんだバンプが、上段側にＡｕ等のバンプがそれぞれ形成され、これらのバンプが接合一体化されている。バンプ径は５〜５０μｍで配列のピッチは１０〜１００μｍとなっている。
また、第１の半導体チップ２ａ、第２の半導体チップ２ｂおよび第３の半導体チップ２ｃには、それぞれ表裏を貫通するＴＳＶ（Through Silicon Via）と呼ばれるビア（図示を省略。）が設けられており、積層された第１の半導体チップ２ａから第４の半導体チップ２ｄまでが相互に電気的に接続されている。
そして、このようにバンプを介して接続された第１の半導体チップ２ａと配線基板１との隙間、および第１の半導体チップ２ａから第４の半導体チップ２ｄまでの各半導体チップ間の隙間には、それぞれ熱硬化性樹脂材料が充填されており、アンダーフィル層４が形成されている。アンダーフィル層４は、第１の実施形態と同様に、フィラーおよびアミン系の硬化剤を含有するエポキシ系樹脂（アンダーフィル樹脂）の硬化物から構成されており、この硬化物のＴｇは６５℃以上１００℃以下となっている。硬化物の好ましいＴｇは６５℃以上９５℃以下であり、より好ましいＴｇは６５℃以上９０℃以下である。アンダーフィル樹脂は、フィラーとして、平均粒径が０．５μｍ未満で最大粒径が３．０μｍ以下のシリカ粉末を含有することが好ましい。
アンダーフィル樹脂の充填は、第１の半導体チップ２ａから第４の半導体チップ２ｄまで４個の半導体チップを全て積層・配置した後、配線基板１と第１の半導体チップ２ａとの隙間、および各半導体チップ間の隙間に一括して充填してもよいし、あるいは、下段側から順に半導体チップを積層し、形成された隙間に順にアンダーフィル樹脂を充填してもよい。
半導体チップ積層体２は、配線基板１の接続端子１ａに第１のバンプ接続部３ａを介して接続され、さらに配線基板１の配線回路を通じて、裏面に形成された外部接続用端子７に接続されている。
そして、半導体チップ積層体２および半導体チップ積層体２と配線基板１との前記接続部の外側を覆うように、モールド樹脂の硬化物からなる封止層８が形成されている。モールド樹脂としては、硬化物が第１の実施形態と同様な物性値を有するエポキシ系樹脂の使用が好ましい。
このように構成される第２の実施形態においては、温度サイクル印加時に半導体チップ側面でのアンダーフィル樹脂の剥離を抑制することができる。
以上説明した少なくとも一つの実施形態によれば、チップオンチップ型の半導体装置において、アミン系の硬化剤を含有するエポキシ系樹脂の硬化物（Ｔｇが６５℃以上１００℃以下）でアンダーフィル層４を構成することにより、温度サイクル印加時に上段側の半導体チップ側面でのアンダーフィル樹脂の剥離を抑制することができ、信頼性を向上させることができる。
なお、本発明のいくつかの実施形態を説明したが、これらの実施形態は例として提示したものであり、発明の範囲を限定することは意図していない。これら新規な実施形態は、その他の様々な形態で実施し得るものであり、発明の要旨を逸脱しない範囲で、種々の省略、置き換え、変更を行うことができる。これら実施形態やその変形は、発明の範囲や要旨に含まれると共に、特許請求の範囲に記載された発明とその均等の範囲に含まれる。
１…配線基板、２…半導体チップ積層体、２ａ…第１の半導体チップ、２ｂ…第２の半導体チップ、２ｃ…第３の半導体チップ、２ｄ…第４の半導体チップ、３…バンプ、３ａ…第１のバンプ接続部、３ｂ…第２のバンプ接続部、３ｃ…第３のバンプ接続部、３ｄ…第４のバンプ接続部、４…アンダーフィル層、５…ダイアタッチ材、６…ボンディングワイヤ、７…外部接続用端子、８…封止層、１０…半導体装置。

Claims (5)

  1. 少なくとも一方の主面に配線層を有する配線基板と、
    前記配線基板の前記主面に実装された、２つ以上の半導体チップが所定の間隔をおいて重ねて配置され、かつ各半導体チップが互いにバンプを介して電気的に接続された半導体チップ積層体と、
    前記半導体チップ積層体の各半導体チップ間に充填された樹脂材料からなるアンダーフィル層と、
    前記半導体チップ積層体の外側に被覆・形成されたモールド樹脂の硬化物からなる封止層と
    を備えた半導体装置であり、
    前記アンダーフィル層は、アミン系の硬化剤を含む樹脂硬化物からなり、かつ前記樹脂硬化物のガラス転移温度（Ｔｇ）が６５℃以上１００℃以下であることを特徴とする半導体装置。
  2. 請求項１記載の半導体装置において、
    前記アンダーフィル層を構成する樹脂材料は、平均粒径が０．５μｍ未満の無機充填材を含有することを特徴とする半導体装置。
  3. 請求項１または２記載の半導体装置において、
    前記半導体チップ積層体を構成する各半導体チップ間の隙間が４０μｍ以下であることを特徴とする半導体装置。
  4. 請求項１ないし請求項３のいずれか１項記載の半導体装置において、
    前記半導体チップ積層体を構成する２つ以上の半導体チップの厚さが、いずれも３５０μｍ以下であることを特徴とする半導体装置。
  5. 請求項１ないし請求項４のいずれか１項記載の半導体装置において、
    前記モールド樹脂の硬化物は、Ｔｇが１３０〜２００℃で、Ｔｇ未満の温度における熱膨張率（ＣＴＥ1）が０．８〜１．４ｐｐｍ／℃、Ｔｇ以上の温度における熱膨張率（ＣＴＥ2）が３．０〜４．９ｐｐｍ／℃であり、曲げ弾性率が１５〜３０ＧＰａであることを特徴とする半導体装置。
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