TWI359492B - A method of manufacturing a semiconductor device - Google Patents

A method of manufacturing a semiconductor device Download PDF

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Publication number
TWI359492B
TWI359492B TW093130160A TW93130160A TWI359492B TW I359492 B TWI359492 B TW I359492B TW 093130160 A TW093130160 A TW 093130160A TW 93130160 A TW93130160 A TW 93130160A TW I359492 B TWI359492 B TW I359492B
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TW
Taiwan
Prior art keywords
semiconductor region
region
conductivity type
semiconductor
effect transistor
Prior art date
Application number
TW093130160A
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English (en)
Chinese (zh)
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TW200527652A (en
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Renesas Electronics Corp
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Publication date
Application filed by Renesas Electronics Corp filed Critical Renesas Electronics Corp
Publication of TW200527652A publication Critical patent/TW200527652A/zh
Application granted granted Critical
Publication of TWI359492B publication Critical patent/TWI359492B/zh

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
    • H01L21/76229—Concurrent filling of a plurality of trenches having a different trench shape or dimension, e.g. rectangular and V-shaped trenches, wide and narrow trenches, shallow and deep trenches
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0221—Manufacture or treatment of FETs having insulated gates [IGFET] having asymmetry in the channel direction, e.g. lateral high-voltage MISFETs having drain offset region or extended-drain MOSFETs [EDMOS]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/601—Insulated-gate field-effect transistors [IGFET] having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs 
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/601—Insulated-gate field-effect transistors [IGFET] having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs 
    • H10D30/603—Insulated-gate field-effect transistors [IGFET] having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs  having asymmetry in the channel direction, e.g. lateral high-voltage MISFETs having drain offset region or extended drain IGFETs [EDMOS]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6704—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device
    • H10D30/6713—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6757—Thin-film transistors [TFT] characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/124—Shapes, relative sizes or dispositions of the regions of semiconductor bodies or of junctions between the regions
    • H10D62/126—Top-view geometrical layouts of the regions or the junctions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/83—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0128—Manufacturing their channels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/013—Manufacturing their source or drain regions, e.g. silicided source or drain regions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0151—Manufacturing their isolation regions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H10P95/92—
    • H10W10/0143—
    • H10W10/17—
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0212—Manufacture or treatment of FETs having insulated gates [IGFET] using self-aligned silicidation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/113—Isolations within a component, i.e. internal isolations
    • H10D62/115—Dielectric isolations, e.g. air gaps
    • H10D62/116—Dielectric isolations, e.g. air gaps adjoining the input or output regions of field-effect devices, e.g. adjoining source or drain regions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/27—Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
    • H10D64/311—Gate electrodes for field-effect devices
    • H10D64/411—Gate electrodes for field-effect devices for FETs
    • H10D64/511—Gate electrodes for field-effect devices for FETs for IGFETs
    • H10D64/514—Gate electrodes for field-effect devices for FETs for IGFETs characterised by the insulating layers
    • H10D64/516—Gate electrodes for field-effect devices for FETs for IGFETs characterised by the insulating layers the thicknesses being non-uniform
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/62—Electrodes ohmically coupled to a semiconductor

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Element Separation (AREA)
TW093130160A 2003-11-14 2004-10-05 A method of manufacturing a semiconductor device TWI359492B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2003384654A JP4707947B2 (ja) 2003-11-14 2003-11-14 半導体装置

Publications (2)

Publication Number Publication Date
TW200527652A TW200527652A (en) 2005-08-16
TWI359492B true TWI359492B (en) 2012-03-01

Family

ID=34567341

Family Applications (1)

Application Number Title Priority Date Filing Date
TW093130160A TWI359492B (en) 2003-11-14 2004-10-05 A method of manufacturing a semiconductor device

Country Status (5)

Country Link
US (2) US7259054B2 (enExample)
JP (1) JP4707947B2 (enExample)
KR (1) KR20050046568A (enExample)
CN (2) CN100440482C (enExample)
TW (1) TWI359492B (enExample)

Families Citing this family (31)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7485925B2 (en) * 2005-08-30 2009-02-03 United Microelectronics Corp. High voltage metal oxide semiconductor transistor and fabricating method thereof
CN100490175C (zh) * 2005-09-13 2009-05-20 联华电子股份有限公司 高压金属氧化物半导体晶体管及其制造方法
JP4784739B2 (ja) * 2005-10-21 2011-10-05 セイコーエプソン株式会社 半導体装置
JP4784738B2 (ja) * 2005-10-21 2011-10-05 セイコーエプソン株式会社 半導体装置
JP4784737B2 (ja) * 2005-10-21 2011-10-05 セイコーエプソン株式会社 半導体装置
US8530355B2 (en) * 2005-12-23 2013-09-10 Infineon Technologies Ag Mixed orientation semiconductor device and method
US7687370B2 (en) * 2006-01-27 2010-03-30 Freescale Semiconductor, Inc. Method of forming a semiconductor isolation trench
KR100817084B1 (ko) * 2007-02-02 2008-03-26 삼성전자주식회사 고전압 트랜지스터 및 그 제조방법
US8072035B2 (en) 2007-06-11 2011-12-06 Renesas Electronics Corporation Semiconductor device and method of manufacturing the same
US8420488B2 (en) * 2007-09-11 2013-04-16 United Microelectronics Corp. Method of fabricating high voltage device
KR100954907B1 (ko) * 2007-12-21 2010-04-27 주식회사 동부하이텍 반도체 소자의 테스트 패턴 및 그 제조방법
JP5239548B2 (ja) * 2008-06-25 2013-07-17 富士通セミコンダクター株式会社 半導体装置及び半導体装置の製造方法
JP2010062182A (ja) * 2008-09-01 2010-03-18 Renesas Technology Corp 半導体集積回路装置
JP5147654B2 (ja) 2008-11-18 2013-02-20 パナソニック株式会社 半導体装置
KR20100064264A (ko) * 2008-12-04 2010-06-14 주식회사 동부하이텍 반도체 소자 및 이의 제조 방법
KR101606930B1 (ko) * 2008-12-30 2016-03-28 주식회사 동부하이텍 반도체소자 및 그 제조방법
CN101710586B (zh) * 2009-01-09 2011-12-28 深超光电（深圳）有限公司 提高开口率的储存电容及其制作方法
JP2011071325A (ja) * 2009-09-25 2011-04-07 Seiko Instruments Inc 半導体装置
JP2011096862A (ja) * 2009-10-30 2011-05-12 Hitachi Ltd 半導体装置及びその製造方法
US8222093B2 (en) * 2010-02-17 2012-07-17 GlobalFoundries, Inc. Methods for forming barrier regions within regions of insulating material resulting in outgassing paths from the insulating material and related devices
JP5734725B2 (ja) 2011-04-27 2015-06-17 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
US8716768B2 (en) * 2011-10-20 2014-05-06 Omnivision Technologies, Inc. Transistor with self-aligned channel width
JP5481526B2 (ja) * 2012-06-13 2014-04-23 ラピスセミコンダクタ株式会社 高耐圧電界効果トランジスタ
CN104425376A (zh) * 2013-08-28 2015-03-18 北大方正集团有限公司 Cmos管的制造方法及cmos管
JP6341802B2 (ja) * 2014-08-21 2018-06-13 ルネサスエレクトロニクス株式会社 半導体装置及び半導体装置の製造方法
US9831134B1 (en) 2016-09-28 2017-11-28 Taiwan Semiconductor Manufacturing Co., Ltd. Method of manufacturing a semiconductor device having deep wells
JP7156811B2 (ja) * 2018-03-26 2022-10-19 ラピスセミコンダクタ株式会社 半導体装置及び半導体装置の製造方法
CN110890421A (zh) * 2018-09-10 2020-03-17 长鑫存储技术有限公司 半导体器件
CN112825327B (zh) * 2019-11-21 2024-10-01 中芯国际集成电路制造(上海)有限公司 半导体结构及其形成方法
CN112349733B (zh) * 2020-09-09 2022-09-06 湖北长江新型显示产业创新中心有限公司 阵列基板、阵列基板的制造方法及显示装置
TW202433752A (zh) 2023-02-06 2024-08-16 聯華電子股份有限公司 具有埋入式絶緣結構組的電晶體

Family Cites Families (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4918026A (en) * 1989-03-17 1990-04-17 Delco Electronics Corporation Process for forming vertical bipolar transistors and high voltage CMOS in a single integrated circuit chip
US5047358A (en) * 1989-03-17 1991-09-10 Delco Electronics Corporation Process for forming high and low voltage CMOS transistors on a single integrated circuit chip
US5306652A (en) * 1991-12-30 1994-04-26 Texas Instruments Incorporated Lateral double diffused insulated gate field effect transistor fabrication process
JP3252569B2 (ja) * 1993-11-09 2002-02-04 株式会社デンソー 絶縁分離基板及びそれを用いた半導体装置及びその製造方法
JP3275569B2 (ja) * 1994-10-03 2002-04-15 富士電機株式会社 横型高耐圧電界効果トランジスタおよびその製造方法
JPH08316464A (ja) * 1995-05-19 1996-11-29 Sony Corp Ｍｏｓトランジスタおよびその製造方法
JPH09237829A (ja) * 1996-03-01 1997-09-09 Hitachi Ltd 半導体集積回路装置およびその製造方法
JPH1065153A (ja) 1996-08-15 1998-03-06 Fujitsu Ltd 半導体装置及びその製造方法
JPH10189762A (ja) * 1996-12-20 1998-07-21 Nec Corp 半導体装置およびその製造方法
TW395024B (en) * 1998-08-28 2000-06-21 United Microelectronics Corp The method to shape up a shallow trench for isolation in IC
US6063674A (en) * 1998-10-28 2000-05-16 United Microelectronics Corp. Method for forming high voltage device
JP2001144189A (ja) * 1999-11-17 2001-05-25 Nec Ic Microcomput Syst Ltd 半導体集積回路装置及びその製造方法
JP2001160623A (ja) 1999-12-02 2001-06-12 Nec Ic Microcomput Syst Ltd 半導体装置とその製造方法
JP2001313389A (ja) * 2000-05-01 2001-11-09 Seiko Epson Corp 半導体装置およびその製造方法
US6528850B1 (en) * 2000-05-03 2003-03-04 Linear Technology Corporation High voltage MOS transistor with up-retro well
JP2002170888A (ja) * 2000-11-30 2002-06-14 Hitachi Ltd 半導体集積回路装置およびその製造方法
US6501139B1 (en) * 2001-03-30 2002-12-31 Matrix Semiconductor, Inc. High-voltage transistor and fabrication process
KR100363101B1 (ko) * 2001-04-16 2002-12-05 페어차일드코리아반도체 주식회사 고내압 아이솔레이션 영역을 갖는 고전압 반도체 소자
JP2002343964A (ja) * 2001-05-18 2002-11-29 Denso Corp 半導体装置及びその製造方法
JP2005136169A (ja) * 2003-10-30 2005-05-26 Seiko Epson Corp 半導体装置およびその製造方法
US7091535B2 (en) * 2004-03-05 2006-08-15 Taiwan Semiconductor Manufacturing Company High voltage device embedded non-volatile memory cell and fabrication method

Also Published As

Publication number Publication date
TW200527652A (en) 2005-08-16
CN1953159A (zh) 2007-04-25
KR20050046568A (ko) 2005-05-18
CN100440482C (zh) 2008-12-03
US20080258236A1 (en) 2008-10-23
JP2005150331A (ja) 2005-06-09
US7592669B2 (en) 2009-09-22
CN1617353A (zh) 2005-05-18
US20050104098A1 (en) 2005-05-19
US7259054B2 (en) 2007-08-21
CN100463220C (zh) 2009-02-18
JP4707947B2 (ja) 2011-06-22

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