JP5734725B2 - 半導体装置およびその製造方法 - Google Patents
半導体装置およびその製造方法 Download PDFInfo
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- JP5734725B2 JP5734725B2 JP2011099386A JP2011099386A JP5734725B2 JP 5734725 B2 JP5734725 B2 JP 5734725B2 JP 2011099386 A JP2011099386 A JP 2011099386A JP 2011099386 A JP2011099386 A JP 2011099386A JP 5734725 B2 JP5734725 B2 JP 5734725B2
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Description
半導体装置においていわゆるスイッチングに用いられるMOS(Metal Oxide Semiconductor)トランジスタをより高耐圧の条件下で使用可能とするものである。
上記半導体装置は、高耐圧トランジスタを備える半導体装置である。上記高耐圧トランジスタは、主表面を有する半導体基板と、半導体基板の主表面上に形成される第1の不純物層と、第1の不純物層の内部に形成される第2の不純物層と、第2の不純物層を挟むように、第1の不純物層の内部に形成される1対の第3の不純物層と、1対の第3の不純物層のそれぞれの内部に形成される第4の不純物層と、少なくとも一方の第3の不純物層から、第2の不純物層の配置される方向へ、主表面に沿って突出するように、第1の不純物層の最上面から第1の不純物層の内部に形成される第5の不純物層と、第2の不純物層の少なくとも一部と平面的に重なるように、最上面の上方に形成される導電層とを備える。上記第4の不純物層における不純物濃度は、第3および第5の不純物層における不純物濃度よりも高く、第5の不純物層における不純物濃度は、第3の不純物層における不純物濃度よりも高い。上記第3、第4および第5の不純物層における不純物は導電型がp型の不純物であり、第2の不純物層における不純物は導電型がn型の不純物である。上記半導体基板と第1の不純物層との間にn型の埋め込み拡散層をさらに備えている。上記第2の不純物層は埋め込み拡散層に接している。
上記製造方法は、高耐圧トランジスタを備える半導体装置の製造方法である。上記製造方法においては、まず主表面を有する半導体基板が準備される。上記半導体基板の主表面上に第1の不純物層が形成される。上記第1の不純物層の内部に第2の不純物層が形成される。上記第2の不純物層を挟むように、第1の不純物層の内部に1対の第3の不純物層が形成される。上記1対の第3の不純物層のそれぞれの内部に第4の不純物層が形成される。少なくとも一方の第3の不純物層から、第2の不純物層の配置される方向へ、主表面に沿って突出するように、第1の不純物層の最上面から第1の不純物層の内部に第5の不純物層が形成される。上記第2の不純物層の少なくとも一部と平面的に重なるように、最上面の上方に導電層が形成される。上記第4の不純物層における不純物濃度は、第3および第5の不純物層における不純物濃度よりも高く、第5の不純物層における不純物濃度は、第3の不純物層における不純物濃度よりも高い。上記第3、第4および第5の不純物層における不純物は導電型がp型の不純物であり、第2の不純物層における不純物は導電型がn型の不純物である。上記半導体基板と第1の不純物層との間にn型の埋め込み拡散層がさらに形成される。上記第2の不純物層は埋め込み拡散層に接している。
(実施の形態1)
まず、本実施の形態としてチップ状態の半導体装置について説明する。
図8を参照して、図8の高耐圧MOSトランジスタは、拡散層OFB2が形成されていない点において、図5に示す本実施の形態の高耐圧MOSトランジスタと異なっている。
本実施の形態は、実施の形態1と比較して、エピタキシャル層の導電型において異なっている。以下、図31を用いて、本実施の形態について説明する。
本実施の形態は、実施の形態1と比較して、各構成要素の導電型などにおいて異なっている。以下、図32〜図34を用いて、本実施の形態について説明する。
本実施の形態は、実施の形態1と比較して、拡散層OFB2の構成において異なっている。以下、図35〜図37を用いて、本実施の形態について説明する。
Claims (10)
- 高耐圧トランジスタを備える半導体装置であり、
前記高耐圧トランジスタは、
主表面を有する半導体基板と、
前記半導体基板の前記主表面上に形成される第1の不純物層と、
前記第1の不純物層の内部に形成される第2の不純物層と、
前記第2の不純物層を挟むように、前記第1の不純物層の内部に形成される1対の第3の不純物層と、
前記1対の第3の不純物層のそれぞれの内部に形成される第4の不純物層と、
少なくとも一方の前記第3の不純物層から、前記第2の不純物層の配置される方向へ、前記主表面に沿って突出するように、前記第1の不純物層の最上面から前記第1の不純物層の内部に形成される第5の不純物層と、
前記第2の不純物層の少なくとも一部と平面的に重なるように、前記最上面の上方に形成される導電層とを備え、
前記第4の不純物層における不純物濃度は、前記第3および第5の不純物層における不純物濃度よりも高く、
前記第5の不純物層における不純物濃度は、前記第3の不純物層における不純物濃度よりも高く、
前記第3、第4および第5の不純物層における不純物は導電型がp型の不純物であり、前記第2の不純物層における不純物は導電型がn型の不純物であり、
前記半導体基板と前記第1の不純物層との間にn型の埋め込み拡散層をさらに備え、
前記第2の不純物層は前記埋め込み拡散層に接している、半導体装置。 - 少なくとも一方の前記第3の不純物層と、前記第2の不純物層とは、前記第5の不純物層により接続される、請求項1に記載の半導体装置。
- 1対の前記第3の不純物層の双方と、前記第2の不純物層とを接続するように、前記第5の不純物層が形成される、請求項1または2に記載の半導体装置。
- 1対の前記第3および第4の不純物層は、前記第2の不純物層に対して位置および形状が対称となるように配置される、請求項1〜3のいずれかに記載の半導体装置。
- 前記第5の不純物層における不純物濃度は、前記第2の不純物層における不純物濃度よりも高い、請求項1〜4のいずれかに記載の半導体装置。
- 前記導電層は、前記第5の不純物層の少なくとも一部と平面的に重なるように形成される、請求項1〜5のいずれかに記載の半導体装置。
- 前記第1の不純物層における不純物と前記第2の不純物層における不純物とは同一の導電型の不純物である、請求項1〜6のいずれかに記載の半導体装置。
- 前記第4の不純物層と前記第5の不純物層とは接していない、請求項1〜7のいずれかに記載の半導体装置。
- 高耐圧トランジスタを備える半導体装置の製造方法であり、
主表面を有する半導体基板を準備する工程と、
前記半導体基板の前記主表面上に第1の不純物層を形成する工程と、
前記第1の不純物層の内部に第2の不純物層を形成する工程と、
前記第2の不純物層を挟むように、前記第1の不純物層の内部に1対の第3の不純物層を形成する工程と、
前記1対の第3の不純物層のそれぞれの内部に第4の不純物層を形成する工程と、
少なくとも一方の前記第3の不純物層から、前記第2の不純物層の配置される方向へ、前記主表面に沿って突出するように、前記第1の不純物層の最上面から前記第1の不純物層の内部に第5の不純物層を形成する工程と、
前記第2の不純物層の少なくとも一部と平面的に重なるように、前記最上面の上方に導電層を形成する工程とを備え、
前記第4の不純物層における不純物濃度は、前記第3および第5の不純物層における不純物濃度よりも高く、
前記第5の不純物層における不純物濃度は、前記第3の不純物層における不純物濃度よりも高く、
前記第3、第4および第5の不純物層における不純物は導電型がp型の不純物であり、前記第2の不純物層における不純物は導電型がn型の不純物であり、
前記半導体基板と前記第1の不純物層との間にn型の埋め込み拡散層を形成する工程をさらに備え、
前記第2の不純物層は前記埋め込み拡散層に接している、半導体装置の製造方法。 - 前記第4の不純物層と前記第5の不純物層とは接していない、請求項9に記載の半導体装置の製造方法。
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2011099386A JP5734725B2 (ja) | 2011-04-27 | 2011-04-27 | 半導体装置およびその製造方法 |
TW101112512A TWI604514B (zh) | 2011-04-27 | 2012-04-09 | 半導體裝置及其製造方法 |
US13/451,145 US9064689B2 (en) | 2011-04-27 | 2012-04-19 | Semiconductor device and manufacturing method thereof |
CN201210131432.7A CN102760734B (zh) | 2011-04-27 | 2012-04-26 | 半导体器件及其制造方法 |
US14/746,831 US20150295045A1 (en) | 2011-04-27 | 2015-06-22 | Semiconductor device and manufacturing method thereof |
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JP6225511B2 (ja) * | 2013-07-02 | 2017-11-08 | セイコーエプソン株式会社 | 表示装置及び電子機器 |
DE102016000264B4 (de) | 2016-01-08 | 2022-01-05 | Infineon Technologies Ag | Halbleiterchipgehäuse, das sich lateral erstreckende Anschlüsse umfasst, und Verfahren zur Herstellung desselben |
US10319714B2 (en) * | 2017-01-24 | 2019-06-11 | Analog Devices, Inc. | Drain-extended metal-oxide-semiconductor bipolar switch for electrical overstress protection |
CN111613533B (zh) * | 2019-02-26 | 2024-04-30 | 上海积塔半导体有限公司 | 制作非对称低中压器件的方法及非对称低中压器件 |
US11749718B2 (en) * | 2021-03-05 | 2023-09-05 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor device and manufacturing method thereof |
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JP3270405B2 (ja) * | 1998-01-26 | 2002-04-02 | セイコーインスツルメンツ株式会社 | 半導体装置 |
KR20000014215A (ko) * | 1998-08-18 | 2000-03-06 | 김덕중 | 높은 신뢰도의 횡형 디모스 트랜지스터 및 그제조방법 |
JP3443355B2 (ja) * | 1999-03-12 | 2003-09-02 | 三洋電機株式会社 | 半導体装置の製造方法 |
JP3442009B2 (ja) * | 1999-09-24 | 2003-09-02 | 松下電器産業株式会社 | 高耐圧mosトランジスタの構造 |
JP3723410B2 (ja) * | 2000-04-13 | 2005-12-07 | 三洋電機株式会社 | 半導体装置とその製造方法 |
KR100374627B1 (ko) * | 2000-08-04 | 2003-03-04 | 페어차일드코리아반도체 주식회사 | 고내압 아이솔레이션 영역을 갖는 고전압 반도체 소자 |
JP2002231937A (ja) * | 2001-01-30 | 2002-08-16 | Sanyo Electric Co Ltd | 半導体装置とその製造方法 |
JP2002304154A (ja) * | 2001-04-03 | 2002-10-18 | Sanyo Electric Co Ltd | 表示装置及び表示装置駆動回路 |
KR100400007B1 (ko) | 2001-06-22 | 2003-09-29 | 삼성전자주식회사 | 전력 회수율을 개선한 플라즈마 디스플레이 패널 구동장치 및 방법 |
SE0104164L (sv) * | 2001-12-11 | 2003-06-12 | Ericsson Telefon Ab L M | Högspännings-mos-transistor |
US6621116B2 (en) * | 2001-12-20 | 2003-09-16 | Michael David Church | Enhanced EPROM structures with accentuated hot electron generation regions |
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KR100485910B1 (ko) * | 2003-06-20 | 2005-04-29 | 삼성전자주식회사 | 고내압 모스 트랜지스터 및 그 제조 방법 |
SE0302594D0 (sv) * | 2003-09-30 | 2003-09-30 | Infineon Technologies Ag | Vertical DMOS transistor device, integrated circuit, and fabrication method thereof |
US6924531B2 (en) * | 2003-10-01 | 2005-08-02 | Taiwan Semiconductor Manufacturing Company, Ltd. | LDMOS device with isolation guard rings |
JP4707947B2 (ja) | 2003-11-14 | 2011-06-22 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
US6960807B2 (en) * | 2003-11-25 | 2005-11-01 | Texas Instruments Incorporated | Drain extend MOS transistor with improved breakdown robustness |
US6873021B1 (en) * | 2003-12-02 | 2005-03-29 | Texas Instruments Incorporated | MOS transistors having higher drain current without reduced breakdown voltage |
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US7358567B2 (en) * | 2004-06-07 | 2008-04-15 | United Microelectronics Corp. | High-voltage MOS device and fabrication thereof |
JP2006040907A (ja) * | 2004-06-18 | 2006-02-09 | Seiko Instruments Inc | 半導体装置とその製造方法 |
JP4308096B2 (ja) * | 2004-07-01 | 2009-08-05 | パナソニック株式会社 | 半導体装置及びその製造方法 |
US7301185B2 (en) * | 2004-11-29 | 2007-11-27 | Taiwan Semiconductor Manufacturing Company, Ltd. | High-voltage transistor device having an interlayer dielectric etch stop layer for preventing leakage and improving breakdown voltage |
JP2006261639A (ja) * | 2005-02-16 | 2006-09-28 | Renesas Technology Corp | 半導体装置、ドライバ回路及び半導体装置の製造方法 |
US7344947B2 (en) * | 2006-03-10 | 2008-03-18 | Texas Instruments Incorporated | Methods of performance improvement of HVMOS devices |
KR20090072013A (ko) * | 2007-12-28 | 2009-07-02 | 주식회사 동부하이텍 | 수평형 디모스 트랜지스터 |
JP5272410B2 (ja) * | 2008-01-11 | 2013-08-28 | 富士電機株式会社 | 半導体装置およびその製造方法 |
JP5245157B2 (ja) | 2008-06-03 | 2013-07-24 | 独立行政法人産業技術総合研究所 | 半導体双方向スイッチング装置 |
CN101719513B (zh) * | 2009-11-26 | 2012-09-19 | 上海宏力半导体制造有限公司 | 30v双扩散mos器件及18v双扩散mos器件 |
JP5211132B2 (ja) * | 2010-10-08 | 2013-06-12 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
-
2011
- 2011-04-27 JP JP2011099386A patent/JP5734725B2/ja not_active Expired - Fee Related
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2012
- 2012-04-09 TW TW101112512A patent/TWI604514B/zh not_active IP Right Cessation
- 2012-04-19 US US13/451,145 patent/US9064689B2/en active Active
- 2012-04-26 CN CN201210131432.7A patent/CN102760734B/zh not_active Expired - Fee Related
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TWI604514B (zh) | 2017-11-01 |
CN102760734B (zh) | 2016-12-14 |
US20150295045A1 (en) | 2015-10-15 |
US9064689B2 (en) | 2015-06-23 |
JP2012231064A (ja) | 2012-11-22 |
TW201248698A (en) | 2012-12-01 |
US20120273900A1 (en) | 2012-11-01 |
CN102760734A (zh) | 2012-10-31 |
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