JP5239548B2 - 半導体装置及び半導体装置の製造方法 - Google Patents
半導体装置及び半導体装置の製造方法 Download PDFInfo
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- 239000004065 semiconductor Substances 0.000 title claims description 63
- 238000004519 manufacturing process Methods 0.000 title claims description 22
- 239000000758 substrate Substances 0.000 claims description 122
- 239000012535 impurity Substances 0.000 claims description 118
- 229910021332 silicide Inorganic materials 0.000 claims description 28
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 claims description 28
- 238000000034 method Methods 0.000 claims description 12
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 82
- 229910052710 silicon Inorganic materials 0.000 description 82
- 239000010703 silicon Substances 0.000 description 82
- 239000010410 layer Substances 0.000 description 72
- 238000010586 diagram Methods 0.000 description 33
- 230000015572 biosynthetic process Effects 0.000 description 24
- 230000005684 electric field Effects 0.000 description 20
- 230000015556 catabolic process Effects 0.000 description 18
- 230000006866 deterioration Effects 0.000 description 17
- 239000000969 carrier Substances 0.000 description 16
- 238000002955 isolation Methods 0.000 description 15
- 230000003071 parasitic effect Effects 0.000 description 11
- 238000010438 heat treatment Methods 0.000 description 10
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 8
- 230000000052 comparative effect Effects 0.000 description 8
- 238000005468 ion implantation Methods 0.000 description 6
- 150000002500 ions Chemical class 0.000 description 6
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 5
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 5
- 230000001133 acceleration Effects 0.000 description 5
- 229910052698 phosphorus Inorganic materials 0.000 description 5
- 239000011574 phosphorus Substances 0.000 description 5
- 229910052814 silicon oxide Inorganic materials 0.000 description 5
- 229910052581 Si3N4 Inorganic materials 0.000 description 4
- 238000005229 chemical vapour deposition Methods 0.000 description 4
- 229910017052 cobalt Inorganic materials 0.000 description 4
- 239000010941 cobalt Substances 0.000 description 4
- GUTLYIVDDKVIGB-UHFFFAOYSA-N cobalt atom Chemical compound [Co] GUTLYIVDDKVIGB-UHFFFAOYSA-N 0.000 description 4
- 229910052759 nickel Inorganic materials 0.000 description 4
- 238000000059 patterning Methods 0.000 description 4
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 4
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 3
- 230000003321 amplification Effects 0.000 description 3
- 229910052796 boron Inorganic materials 0.000 description 3
- 230000007423 decrease Effects 0.000 description 3
- 238000003199 nucleic acid amplification method Methods 0.000 description 3
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 3
- 229920005591 polysilicon Polymers 0.000 description 3
- 239000008186 active pharmaceutical agent Substances 0.000 description 2
- 230000005540 biological transmission Effects 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 238000002513 implantation Methods 0.000 description 2
- 239000011229 interlayer Substances 0.000 description 2
- 238000004151 rapid thermal annealing Methods 0.000 description 2
- 238000000926 separation method Methods 0.000 description 2
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- 230000003213 activating effect Effects 0.000 description 1
- 238000006731 degradation reaction Methods 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/0843—Source or drain regions of field-effect devices
- H01L29/0847—Source or drain regions of field-effect devices of field-effect transistors with insulated gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66568—Lateral single gate silicon transistors
- H01L29/66659—Lateral single gate silicon transistors with asymmetry in the channel direction, e.g. lateral high-voltage MISFETs with drain offset region, extended drain MISFETs
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7833—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's
- H01L29/7835—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's with asymmetrical source and drain regions, e.g. lateral high-voltage MISFETs with drain offset region, extended drain MISFETs
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/45—Ohmic electrodes
- H01L29/456—Ohmic electrodes on silicon
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/4916—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen
- H01L29/4925—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen with a multiple layer structure, e.g. several silicon layers with different crystal structure or grain arrangement
- H01L29/4933—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen with a multiple layer structure, e.g. several silicon layers with different crystal structure or grain arrangement with a silicide layer contacting the silicon layer, e.g. Polycide gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/665—Unipolar field-effect transistors with an insulated gate, i.e. MISFET using self aligned silicidation, i.e. salicide
Description
第1実施例において、図1から図7までの図は、n型MISトランジスタ50aの構造及びn型MISトランジスタ50aの製造方法を詳細に説明するものである。なお、MISトランジスタとは電界効果トランジスタのことをいう。
第2実施例において、図10から図15までの図は、n型MISトランジスタ50bの構造及びn型MISトランジスタ50bの製造方法を詳細に説明するものである。なお、第2実施例において、第1実施例で説明した構成と同様の構成には同一の符号を付し、説明を省略する。
2 素子分離領域
3 p型ウエル領域
4a、4b、4c、4d、4e レジスト層
5 第1ドレイン領域
6 ゲート絶縁膜
7 ゲート電極
8a 第1ソース領域
9 サイドウォール
10a 第2ドレイン領域
11a 第2ソース領域
12a 第3ドレイン領域
13 シリサイド層
21a 第1ソース領域
21b 第2ソース領域
22a 第2ドレイン領域
22b 第3ドレイン領域
50a n型MISトランジスタ(第1実施例)
50b n型MISトランジスタ(第2実施例)
51 携帯電子機器
52 送信モジュール
53 パワーアンプトランジスタ
53a パワーアンプトランジスタのゲート端子
53b パワーアンプトランジスタのソース端子
53c パワーアンプトランジスタのドレイン端子
54 アンテナ
60 活性領域
70 素子分離領域
80a、80b ソース領域
90a、90b ドレイン領域
Claims (6)
- 半導体基板上に形成されているゲート絶縁膜と、
前記ゲート絶縁膜上に形成されているゲート電極と、
前記ゲート電極に対し一方の側の前記半導体基板内に形成されている第1の不純物濃度を有する第1ソース領域と、
前記ゲート電極に対し他方の側に形成され、一端が前記ゲート電極の下方に入り込み、前記半導体基板内に形成されている第2の不純物濃度を有する第1ドレイン領域と、
前記半導体基板に形成され、底面及び側面が前記第1ドレイン領域と隣接し、前記半導体基板上の前記ゲート電極から第1距離だけ離間して位置する前記ゲート電極側の側面を有し、前記第2の不純物濃度よりも不純物濃度が高い第3の不純物濃度を有する第2ドレイン領域と、
前記半導体基板に形成され、底面及び側面が前記第2ドレイン領域と隣接し、前記半導体基板上の前記ゲート電極から前記第1距離より大きい第2距離だけ離間して位置する前記ゲート電極側の側面を有し、前記第3の不純物濃度よりも不純物濃度が高い第4の不純物濃度を有する第3ドレイン領域と、
前記ゲート電極上、前記ソース領域における前記半導体基板の表面上、前記第2ドレイン領域及び前記第3ドレイン領域における前記半導体基板の表面上に形成されたシリサイド層と、
を有することを特徴とする半導体装置。 - 前記第1ソース領域は、前記第1の不純物濃度よりも不純物濃度が高い第5の不純物濃度を有する第2ソース領域を更に有し、前記第1ソース領域の一端が前記ゲート電極の下方に入り込むように形成されていることを特徴とする請求項1記載の半導体装置。
- 前記第1ソース領域は前記半導体基板の第1の深さまで形成され、前記第2ソース領域は、前記半導体基板の前記第1の深さより深い第2の深さまで形成されていることを特徴とする請求項2記載の半導体装置。
- 前記第1ソース領域は前記半導体基板の第1の深さまで形成され、前記第2ソース領域は、前記半導体基板の前記第1の深さよりも浅い第2の深さまで形成されていることを特徴とする請求項2記載の半導体装置。
- 半導体基板を準備する工程と、
前記半導体基板内の第1領域に第1の不純物濃度を有する第1ドレイン領域を形成する工程と、
前記半導体基板上にゲート絶縁膜を形成する工程と、
前記第1ドレイン領域の一端に跨がるように前記ゲート絶縁膜を介してゲート電極を形成する工程と、
前記ゲート電極に対し、前記第1ドレイン領域に対し一方の側の前記半導体基板内に、第2の不純物濃度を有する第1ソース領域を形成する工程と、
前記半導体基板上及び前記ゲート電極の側壁上にサイドウォールを形成する工程と、
底面及び側面が前記第1ドレイン領域に隣接し、前記半導体基板上の前記ゲート電極から第1の距離だけ離間して位置する前記ゲート電極側の側面を有し、前記第1の不純物濃度よりも不純物濃度が高い第3の不純物濃度を有する第2ドレイン領域を、前記半導体基板に形成する工程と、
前記第1ソース領域に隣接し、前記第2の不純物濃度よりも不純物濃度が高い第4の不純物濃度を有する第2ソース領域を前記半導体基板に形成し、底面及び側面が前記第2ドレイン領域に隣接し、前記半導体基板上の前記ゲート電極から前記第1の距離より大きい第2の距離だけ離間して位置する前記ゲート電極側の側面を有し、前記第3の不純物濃度よりも不純物濃度が高い第5の不純物濃度を有する第3ドレイン領域を、前記半導体基板に形成する工程と、
前記ゲート電極上、前記第2ソース領域における前記半導体基板の表面上、及び前記第2ドレイン領域及び前記第3ドレイン領域における前記半導体基板の表面上に形成されたシリサイド層を形成する工程と、
を含むことを特徴とする半導体装置の製造方法。 - 前記ゲート電極に対し、前記第1ドレイン領域に対し前記一方の側の前記半導体基板内に、第2の不純物濃度を有する前記第1ソース領域を形成する前記工程は、前記第1ソース領域を前記半導体基板の第1の深さまで形成する工程であり、
前記第2ソース領域を形成し、前記第3ドレイン領域を形成する前記工程は、前記第2ソース領域を前記半導体基板の前記第1の深さよりも深い第2の深さまで形成する工程であることを特徴とする請求項5記載の半導体装置の製造方法。
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Families Citing this family (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2010023722A1 (ja) * | 2008-08-26 | 2010-03-04 | 富士通マイクロエレクトロニクス株式会社 | 半導体装置及びその製造方法 |
JP5926576B2 (ja) * | 2012-02-24 | 2016-05-25 | 旭化成エレクトロニクス株式会社 | 半導体装置及び半導体装置の製造方法 |
US8772870B2 (en) * | 2012-10-31 | 2014-07-08 | Freescale Semiconductor, Inc. | LDMOS device with minority carrier shunt region |
KR101467703B1 (ko) * | 2013-10-10 | 2014-12-02 | 매그나칩 반도체 유한회사 | 반도체 소자 및 그 제조 방법 |
US9508396B2 (en) * | 2014-04-02 | 2016-11-29 | Ememory Technology Inc. | Array structure of single-ploy nonvolatile memory |
US9245952B2 (en) * | 2014-05-12 | 2016-01-26 | Semiconductor Components Industries, Llc | Method of forming a semiconductor device and structure therefor |
US9978864B2 (en) * | 2015-12-03 | 2018-05-22 | Vanguard International Semiconductor Corporation | Semiconductor device and method for manufacturing the same |
US9853148B2 (en) * | 2016-02-02 | 2017-12-26 | Taiwan Semiconductor Manufacturing Company Ltd. | Power MOSFETs and methods for manufacturing the same |
US9966141B2 (en) * | 2016-02-19 | 2018-05-08 | Nscore, Inc. | Nonvolatile memory cell employing hot carrier effect for data storage |
JP6723775B2 (ja) * | 2016-03-16 | 2020-07-15 | エイブリック株式会社 | 半導体装置および半導体装置の製造方法 |
CN106206735B (zh) * | 2016-07-19 | 2019-12-10 | 上海华虹宏力半导体制造有限公司 | Mosfet及其制造方法 |
US20190122926A1 (en) * | 2017-09-08 | 2019-04-25 | Maxpower Semiconductor Inc. | Self-Aligned Shielded Trench MOSFETs and Related Fabrication Methods |
Family Cites Families (43)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE2802838A1 (de) * | 1978-01-23 | 1979-08-16 | Siemens Ag | Mis-feldeffekttransistor mit kurzer kanallaenge |
US4300150A (en) * | 1980-06-16 | 1981-11-10 | North American Philips Corporation | Lateral double-diffused MOS transistor device |
KR910006249B1 (ko) * | 1983-04-01 | 1991-08-17 | 가부시기가이샤 히다찌세이사꾸쇼 | 반도체 장치 |
US5217913A (en) * | 1988-08-31 | 1993-06-08 | Mitsubishi Denki Kabushiki Kaisha | Method of manufacturing an MIS device having lightly doped drain structure and conductive sidewall spacers |
US5146291A (en) * | 1988-08-31 | 1992-09-08 | Mitsubishi Denki Kabushiki Kaisha | MIS device having lightly doped drain structure |
US5254867A (en) * | 1990-07-09 | 1993-10-19 | Kabushiki Kaisha Toshiba | Semiconductor devices having an improved gate |
EP0481153B1 (en) * | 1990-10-16 | 1997-02-12 | Consorzio per la Ricerca sulla Microelettronica nel Mezzogiorno - CoRiMMe | Process for the accomplishment of power MOS transistors with vertical current flow |
US6081010A (en) * | 1992-10-13 | 2000-06-27 | Intel Corporation | MOS semiconductor device with self-aligned punchthrough stops and method of fabrication |
JPH06260497A (ja) * | 1993-03-05 | 1994-09-16 | Nippon Steel Corp | 半導体装置及びその製造方法 |
JP3050717B2 (ja) * | 1993-03-24 | 2000-06-12 | シャープ株式会社 | 半導体装置の製造方法 |
US5371394A (en) * | 1993-11-15 | 1994-12-06 | Motorola, Inc. | Double implanted laterally diffused MOS device and method thereof |
US5409848A (en) * | 1994-03-31 | 1995-04-25 | Vlsi Technology, Inc. | Angled lateral pocket implants on p-type semiconductor devices |
JP2715929B2 (ja) | 1994-08-18 | 1998-02-18 | 日本電気株式会社 | 半導体集積回路装置 |
JPH08148679A (ja) * | 1994-11-21 | 1996-06-07 | Hitachi Ltd | 半導体集積回路装置およびその製造方法 |
KR0161398B1 (ko) * | 1995-03-13 | 1998-12-01 | 김광호 | 고내압 트랜지스터 및 그 제조방법 |
US5719424A (en) * | 1995-10-05 | 1998-02-17 | Micron Technology, Inc. | Graded LDD implant process for sub-half-micron MOS devices |
US5719425A (en) * | 1996-01-31 | 1998-02-17 | Micron Technology, Inc. | Multiple implant lightly doped drain (MILDD) field effect transistor |
US5763916A (en) * | 1996-04-19 | 1998-06-09 | Micron Technology, Inc. | Structure and method for improved storage node isolation |
US6225174B1 (en) * | 1996-06-13 | 2001-05-01 | Micron Technology, Inc. | Method for forming a spacer using photosensitive material |
JP3369862B2 (ja) * | 1996-09-25 | 2003-01-20 | 三洋電機株式会社 | 半導体装置の製造方法 |
US6207994B1 (en) * | 1996-11-05 | 2001-03-27 | Power Integrations, Inc. | High-voltage transistor with multi-layer conduction region |
US6236085B1 (en) * | 1996-11-11 | 2001-05-22 | Denso Corporation | Semiconductor memory device having high-concentration region around electric-field moderating layer in substrate |
JPH10256539A (ja) * | 1997-03-10 | 1998-09-25 | Fujitsu Ltd | 半導体装置及びその製造方法 |
US6198131B1 (en) * | 1998-12-07 | 2001-03-06 | United Microelectronics Corp. | High-voltage metal-oxide semiconductor |
JP4068746B2 (ja) * | 1998-12-25 | 2008-03-26 | 株式会社ルネサステクノロジ | 半導体集積回路装置 |
JP2000195872A (ja) * | 1998-12-28 | 2000-07-14 | Fujitsu Quantum Device Kk | 半導体装置及びその製造方法 |
JP2001024184A (ja) * | 1999-07-05 | 2001-01-26 | Fuji Electric Co Ltd | 絶縁ゲートトランジスタおよびその製造方法 |
JP3831598B2 (ja) * | 2000-10-19 | 2006-10-11 | 三洋電機株式会社 | 半導体装置とその製造方法 |
JP4030269B2 (ja) * | 2001-03-06 | 2008-01-09 | 三洋電機株式会社 | 半導体装置とその製造方法 |
JP4094376B2 (ja) | 2002-08-21 | 2008-06-04 | 富士通株式会社 | 半導体装置及びその製造方法 |
JP4945055B2 (ja) * | 2003-08-04 | 2012-06-06 | ルネサスエレクトロニクス株式会社 | 半導体装置およびその製造方法 |
JP4707947B2 (ja) * | 2003-11-14 | 2011-06-22 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
US7011998B1 (en) * | 2004-01-12 | 2006-03-14 | Advanced Micro Devices, Inc. | High voltage transistor scaling tilt ion implant method |
FR2871294A1 (fr) * | 2004-06-07 | 2005-12-09 | St Microelectronics Sa | Procede de realisation d'un transistor dmos de taille reduite, et transistor dmos en resultant |
JP2006080175A (ja) * | 2004-09-08 | 2006-03-23 | Citizen Watch Co Ltd | 半導体装置およびその製造方法 |
JP4907070B2 (ja) * | 2004-09-10 | 2012-03-28 | ルネサスエレクトロニクス株式会社 | 半導体装置およびその製造方法 |
JP4854955B2 (ja) * | 2004-12-10 | 2012-01-18 | ルネサスエレクトロニクス株式会社 | 半導体装置及びその製造方法 |
US7109562B2 (en) * | 2005-02-07 | 2006-09-19 | Leadtrend Technology Corp. | High voltage laterally double-diffused metal oxide semiconductor |
US7105412B1 (en) * | 2005-03-22 | 2006-09-12 | United Microelectronics Corp. | Silicide process utilizing pre-amorphization implant and second spacer |
JP5001522B2 (ja) * | 2005-04-20 | 2012-08-15 | ルネサスエレクトロニクス株式会社 | 半導体集積回路装置の製造方法 |
JP2007027622A (ja) | 2005-07-21 | 2007-02-01 | Matsushita Electric Ind Co Ltd | 半導体装置およびその製造方法 |
JP4713415B2 (ja) * | 2006-07-13 | 2011-06-29 | Okiセミコンダクタ株式会社 | 半導体素子 |
JP4601603B2 (ja) * | 2006-12-27 | 2010-12-22 | ルネサスエレクトロニクス株式会社 | パワーmisfet、半導体装置およびdc/dcコンバータ |
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2008
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