TWI353637B - An ultralow dielectric constant material as an int - Google Patents

An ultralow dielectric constant material as an int Download PDF

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TWI353637B
TWI353637B TW100109312A TW100109312A TWI353637B TW I353637 B TWI353637 B TW I353637B TW 100109312 A TW100109312 A TW 100109312A TW 100109312 A TW100109312 A TW 100109312A TW I353637 B TWI353637 B TW I353637B
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Taiwan
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layer
insulating material
dielectric
material layer
hydrogen
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TW100109312A
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TW201130048A (en
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Stephen M Gates
Alfred Grill
David Medeiros
Deborah A Neumayer
Son Van Nguyen
Vishnubhai V Patel
Xinhui Wang
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Ibm
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Description

1353637 美國專利號 6,312,793、6,441,491、6,541,398 及 6,479,110 B2描述一多相(muitiphase)低k介電材料,係由石夕、碳’、氧 及氫元素組成之一基質相(matrixphase),以及主要由碳與氫 組成之另一相所構成。前述專利揭示之介電材料,1介; 不大於3.2。 ~ 美國專利號6,437,443描述一低k介電材料,具二個戋更 ^目’其中第一相由一 SiC0H材料形成。此低k ^電材料的 提供在一電漿加強化學氣相沉積(PECVD)腔體中,藉由將 夕:炭、氧及氫的第一前驅氣體,與至少-第二i驅氣 體反應’紅前喊體主要含有碳、氫原子並視需要含 氮及氧。 八管已有眾多低^電材料被揭示,仍持續需要研發一種 w電材料,介電常數不大於2 5,且在 製程溫度T具域力無安親。 ⑽1触使用之 【發明内容】 介電綠’以製造介數不大於2.5的一超低 亦即超低10材料。本發明提供之超低k材料更佳 2二二,約1,5至約2·5,且最佳的介電常數為約U至約 .。/思'除非特別聲明,所有的介電常數皆相對於真空而言。 本發明亦提供一方法以製造包含矽、碳、 材料’其係源自至少二種前驅物的混合,其中第 / R,,及口^雄邱)衍生物’具分子式&職”R,,,,R、 可以相同或不同,且係選自氫、烧基(a_及烷 1353637 氧基(alkoxy)。較佳的R、R’、R”及R’’’係相同的或不同的,且 係甲基(methyl)、乙基(ethyl)、甲氡基(methoxy)及乙氧基 (ethoxy)。較佳的第一前驅物包括但不限於:二乙氧基二曱基 石夕炫·(diethoxydimethyl silane)、二乙氧基曱基石夕烧 (diethoxymethylsilane,DEMS)、乙氧基三曱基石夕烧 (ethoxyltrimethylsilane) 、乙氧基二甲基矽烧 (ethoxydimethylsilane)、二甲氧基二曱基矽烷 (dimethoxydimethylsilane)、二甲氧基曱基石夕烧 (dimethoxymethylsilane)、三乙氧基矽烷(triethoxysilane)及三甲 氧基甲基石夕烧(trimethoxymethylsilane)。 本發明使用之第二前驅物係一有機化合物,選自:
Rl\ /R3 烯烴(alkenes) : r2 r4 ;
快烴(alkynes): ^(ethers): R1—=—R2
;及
環氧乙烧類(oxiranes): R1、R2、R3、R4、R5及R6可為相同或不同,且係選自線 性的、分枝的、環狀的、多環的氫、烷基、烯(alkenyl)或烯基 (alkenyl group),且可被含有氧、氮或氟的各取代基官能化。 1353637 較佳的第二前驅物包括但不限於:環氧乙烧(ethylene oxide)、 環氧丙烧(propylene oxide)、環戊稀氧化物(cyclopentene oxide)、環氧異丁烧(isobutylene oxide)、2,2,3-三甲基環氧乙院 (2,2,3-trimethyloxirane)、丁二烯氧化物(butadienemonoxide)、 雙環庚二烯(bicycloheptadiene)、1,2-環氧-5-己稀 (l,2-epoxy-5-hexene) 、2-甲基-2-乙稀環氧乙院 (2-methyl-2-vinyloxirane) 、1-異丙環丁 -1,3-二烤 (l-isopropyl-cyclohexa-l,3-diene)及甲基第三 丁基醚 (tertbutylmethylether) ° 含矽烷衍生物之第一前驅物與第二有機前驅物的結合使 用’可有效地於氫化矽碳氧化物(SiCOH)基體中形成一孔洞 相’且氫化矽碳氧化物(SiCOH)薄膜之製備成本也較使用習知 之前驅物低。 含石夕烧衍生物之第一前驅物與第二有機前驅物的結合使 用’能使一多孔洞氫化石夕碳氧化物(SiC0H)介電質的伸張應力 降低(reduced tensile stress )。 本發明更提供一方法’在一平行平板式電漿加強式化學氣 相沉積(PECVD)反應器中,製造一超低k介電質,也提供 一方法製造一超低k材料,在電子結構之一後段製程(BE〇L) 内連線結構中,用作一層内或層間介電質。 在另一方面,本發明也提供一熱穩定超低匕材料,其具低 内應力’且介電常數不大於約2 5。超低k材料更佳的介電常 數約1.5至約2.5,域佳的介電常數約18至約2 25。 然而,在另一方面,本發明提供一電子結構,含有數層絕 緣材料,以在一後段製程(BE0L)線路結構中用作層内或層 間介電質’其中至少有兩層絕緣材料包含本發明之一超低k材 料。 再者本發明長^供一電子結構,其具數層本發明之超低k =料,以在一後段製程(BE0L)線路結構中用作層内或層間 介電質,且更包含至少一層介電帽蓋層(didectriccaplayer), 用作一反應式離子蝕刻(reactive i〇n etch,反^)停止層或一 化學機械研磨(chemicai_mechanicai p〇iish)停止層或一擴散 阻障層(diffusion barrier .layer )。 根據本發明的一種製造熱穩定介電材料的方法,此熱穩定 介=料具-基體’係包含n氧及氫原子,且提供一原 子級奈米多孔性(atomic level nan〇p〇r〇sity>在一較佳實施例 中’此介電材料具有主要由石夕、碳、氧及氫所構成之一基體。 ,發明更提供製造介電㈣的—方法,藉由將含碎、碳、氧及 虱,子之3石夕第一如驅氣體,與至少一含碳、氫原子及選擇性 的,、氟、及氮之含有機第二前驅氣體反應,在一電漿加強化 學氣相沉積(PECVD)反應器中。本發明之介電材料且一傅 利葉轉換紅外線(FTIR)光譜,其具一矽_氧吸收'頻帶 (absorptionband),可被解迴旋(deconv〇iuted)成三個蜂值。 ,發明更提供-電子結構(即基板(substfate)),具數層絕緣材 ^ ’以在一後段製程(BE〇L)線路結構中用作層内或層間介 電質,其中之絕緣材料可以是本發明之超低k薄膜。 在一較佳實施例中,提供製造一熱穩定超低k薄膜的方 1353637 法,包含下列步驟:提供一電漿加強化學氣相沉積(pECVD) 反應盗,在反應器中置入一電子結構(亦即基板);流入一包 含矽、碳、氧及氫原子之含矽第一前驅氣體至反應器中;流入 包含碳、氫原子及視需要的氧、氟及氮之含有機的一第二前驅 混合氣體至反應器中;以及在此基板上沉積一超低k薄膜。 較佳的第一前驅物選自石夕烧(silane,SiH4)衍生物,具分子 式SiRR’R’’R’’’,R、R’、R”及R,,,可以相同或不相同 ,且係選 自風、烧基(alkyl)及烧氧基(alkoxy),較佳的是曱基(methyl)、 乙基(ethyl)、甲氧基(methoxy)及乙氧基(ethoxy)。較佳的前驅 物包括·二乙軋基二甲基石夕烧(diethoxydimethylsilane)、二乙氧 基甲基矽烷(diethoxymethylsilane,DEMS)、乙氧基三曱基矽烧 (ethoxyltrimethylsilane)、乙氧基二曱基石夕烧 (ethoxydimethylsilane)、二甲氧基二曱基矽烷 (dimethoxydimethylsilane)、二甲氧基曱基石夕烧 (dimethoxymethylsilane)、三乙氧基矽烧(triethoxysilane)及三甲 氧基甲基矽烧(trimethoxymethylsilane)。 本發明使用之第二前驅物係一有機化合物,選自: 稀烴(alkenes) : R\=/R ; r2/ \r4 炔烴(alkynes) : r1 一=一Rz ; r' r4 醚(ethers) : R2-^o-^R5 ;及 R3 R6 -10· 1353637
環氧乙烧(oxiranes)類: 1^、112、113、尺4、尺5及116可為相同或不同,且係選自線 性的 '分枝的、環狀的、多環的氫、烷基、烯(alkenyl)或烯基 (alkenyl group) ’且可被含有氧、氮或氟的各取代基官能化。 較佳的第二前驅物包括環氧乙烧(ethylene oxide)、環氧丙烧 (propylene oxide)、環戊稀氧化物(cyclopentene oxide)、環氧異 丁烧(isobutylene oxide)、2,2,3-三甲基環氧乙烷 (2,2,3-trimethyloxirane)、丁二烯氧化物(butadienemonoxide)、 雙環庚二烯(bicycloheptadiene)(又名2,5-降冰片二浠 (2,5-11〇1'1)〇111&<^116))、1,2_環氧-5-己烯(1,2-6卩〇父>^5-116父6116)、2-甲基-2-乙缔環氧乙烧(2-methyl-2-vinyloxirane)、1 -異丙-環丁 -1,3-二烯(l-iSOpr〇py^CyCi〇hexa-l,3-diene)及曱基第三丁基鍵 (tertbutylmethylether) ° 本發明之沉積薄膜視需要可在不低於約300°C的溫度熱處 理’歷時(timeperiod)至少約0.25小時。另一種方式是,可 用紫外光(UV)或電子束(e-beam)處理本發明之沉積薄膜, 如美國專利申請號10/758,724中所述為例,其整體之内容於文 中納入作為參考。 本發明的方法可更包含提供一平行平板式反應器之步 驟’其—基板卡盤(chuck)具一區域約300cm2至800cm2, 且在基板與一上電極間具一間隙(gap)約lcm至約10cm。 另—種方式是,一多站(multi-station)反應器也可以用於 -11- 此溥膜之沉積。施加-高頻RP電力於其中一個電極,頻率約 12MHz (祕)至15MHz。可視需要施加一額外的低頻電力 於其中-個電極’該電力之頻率例如為2MHZ或更低 (350-450iCHz(千赫))。 熱處理步驟可在不高於約3〇〇°c的溫度下實行,歷時—第 厂時間週期’接著在不低_ 38(rc的溫度,歷時—第二時間 週期’第二時間週期較第一時間職長。第二時間週期可至少 是第-時間聊的約1G倍。可視需要藉由暴露輻射或 電子束熱處理薄膜’例如美國專利申請號10/758,724中所述。 本發明之超低k薄膜的沉積步驟,可更包含下列步驟:設 定基板溫度從約25°C至約400。(:;設定高頻RF電力密度為約 0.05W/cm2 (瓦/平方公分)至約3 5 w/cm2 ;設定第一前驅物 流量^〇\¥以(6)為約5似111(每分鐘標準毫升)至約1〇〇〇似111; 设定第二前驅物流量為約5 seem至約1 〇〇〇sccm ;設定載子氣 體(carrier gas)氦流量為〇sccm至i〇〇〇sccm ;以及設定反應 器壓力為約50mtorr (晕托)至約8000mtorr。視需要加入一超 低頻電力於電漿,約〗〇W至約300W。 在另一較佳實施例令,提供製造一超低k薄膜的方法,包 含下列步驟:提供一具電漿加強的平行平板式化學氣相沉積 (chemical vapor d印osition )反應器;置入一預處理 (pre-processed)晶圓於一基板卡盤上,其具一區域從約 300cm2至約800cm2,且在晶圓與一上電極間維持一間隙從約 lem至約l〇cm ;流入一包含矽烧衍生物分子的第一前驅氣體 至反應器中’其具分子式SiRR,R,,R,,,,其中R、R,、R”及R,,, 12 B53637 係相同的或不同的’且係選自氫、烷基(alkyl)及烷氧基 (alkoxy),R、R’、R”及R”’每個皆獨立地為甲基(methyl)'乙 基(ethyl)、甲氧基(methoxy)或乙氧基(ethoxy);流入至少一第 二前驅氣體,包含有機分子自化合物群包括
Rl\ .R3 稀烴(alkenes) : 4 ; 炔烴(alkynes) : Rl—=一R2 ; 鍵(ethers) : ;及 環氧乙烧類(oxiranes) : R^/-\-R3 . R2 R4 ’ R1、R2、R3、R4、R5及R6可為相同或不同,且係選自線 性的、分枝的、環狀的、多環的氫、烷基、烯(alkenyl)或烯基 φ (alkenyl group),且可被含有氧、氮或氟的各取代基官能化; 且沉積一超低k薄膜在晶圓上。 此製程在沉積步驟後,可更包含熱處理薄膜的步驟,在不 低於約300C的溫度,歷時至少約〇25小時,或者在沉積後, W或電子束處理薄膜的步驟。㈣程更包含施加一虾能源 於晶,步=。熱處理步驟可更被實行在不高於約·。c的溫 ^歷日f第-時間職,且接著在不低於約獨。C的溫度, t厂第二時間週期’第二時間週期較第一時間週期長。第二 時間週期可至少是第—時間週期的約10倍。 -13· 1353637 所使用的矽烷衍生物前驅物可以是二乙氧基甲基矽烷 (diethoxymethylsilane,DEMS),且有機前驅物可以是雙環庚二 婦(bicycloheptadiene ’ BCHD)。超低k薄膜的沉積步驟可更包 含下列步驟:設定晶圓溫度約25^至約400°C ;設定一 RF能 源密度約〇.〇5W/cm2至約3.5W/cm2 ;設定矽烷衍生物流量約 5sccm至約lOOOsccm ;設定有機前驅物流量從約5sccm至約 lOOOsccm ;設定載子氣體氧流量從Osccm至lOOOsccm ;以及 設定反應器壓力從約50mtorr至約8000mtorr。此外,沉積步 驟可更包含設定雙環庚二烯(bicy cloheptadiene)對二乙氧基曱 基矽烷(diethoxymethylsilane)的流量比(flowrati〇)約 〇.1 至約 3,較佳為0.2至0.6。基板卡盤的傳導區域可藉由一因子X來 改變’藉由相同的因子X也會導致RF能源的改變。 然而,在另一較佳實施例中,提供製造一熱穩定超低匕介 電薄膜的方法,包含下列步驟:提供一平行平板式電漿加強化 學氣相沉積(PECVD)反應器;置入一晶圓於一基板卡盤上, 其具一傳導區域從約300 cm2至約800 cm2,且在晶圓與一上 電極間維持約lcm至約l〇cm 一間隙;流入前述矽烷衍生物與 有機分子的一前驅混合氣體至反應器中的晶圓上方,其溫度維 持從約25 C至約400°C,總流量約25sccm至約lOOOsccm,維 持反應器壓力在約lOOmtorr至約80〇〇mtorr ;沉積一介電薄膜 在晶圓上’ RF能源密度約〇.25W/Cm2至約3w/cm2 ;以及視需 要退火(annealing)此超低k薄膜在不低於約3⑻。c的溫度, 歷時至少約0.25小時。 。本發明的方法更包含—退火薄膜的步驟,係在不高於約 300 C的溫度’歷時一第-b夺間週期,且接著在不低於約38〇 -14- 1353637 一Λ二4間週期,其中第二時間週期較第-時 ^週』長。苐週期可被設定至少是第— 〇倍。錢衍生物可以是:乙氧基甲基石夕烧 (chethoxymethylsilane ’ DEMS),且有機前驅物可以是雙環庚二
本發明更指向-電子結構’其絲魏緣材料,以在一後 奴製程(BEOL)内連線結構中用作層内或層間介電質,内連 ,結構包括-預處理半導體基板,其具一第一金屬區:嵌在一 第絕緣材料層中’ -第-導體區域嵌在本發明超低k介電質 之一第二絕緣材料層中,本發明超低k介電質包含矽、碳氧 及氫,以及多樣性奈米級孔洞,且具一介電常數不大於約2 5 ; 第二絕緣材料層與第一絕緣材料層緊密接觸( 咖第-導舰域與第-金輕域電 communication);第二導體區域與第一導體區域電相連,且被 嵌入含本發明超低k介電質之一第三絕緣材料層中,第三絕緣 材料層與弟二絕緣材料層緊密接觸。此電子結構可更包^^一介
電帽蓋層,位在第二絕緣材料層與第三絕緣材料層之間。此電 子結構可更包含一第一介電帽蓋層,在第二絕緣材料層與第三 絕緣材料層之間,且一第二介電帽蓋層在第三絕緣材料層頂 上。 介電帽材料可以選自氧化碎(silicon oxide )、氮化石夕 (silicon nitride)、氮氧化石夕(silicon oxynitride)、氮碳化石夕(silicon carbon nitride ’ SiCN)、亂氧碳化發(silicon carbon oxynitride, SiCON)、而十火金屬石夕氮化物(refractory metal silicon nitride)(其 中之耐火金屬(refractory metal)係選自由钽(Ta)、鍅(Zr)、铪(Hi) -15- 1353637 及鎢(\\〇構成的群組)、碳化石夕(仙0011(^|)此)、摻雜碳的氧化 物(carbon doped oxide)或氫化矽碳氧化物(SiCOH)及其氫化化 &物(hydrogenated compounds)。第一與第二介電帽蓋層可選自 相同的介電材料群組。第一絕緣材料層可為氧化矽或氮化矽或 這些材料的摻雜變體’例如磷矽玻璃(phosph〇ms smeate glass ’ PSG)或爛鱗石夕玻璃(b0r0I1 phosphorus silicate glass, BPSG)。此電子結構可更包括一介電材料之一擴散阻障層,沉 積在絕緣材料第二與第三層之至少其中之一。此電子結構可更 包含一介電質,在第二絕緣材料層頂上,其用作一反應式離子 蝕刻(RIE)硬罩與研磨停止層,以及一介電擴散阻障層在此 介電反應式離子蝕刻硬罩與研磨停止層頂上^此電子結構可更 包含一第一介電反應式離子蝕刻硬罩/研磨停止層在此第二絕 緣材料層頂上,一第一介電反應式離子蝕刻硬罩/擴散阻障層 在此第一介電研磨停止層頂上,一第二介電反應式離子蝕刻硬 罩/研磨停止層在此第三絕緣材料層頂上,以及一第二介電擴 散阻障層在此第二介電研磨停止層頂上。此電子結構可更包含 與以上所提有相同材料之一介電帽蓋層,在超低^^介電質之一 層間’I電為與超低k介電質之一層内介電質之間。 、 【實施方式】 本發明揭示在一平行平板式電漿加強化學氣相沉 (PECVD)反應器巾,製造—_定超低介電f數薄膜的方 法。在健實施射揭示含有—氫化魏氧化物(hydfGgenated oxKhzedsiHccm carbon ’ SiCOH)材料為主體的一材料’包含在 -隨機共價麟(mndGmGGvalentlybGnded)晴㈣、碳、 氧及氫’且具不大於2·5的—介電常數,其更可含有分子級* 隙(m〇leCularscalevoids)’直徑約 〇 5 至2〇 奈米(__时s), -16- 1353637 =Η常數值降至約2·0以下。更佳之超低k薄膜的介電常 數約1·5至約2.5 ’且最佳的介電常數約! 8至約2〜 之超低k介電材料典型之特徵在於具一多相薄膜,其包括:^ 一相,主要由矽、碳、氧及氫構成;—第 構成之;以及多樣性奈米級孔洞。
、相,主要由碳與氫 要產生-超低k熱穩定薄膜,需要有一特定幾何形狀的沉 積反應器,以及特定的成長條件。舉例而言,在平行平板式反 應器中’基板卡盤的一傳導區域應約為300cm2至約_ cm2, 基板與一上電極間應具一間隙為約lcm至約1〇cm。施加一即 能源於基板。根據本-發明,超低k薄膜係形成自一矽烷衍生 物,例如二乙氧基甲基矽烷(DEMS)與一第二前驅物的混合, 第二前驅物係一有機分子,選自以下各化合物組成之群組:
稀煙(alkenes):
快烴(alkynes): 謎(ethers): R1—^-R2
;及 環氧乙烧類(oxiranes):
其中,R1、R2、R3、R4、R5及R6可為相同或不同,且係 選自線性的、分枝的、環狀的、多環的氫、烷基、烯(alkenyl) 或烯基(alkenyl group),且可被含有氧、氮或II的各取代基官 •17- 1353637 月匕化’例如雙環庚二烯(bicycloheptadiene,BCHD),在特定反 應條件下與—特定型態之沉積反應ϋ中。本發明之超低k薄膜 ^可在不低於約300。(:的溫度下被熱處理,歷時至少約〇25小 或者為降低介電常數。在沉積或熱處理後,此薄膜也可用 uv或電子束處理。在後沉積(口〇对_4印〇伽〇11)處理步驟中, 源自第二前驅氣體(或混合氣體)之分子碎片(m〇lecule fragments)’包含碳與氫以及選擇性的(〇pti〇naUy)氧原子, 可會熱分解,且可會被轉變成較小分子,從薄膜中被釋放。藉 由分子碎X的轉變過程與釋放,在薄膜中可會選擇性地會發^ 出些空隙。薄膜密度會因此而減小,介電常數與折射率 (refractive index )也會跟著降低。
本發明提供製備一具超低k (即小於約2.5)材料的方法, 其適用於一後段製程(BEOL)線路結構之整合。本發明之超 低k薄膜更佳之介電常數約丨.5至約2 5為,且最佳之介電常 數為約1.8至約2.25。製備本發明之薄膜,可選擇至少二個適 合的前驅物,以及如以下所述之製程參數的一特定組合。較佳 的第一前驅物係選自矽烷(silane,SiH4)衍生物,具分子式 SiRR’R”R”’,R、R’、R”及R”’可以是相同或不同/且係選^ 氫、烷基(alkyl)及烷氧基(alkoxy),較佳為曱基(methyl)、乙基 (ethyl)、曱氧基(methoxy)及乙氧基(ethoxy)。較佳的前驅物包 括.一乙氧基一TSsi^^Xdiethoxydimethylsilane)、二乙氧基甲 基石夕烧(diethoxymethylsilane,DEMS)、乙氧基三甲基石夕燒 (ethoxyltrimethylsilane)、乙氧基二曱基矽烷 (ethoxydimethylsilane)、二曱氧基二曱基矽烷 (dimethoxydimethylsilane)、二甲氧基曱基矽烷 (dimethoxymethylsilane)、三乙氧基矽烷(trieth〇xysilane)及三甲 -18- 氧基甲基石夕炫〇3111^1;110乂丫11161:11)45他116)。 本發明使用之第二前驅物係一有機化合物選自: R'\ R3 v=< 烯經(alkenes) : R2/ xr4 ; 块烴(alkynes) : Rl ~~=一r2 ; • R\ R4 峻(ethers) : r2;^~0~^:R5 •,及 R3 R6 R^/〇V R3 環氧乙烧類(oxiranes) : ; R1、R2、R3、R4、R5及R6可為相同或不同,且係選自線 性的、分枝的、環狀的、多環的氫、烧基、烯(alkenyl)或烯基 (alkenyl group),且可被含有氧、氮或氟的各取代基官能化。 鲁 再者’其他原子像是例如硫、石夕,或其他鹵素(halogens)可 被包含在第二前驅物分子中。在這些種類中,最適合的係環氧 乙烷(ethylene oxide)、環氧丙烷(propylene oxide)、環戊缚氧化 物(cyclopentene oxide)、環氧異丁烷(is〇butylene oxide)、2,2 3- 三曱基環氧乙院(2,2,3-trimethyl〇xirane)、丁二稀氧化物 〇31血(^狀111〇11(^(^)、雙環庚二烯(1^7〇1〇1^〖&(^1^)、1,2-環氧 -5-己烯(l,2-epoxy-5-hexene)、2-甲基-2-乙烯環氧乙烷 (2-methyl-2-vinyloxirane) 、1-異丙-環丁 -1,3-二烯 (1-isopropyl-cyclohexa-l, 3-diene)及曱基第三 丁基趟 (tertbutylmethyldher)〇 -19- 1353637 如圖一所示,平行平板式電漿加強化學氣相沉積 (PECVD)反應器10係用於2〇〇mm晶圓製程的類型。反應 器1〇的内直徑X約是13英吋,而高度Y約是8.5英吋。基 板卡盤12的直徑約是]〇 8英对。反應氣體經由一氣體分配板 (gas distribution plate,GDP) 16 導入反應器 10 中,此氣體分
配板與基板卡盤12之間的間距z約是1英吋,且反應氣體係 經由一 3英吋排出埠(exhaustp〇rt) 18被排出反應器。奸 能源20被連接至氣體分配板(GDP) 16,其在電性上係與反 應器10絕緣,且基板卡盤12是接地的。為了實用目的,反應 器所有的其他部分皆是接地的。在一不同的實施例中,即能 源20可被連接至基板卡盤12 ’並被傳送至基板22。此中,基 板獲得一負偏壓(negative bias ),其值取決於反應器的幾何形 狀與電漿參數。在另—實施例中,可以使用超過—個能源。^ 例而言,二個能源可以操作在相同的处頻率,或者—個可^ 作在低頻、一個在高頻。這二個能源可都被連接至相同的電^ 或者至不_電極。在另—實施财,处能源在沉
^斷斷續續地產生脈衝波。沉積低㈣膜期間被控制的製程變 數係RF能源密度、前驅物混合與流量、反應器中的壓力 ^間,及基板溫度。(加_晶圓卡盤的溫度控制著基板撕 很爆不^月尺⑺工地又令、迥的笫一與第二 =定製程錄結合,可製備本發明之較 含:約5至約40原子百分比的石夕;約5至約7G原包 石厌’ 0至約5。原子百分比的氧;以及約5至約 =的 的氫。在本發明的某些實施例中,碳含量可以高至約刀比 -20- 1353637 在一薄膜的一沉積製程期間,被控制的主要製程變數係 RF能源、前驅物的流量、反應器壓力及基板溫度。根據本發 明’以下提供以一第一前驅物二乙氧基曱基矽^ (diethoxymethylsilane,DJEMS)與一第二前驅物雙環庚二= (bicycloheptadiene,BCHD)沉積薄膜的數個範例。在某此範 例中,二乙氧基甲基矽烷(DEMS)前驅物蒸汽用氦(或氬 載子氣體,以傳送至反應H中。可視需要地,將沉積後之薄膜 在400C熱處理,以減小k。另一種方式是,用或電子束 處理薄膜以減小k並增加交聯(cross_iinking),如美國專利申 請號10/758,724中所述為例。熱處理可以單獨進行,或與 在’724申請案中之其中一個處理方法併用。 /、不
▲、詳細而言,根據,724申請案’沉積的薄膜視需要可以用一 能源處理,以穩定此薄膜並改善其特性(電性、機械性、黏性》 最後可得-最佳化_。適合的能源包減源、化學源、紫外 光(UV)、電子束、微波及電漿。前述能源的各種組合也可以 用^本發財。本發明個源侧來修飾沉積介電質的石夕 -¾鍵結麟(bondingnetworic)、修飾材射的其他鍵结、引 的化碳交聯,以及在某些狀況下移除碳氫相,綜合前 j有的修飾,可得—較高的彈性模數(dast—)、- =的硬度、或-較低的内應力、或以上所述特性的結合。一 模數或較低的應力皆可得—較低的裂變傳播速度,較 回、數與較低應力的結合係較佳的能源處理結果。 熱源包括任何來源,像是例如一發熱元件 (heating 犠1^、或紐’可以加熱沉積之介電材料從約3G()°C至約 ’皿度。此熱源紐係能夠加熱沉積之介電材料約35〇 -21 - 43〇C的溫度。熱處理製程可被實行在多種時間週期, ^力1刀知至約3〇〇分鐘。此熱處理步驟一般被執行在一惰 ί1生氣體中例如氦與氬^熱處理步驟可稱作—退火步驟,此中 使用了快賴社、火爐(&_6)退火雷機火或尖峰 (spike)退火條件。 兔外光處理步驟的執行^^利用可以產生約5⑻奈米至約 150奈米波長的光源來照射(irradiate)基板,祕關溫度維 持在25 C至50(rc ’較佳的溫度為30(TC至45(TC。大於370 ^米的輻射能不足轉離或活化重要_結,波絲圍以150 奈,至370奈米較佳。由文獻資料與在沉積薄膜上測得的吸收 光谱’本發明已得知小於m奈米的輻射並不適用此係由於 氫化石夕碳氧化物(SiCOH)薄膜的降解(degradati〇n)。再者,相 巧於1M)奈米至310奈米的範圍,31〇奈米至37〇奈米的能量 範圍較不實用’此係由於31G奈米至37G奈米之每個光子 (phmon)相對低的能量。在15〇奈米至31〇奈米的範圍中, /儿積4膜之吸收光譜有最佳重疊(〇veriap),且薄膜特性(像 是例如疏水性)降解最小,故可視需要被選用作^光譜一最 有效區,以改變氫化矽碳氧化物(Sic〇H)的特性。 一電子束處理步驟的執行’係利用一能夠在晶圓上方產生一 均勻電子通量(electron flux)的能源,其電力從G 5 keV (仟 電子伏特)至25keV ’且電流密度從〇丨至丨⑽mien)Amp/cm2 (微安培/平方公分)(較佳為1至5 micr〇Amp/cm2),晶圓溫 度維持在25°C至500。(:,較佳的溫度為^(^^至45〇〇c。在電 子束處理步驟中。使用之較佳的電子劑量為5〇至5〇〇 m_coulombs/cm‘(微庫侖/平方公分),最佳為1〇〇至3〇〇 microcoulombs/cm2 地產:ΓΐΤ行’係利用能夠產生原子氫以及選擇性 露基繼。嫌的電絲 2—_====罐度維持在
_ίίΐ!步驟的執行’係藉由導入-氣體至-可以產生電 “二二,J"之後其轉變為電聚。可以用於㈣處理的氣 =ΐ例如氬、氮、氦、_或氪㈣,其中 •里5 '、子虱的相關來源、甲烧(methane)、甲基石夕烧 ^ _^1Sllane)曱基的相關來源及其混合物。電漿處理氣體的 机里β視使用的反應器系統而改變。腔體壓力可以在至 2〇torr的範圍中,但壓力操作的較佳範圍在i至⑴咖。電 處理步驟歷時-咖週期,—般從約1/2至約1()分鐘,然而 在本發明中可用較長的時間週期。 …'
〇 一,用—处或微波能源來產生上述的電漿。RF能源可 操作在鬲頻範圍(約l〇〇w或更大的等級);低頻範圍(小於 250W)或者可用兩者的組合。高頻電力密度可以在〇 1至 2,0W/cm2的範圍中,但操作的較佳範圍在〇 2至丨〇w/em2。 低頻電力密度可以在0.1至i.OW/cm2的範圍中,但操作的較 佳範圍在0.2至〇.5W/cm2。選定的電力層級必須夠低,以避免 暴露的介電表面(小於5奈米去除(removal))有顯著的濺擊钱 刻。 為使本發明之沉積製程能成功完成’使用的沉積條件也是 -23- 1353637 關鍵的。舉例而言,晶圓溫度為約25¾至約42〇t:,且較佳為 約60°C至約35〇°c。处能源密度為約0.05W/cm2至約 3.5W/cm2 ’且較佳為約〇 25W/cm2至約lw/cm2。在較佳的製 程中’射頻電力同時施加於氣體導入板(喷頭)(13.6MHZ頻 率與約35〇W的電力(然而可用200W至450W))及晶圓卡盤 (13.6MHz頻率,約100W的電力(然而可用50W至200W))。 如此技藝者所習知’本發明也可使用不同的頻率(〇26、 0.35、0.45MHz) 〇 二乙氡基曱基矽烷(DEMS)反應氣體流量約5sccm至 lOOOsccm ’且較佳為約25sccm至約200sccm。雙環庚二烯 (BCHD)反應氣體流量約5sccm至約1 〇〇〇sccm,且較佳約 lOsccm至約120sccm。以使用液態前驅物輸送(deHvery )時, 每個前驅物的液態流量在500_5000毫克/分鐘(mg/minute)的 範圍中。視需要可以添加氦,且較佳的氦流量在丨〇〇_2〇〇〇sccm 的範圍中,然而在本發明中也可用其他流量。沉積製程期間的 反應器壓力一般為約50mtorr至約l〇〇〇〇mt〇rr。 使用一多站(multistation)沉積反應器時,基板區域係指 每個個別的基板卡盤,且各氣體的流量係指一個個別的沉積 站。因此,輸入反應器的總流量與總電力要乘以反應器内沉積 站總數。 在進行後續。之整合製程前,沉積薄膜是穩定的。執行穩定 製程可在約300°C至約430。(:一火爐退火步驟中,歷時一時間 週期約0.5小時至約4小時。穩定製程也可在一快速熱退火製 程中執行,溫度向於約300°C。穩定製程也可在一 υγ或電子 -24- 執ΐ,溫度高於’。根據本發明所得到的着之 以形成無數的其他裝置。 乾例依據本發明還可 32頂Hi建立在—絲板32上的電子裝置30。在石夕基板 第-令麗成絕緣材料層34 ’ 一第—金屬區36嵌入兑中。在 二it上實行化學機械研磨(CMP)製程後:、-薄膜 蓋^未^ ^在層34與層38之間加上—額外的介電帽 此二一絕緣材料層34可由氧化梦、氮化石夕、這 r够㈣麵鱗_祕。超低k薄 乂净、由一微衫(Photolith嗯aohy)製程圖荦化,而導 (cwT^ ° 40 將超低上ί-声',:】學氣相沉積(PECVD)製程 _ #膜第一層44 >儿積在第-超低k薄膜38斑第-壤碑 彳導體層4G可由—金屬傳導材料或—非金屬傳導材 例而言’可使用一金屬傳導材料例如滅銅,或- T…導材料滅或多祕。第—導體4G與第—金屬區36 可電相連。 ^第二超低!^薄膜層44巾進行—光微影製程後,形成一 触—¥虹區50,接著疋第二導體材料的—沉積製程。第二導 5〇也可纟金屬材料或—非金屬材料沉積類似沉積第一 -25· 1353637 導體層40的材料。第二導體區5〇與第一導體區4〇可 ^系般入在超似絕緣鮮二層44卜超低⑽膜第連盘 第一絕緣材料層38緊密接觸。在此特定範例中,第 枓層38根據本發明係一超低k材料,用作—勒介料才 而第二絕緣材料層,亦即,超低k _ 44,卿時 =與-層間介電f。基於超低k薄膜的低介電常數第—絕ς 曰38與第二絕緣層44可具極佳的絕緣特性。
圖五顯示本發明之電子裝置60,類似圖四所示電子裝 30,但是有額外的介電帽蓋層62沉積在第一絕緣材料層犯與 第二絕緣材料層44之間。介電帽蓋層62適合由一材料形成: =氧化石夕、氮化碎、氮氧化♦、碳化碎、氮碳化邦iCN)、石夕 碳氧化物(SiCO)、修飾過的超低k及其氫化化合物,以及耐火 巧石夕氮化物’其中此财火金屬係選自由组皆铪及鶴構成 的群組。此外,介電帽蓋62伽作—擴散阻障層防止第一 導體層40擴散到第二絕緣材料層4钟,或擴散到較低層中, 特別是進入層34與層32。
圖六顯示本發明之另一不同電子裝置7〇的實施例。在電 子裝置70中,使用二層額外的介電帽蓋層乃與%,其可用 作一反應式離子蝕刻(RIE)遮罩與化學機械研磨(CMp)研 磨停止層。第—介電帽蓋層72沉積在第-絕緣材料層38頂 上。"電層72的作用’係為平坦化第一導體層4〇之化學機械 研磨製程提供-停止點(endpGint)。研磨停止層72可由一適 合的介電材航積,如氧缺、氮切、氮氧切、碳化石夕、 石夕碳氧化物(sico)、氮碳化邦iCN)、經修飾之超低k及其氫 化化合物’以及耐火金屬魏化物,其巾此耐火金屬係選自由 •2(5- 1353637 f、錯、餘及鎢構成的群組。介電層72的上 的水平高度相同。為了相同目的,可加上—第弟= 74在第二絕緣材料層44頂上。 弟一 ”包層 圖七顯示本發明另-更不同電子裝置8〇的實施 不同的實施例中’沉積-額外的介電層82,因此將第1 材料層44分隔為二層84與86。層内與層間介電層44,如^ ^所不,因此被分隔為層内介電層84與層間介電層%
^㈣與内連線94間的分界線(b_daiy )上,如圖八所示。 再儿積-額外的擴散阻障層96於上面的介電層74頂上。此不 同之電子錢8〇實施例提供_外優點,翁介電層82用作 一反應式離子侧(RIE) _停止,以提供極佳的内連線深 度控制’以便對導體阻抗(resistance)有較佳的控制。 以下所列範例,係為示範本發明之超低k介電薄膜的製 造’並展示此等範例可得到的好處: 、
【範例一】 在此範例中,參照圖一,首先準備一晶圓,經由一開缝閥 (slit valve) 14將此晶圓置入反應器10中,且視需要以氬氣 預蝕刻(pre-etched)此晶圓。在此晶圓製備製程中,晶圓溫 度被設定在約18(TC,而氬流量被設定在約25sccm,以達到約 lOOmtorr的壓力。接著打開一 rf能源至約125W,歷時約6〇 秒。然後關閉RF能源與氬氣流。 一乙氧基甲基石夕烧(DEMS)前驅物被送入反應器中。要沉 積本發明之超低k薄膜’首先建立二乙氧基曱基矽烷(DEMS) •27· 1353637 與雙環庚二烯(BCHD)氣體流至必要的流量與壓力,亦即,二 乙氧基曱基矽烷(DEMS)約4sccm與雙環庚二烯(BCHD)約 3sccm ’以及約500mtorr的壓力。接著打開一 RF能源至約 30W ’歷時一時間週期約50分鐘。然後關閉RF能源與氣體 流。接著自反應器10將晶圓移出。 為減小沉積薄膜的介電常數,且更為改善其熱安定性,亦 即,為使其在溫度高於300t時能穩定,此薄膜需後處理(post treated)以蒸發其揮發性成分(v〇iatiiecontents),並且在尺寸 上(dimensionally)穩定薄膜。此後處理製程可由下列步驟在 一退火火爐中實行。首先,以流量約1〇公升/分鐘的氮淨化火 爐約5分鐘(薄膜樣本置於一裝載站(i〇a(j stati〇n)中)。接著將 薄膜樣本轉移至火爐反應器中,開始加熱薄膜至約28〇。〇的後 退火循環’加熱率約5°C/分鐘,維持在約280。(:歷時約5分鐘, 以約5C/分鐘的第二加熱率加熱至約4〇〇°C,維持在約400°C 歷時約4小時’關閉火爐,並讓薄膜樣本冷卻至低於約1〇〇〇c 的溫度。一適合的第一維持溫度可從約28(y>c至約3〇〇〇c,而 一適合的第二維持溫度可從約3〇(TC至約400T:。由此得到的 薄膜具介電常數1.81。另一種方式是,可在約3〇〇°c用UV或 電子束處理薄膜歷時至多30分鐘。 現在參照圖二討論第一實施例之結果。圖二所示係得自一 超低k薄膜之傅利葉轉換紅外線(FTIR)光譜,此薄膜係根 據本發明製備自二乙氧基曱基矽烷(DEMS)與雙環庚二烯 (BCHD)的混合。此光譜顯示石夕-氧吸收頻帶在約 1000-1100cm、石夕-甲基吸收峰值(咖哪如叩池)在約mg cnT1及碳-氫吸收峰值在約2900_3000 cm-i。超低k薄膜之傅利 •28· 1353637 葉轉換紅外線(FTIR)光譜的-個特性,係_氧峰值可被解 迴旋為在1141cm·1、1064 cm·丨及l〇3〇cm-丨的三個峰值,尤如 圖一之示意圖所示。 【範例二】 在此範例中,在與範例一相同的設備中製備一晶圓。首 先,將晶圓置入反應器中。晶圓溫度被設定在約18〇。〇。二乙 氧基甲基矽炫(DEMS)前驅物被送入反應器中。要沉積本發明 之超低k薄膜,首先建立二乙氧基曱基矽烷(0£1^幻與丁二烯 氧化物(butadienemonoxide ’ BMO)的氣體流至必要的流量與壓 力’亦即’二乙氧基甲基碎炫(DEMS)約1 seem與丁二婦氧化 物(BMO)約4sccm ’以及約500mtorr的壓力。接著打開一 Rp 能源至約30W ’歷時一時間週期約50分鐘。然後關閉RF能 源與氣體流。接著自反應器10將晶圓移出。 接著以範例一所述相同的方法處理薄膜。得到的薄膜具介 電常數1.77。 【範例三】 在此範例中,在與範例一相同的設備中製備一晶圓。首 先,將晶圓置入反應器中。晶圓溫度被設定在約180°C。二乙 氧基甲基矽烷(DEMS)前驅物被送入反應器中。要沉積本發明 之超低k薄膜,首先建立二乙氧基甲基矽烷(DEMS)與2-甲基 乙烯環氧乙烧(2-methyl-2-vinyloxirane,MVOX)的氣體流至 想要的流量與壓力,亦即,二乙氧基曱基矽烷(DEMS)約2sccm 與2-曱基-2-乙烯環氧乙烷(MVOX)約3sccm,以及約500mtorr 的壓力。接著打開一 RF能源至約30W,歷時一時間週期約 -29- =。。然後’能源錢體㈣著自反應器10將晶 接著以範例-所述相同的方法處理薄膜。 得到的薄膜具介電常數2,08。 【範例四】 在此Ιϋ別中,在- 8英忖商用電聚加強化學氣相沉積 (PECVD)②備巾製備—晶圓。首先,將晶圓置人反應腔體 中。晶圓溫度被設定在約20(TC。用氦作載子氣體,二乙氧基 甲基矽烷师厘呂你展戊烯氧化物㈣咖伽如㈢硫⑶⑺同 時被送入反應巾。要沉積本發明之超低k缚膜,首先建立二 乙氧基甲基魏(DEMS)、環戊稀氧化物(cp〇)及氦的氣體流至 想要的流篁與壓力’亦即,二乙氧基甲基矽划加卿約 7〇SCCm、環戊烯氧化物(〇>〇)約32〇sccm及氦約最_,以 及約200〇mt〇rr的壓力。接著打開一处能源至約3〇〇w,歷時 -時間週期約10分鐘。然後關閉即能源與氣體流。接著自 反應腔體將晶圓移出。 接著以範例一所述相同的方法處理薄膜。得到的薄膜具介 電常數2.19。 現在參照圖三討論結果。圖三所示係得自一超低k薄膜之 傅利葉轉換紅種(FTIR)规,此薄麟製備自二乙氧基 曱基石夕烧(DEMS)/環戊烯氧化物(CP〇)及氦。此光譜顯示石夕^ 吸收頻帶在約lOOO-UOOcm-1、矽-甲基吸收峰值在約 -30- 1353637 及石厌-氫吸收峰值在約2900-3000 cm-1 〇超低k薄膜之傅利葉轉 換紅外線(FTIR)光譜的一個特性,係矽_氧峰值可被解迴旋 為在】132cm、1058 cn^及1024cmf丨的三個峰值,如圖三之 • 特別示意圖所示。 • 為穩定超低k薄膜,也可用一快速熱退火(rapid thermal annealing ’ RTA)製程。根據本發明得到的薄膜,具介電常數 k小於約2.5的特性’且能熱穩定地整合在一後段製程(be〇l) 内連線結構中,其一般製程在至多約40(TC的溫度。因此,採 用本發明之教示可容易地生產邏輯與記憶裝置之後段製程中 用作層内與層間介電質之薄膜。 因此,根據本發明之方法與形成的電子結構,在以上所述 與圖四至圖八附加圖面中已完整示範。須強調圖四至圖八所示 電子結構之範例,僅用來例示本發明的方法,其亦可應用於益 數電子裝置的製造。 〜、…' % 熟此技藝者已習知,使用液態質量流控制時,列在上述四 個製程範例中之氣體流單位,可代換為液態流單位。 由於已用例示方式描述本發明,故應瞭解專業術語 (terminology)的使用係在於文字說明之本質,而不在於限制°。 再者,本發明之較佳實施例與數個不同的實施例已特別地 顯說明如上,熟此技藝者可了解,在不悖離本發明之精神 與範疇下,可應用這些教示於本發明之其他可的變體中。 -31- 1353637 依本發明之實施例所主張之專屬權利在以下所附申請專 利範圍中。 【圖式簡單說明】 本發明之4述目的、特性與優勢藉由詳細說明與所附圖式 可清楚瞭解,其中: 圖一顯示可用於本發明之一平行平板式化學氣相沉積反 應器之剖面圖。 、 圖二顯示本發明之一超低k材料的傅利葉轉換紅外線 (F〇uner Tmnsf0rm Infrared,FTIR)光譜,其係沉積自二乙氧基 甲基矽烷(DEMS)與雙環庚二烯(BCHD)的混合。 ⑽齡本發明之^—超低k材料之傅繼轉換紅外線 ^ R)光睹,其係沉積自二乙氧基甲基矽烷(DEMS)與環戊 烯氧化物(CPO)的混合。 ❿ 圖四係依據本發明,顯示一電子裝置之放大剖面圖,其具 超低k材料之-層时電層與—層間介電層。 阻障發明,顯示當圖四電子結構具一額外的擴散 阻障)丨電巾自盍層,位於超低k__頂上時之放大剖面圖。 離子t ,顯相五料結額外的反應式 障’於研磨停止層頂上^ 式離=?===3_個額外的反應 料薄膜頂上。 所朴止介電層,位在層間超低k材 -32- 1353637 圖八係依據本發明,顯示圖七電子結構具數個額外的反應 式離子蝕刻(RIE)硬罩/研磨停止介電層沉積,位在多相 (multiphase)材料薄膜頂上。 【主要元件符號說明】 10反應器 12基板卡盤 14縱向閥 16氣體分配板 18排出埠 20RF能源 22基板 30電子裝置 32矽基板 34第一絕緣材料層 36第一金屬區 40第一導體層 44超低k薄膜第二層 50第二導體區 38超傳k薄膜 60電子裝置 70電子裝置 62介電帽蓋 72第一介電帽蓋層 74第二介電帽蓋層 80電子裝置 82介電層 84層内介電層 92内連線 94内連線 96擴散阻障層 86層間介電層 -33-

Claims (1)

1353637 七、申請專利範圍: 1. 一種介電材料,包含矽、碳、氧及氫元素,該介電材料具一隨 機共價鍵結(random covalently bonded )三度空間網路結構 (tri-dimentional network structure),其介電常數不大於 2.5,且具 有一傅利葉轉換紅外線(FTIR)光譜,其之一矽-氧吸收頻帶被解 迴旋(deconvoluted)成三個峰值,該矽、碳、氧及氩元素衍生自 一第一前驅物,具分子式SiRR’R’’R’,,,其中R、R’、R,,及R,’, 為相同或不同,且係選自氫、烧基及燒氧基;以及一第二前驅, 係具以下各分子式之一: 稀烴(alkenes): 块烴(alkynes):
R1 R1 ^(ethers) : r2RJ^_〇^5 ;及
環氧乙烧類(oxiranes)
其中’1^、111、112、114、尺5及尺6為相同或不同,且係選自氫、 燒基、烯(alkenyl)或烯基(alkenyl group)。 -34- 1 .如請求項1所述之介電材料’其中該隨機共價鍵結三度空間網 2 路結構包含矽-氧、矽-碳、矽_氫、碳_氫及碳_碳鍵。 3. 如請求項i所述之介泰 1時是熱穩定的。 $料’射該介電材料在溫度至少43〇 4. 如請求項】所述之介 米級孔洞。 W ,其申該介電材料更包含多樣性奈 6· -種後段製程(BEOL)内遠绩姓媒^ (BEOL)之絕緣體、帽蓋構’包含用作—後段製程 含石夕、碳、氧及氫元素,層的—介騎料,該介電材料包 其介電fϋλππ,B、^機共價鍵結三度空刺路結構, ' *具有一傅利葉轉換紅外線(FTIR)光譜, ^ rfn f被解迴縣三個雜,财、碳、氧及氫元素 储生自具分子式SiRR,R,,R,”的一第一前驅物,其中R、r,、R” 及R,”為相同或不同,且係選自氫、絲及燒氧基;以及一第二前 驅物,係具以下各分子式之一: 稀烴(alkenes): 块煙(alkynes): R1—s一~R2 . S^(ethers) : r3 H5 ; 及
環氧乙烷類(〇xiranes): -35· 1353637 产其其二广^^七七及^為相同或不同’且係選自气 烷基、烯(alkenyl)或烯基(aikenyl抑叩)。 目氧、 電 二-種具數層絕騎料以在—線路結構巾祕層喊層 貝的電子結構,包含: 一預處理半導體基板,具一第一金屬區,鑛入 材料層中; 絕緣 一第-導歷’触人由—超低k材料臟之—第 料層中’該超低k材料包含石夕、碳、氧及氮,以及多樣性太半 孔洞,該超低k材料料大於約2.5的—介電錄,以及—傅^ 轉換紅外線^獲)光譜,其,·氧吸㈣較解减為三個| 值’該矽、碳、氧及氫元素係衍生自具分子式別狀’尺”尺”’的一第 一前驅物,其中R、R’、R”及R’’,為相同或不同,且係選自氫、 烷基及烷氧基;以及一第二前驅物,係具以下各分子式之<-·· R· R3 烯烴(alkenes) : ^ \___/ r2’—\r4 R2 快烴(alkynes) : Rl ;及 R1 r4 越(ertiers) : r2-^V-〇- 〆 環氧乙烧(oxiranes)類:Ri''~7^-R3 R2 R4 其中’1^、112、113、尺4、尺5及116為相同或不同,且係遽自~ 烧基、稀(alkenyl)或稀基(alkenyl group),該第二絕緣材料層與^ -36- 1353637 -絕緣材料層緊雜觸(intimate e_et),該第―導魏與該第 一金屬區電相連(electrical communication);以及 一第二導體區,係與該第-導體區電相連且被嵌人含該超低k 材料之-第三絕緣材料層中’該第三絕緣材料層與該第二絕緣材 料層緊密接觸。 9. 如請求項7所述之電子結構,更包含 該第二絕緣材料層與該第三絕緣材料層之間;以及一=介= 蓋層,位於該第三絕緣材料層頂上。 10.如請求項8所述之電子結構,其中該介電帽蓋由—材料所形 成,該材料選自氧切、氮切、氮氧切、敎金屬魏化物 sllrn nitride)、碳切、碳氮切、碳氧化石夕、 摻雜反的魏物及其含纽合物賴成之群組。 所述之電子結構’其巾剌火金屬魏化物包括一 ^m^m"!〇ry meta〇 ? #iS ^ ^(Ta)'#(Zr)' 之電子結構’其巾該第—介電帽蓋層與該第二 石々、ΐϊ曰由一材料形成,該材料選自氧化石夕、氮化石夕、氮氧化 的氧化物'綱 -37- 14. 丄 下所述^電子結構’其中該第一絕緣材料層係選自以 silicate sla 一氧化石夕、氮化石夕、•夕玻璃(phosphorus BPSG) ' ^^^^(boron phosphorus silicate glass ^ BPSG)、及此等材料之各種其他經摻雜之變體。 層,位結構,更包含-介電·之擴散阻障 位在辟—絕緣材料層與該第三絕緣材料層至少其中一上。 應式_刻 :,阻障層,於該反應式二二及層- 17.如請求項7所述之電子結構,更人 刻(RIE)硬罩/研磨停止層 反應式離子蝕 擴散阻障層 層頂上。 介電擴散阻障層,於魅—人絕緣材料層頂上,·一第-磨停止層頂上;—“介電;子餘刻(_)硬罩/研 止層★,於該第三絕緣材料層頂二以及硬罩/研磨停 於該第一介電反應式離子钱刻硬罩/研磨丨停止 18.如請求項7所述之電子結構, 似材料之-侧介«與-超似㈣ 19. 一種 電 具數層絕緣材料以在一線路結構中用作層内或層間介 -38- 1353637 質的電子結構,包含: ’係嵌入一第一絕緣 一預處理半導體基板,具一第一金屬區 材料層中; 加楚至少個第一導體區係嵌入由一超低k材料形成之至少-個苐二絕緣材料層t,該超低k材料主要_、碳、氧及Μ 及多樣性奈米級孔洞所構成,該超似材料具不大於約2 8的 電常數’以及-傅利葉轉換紅外線(FTIR)光譜其一石 頻帶被解迴旋為三個峰值,财、破、氧及氫元素翁 八
子式SiRR,R,,R,,,的一第一前驅物,其中R、R,、R,,及r,”為相= 或不同,且係選自氫、絲及燒氧基;以及—第二前驅物 以下各分子式之一: 八
稀烴(alkenes): 炔烴(alkynes) : r1 一三 R2 ; 2r!\ r4 •醚(ethers) : ;及
環氧乙烷類(oxiranes): 其中,1^、112、尺3、尺4、115及尺6為相同或不同,且係選自氫、 烧基、烯(alkenyl)或稀基(alkenyl group),該至少一個第二絕緣材料 層之一與該第一絕緣材料層係緊密接觸(intimate contact ),該至 少一個第一導體區之一與該第一金屬區電相連(electrical -39- 1353637 communication)。 嫩—軸麯,位於每 21如請求項W所述之電子結構更包含 f母個該至少一個第二絕緣材料層之間;以及」第電=二 層’位在該最上面之第二絕緣材料層的頂上。 ”電中目盍 22.如請求項21所述之雷早έ士接 二介電帽蓋由-超低kf_成。“—介電帽蓋層與該第 構,其愧第—介侧制與該第 盍層係由_更的(modified)超低w料形成。 述US結構)中該介電帽蓋由-材料形成, 括 2質6的一電種^層料以在—線路結射_内或層間介電 一預處理半導體基板, 材料層中; 具一第一金屬區,係嵌入一第 絕緣 1353637 一〒-導體區’嵌人—第二絕緣材料層 層與該第-絕緣材料層緊密接觸,該第—=第二絶緣材料 電相連·,-第二導體區,係與該第—導體區該第-金屬區 第二絕緣材料層中,該第三絕緣材料層與 络且被丧入一 接觸; 萆—、,色緣材料層緊密 層之間 ,以及、^ ' ”:曰。亥 第二絕緣材料 介電帽ί層第一 氧及氫,以及多樣性==該: (FTIR)光/之—介電錄’以及—翻雜換紅外線 石:3本/ 及收頻帶’其被解迴旋為三個峰值;該矽、 ΐ中R、C何生,自具分子式·,R”R,”的—第一前驅物, 、 及R為相同或不同,且係選自氫、燒基及烧氧 基’以及-第二前,崎,係具以下各分子式之一· 烯烴(alkenes): R R2 炔烴(alkynes) : r> R3 R4 •R2 R 醚(ethers) : r2^_〇 及 〇 環氧乙炫(oxiranes)類: RLym3 R2 -41 , 1353637 其中,1^、112、尺3、尺4、尺5及&6為相同或不同,且係選 炫*基、烯(alkenyl)或烯基(alkenyl group)。 2質7的一層料喊_魏、轉+㈣層喊層間介電 貝的電子結構,包含: 兒 材料2處理半導體基板,具―第—金屬區’係嵌人—第—絕緣 —第一導體區’欽一第二絕緣材料層中,該第二絕緣材 層與該第一絕緣材料層緊密接觸,該第一導體區與該第一金屬區 電相連; °° …—第二導體區與該第一導體區電相連,且被嵌入一第三絕緣 材料層中,該第三絕緣材料層與該第二絕緣材料層緊密接觸;以 及 —擴散阻障層,係由一材料形成,該材料包含一超低k介電 材料,係位在該第二絕緣材料層與該第三絕緣材料層之至少其中 一個上’該超低k材料包含石夕、碳、氧及氫,以及多樣性奈米級 • 孔洞’該超低k材料具不大於約2.5的一介電常數,以及一傅利葉 轉換紅外線(FTIR)光譜具一矽-氧吸收頻帶,其被解迴旋為三個 導值;該矽 '碳、氧及氫元素係衍生自具分子式SiRR,R,,R,1 — 第一前驅物,其中R、R,、R”及R,,,為相同或不同,且係選自氫、 统基及院氧基,以及一第二前驅物,係具以下各分子式之一:
烯烴(alkene。: •42· 1353637 R2 炔烴(alkynes) : Rl ;及 R1 R4 fel(ethers) : R2_\ 〇-Z-r5 〆 R6 1 0 3 環氧乙烧類(oxiranes) : R'^~V^R 其中,1^、112、113、114、1^及尺6為相同或不同’且係選自氣、 烧基、稀(alkenyl)或烯基(alkenyl group)。 28. —種具數層絕緣材料以在一線路結構中用作層内或層間介電 質的電子結構,包含: 一預處理半導體基板,具一第一金屬區,係嵌入一第一絕緣 材料層中; 一第一導體區,嵌入一第二絕緣材料層中,該第二絕緣材料 層與該第一絕緣材料層緊密接觸,該第一導體區與該第一金屬區 _ 電相連; ' 。° 第體區與⑧第-導體區電相連,且被喪人—第三絕緣 材料層中,該第三絕緣材料層與該第二絕緣材料層緊密接觸;、 離:Τ(_硬罩/研磨停止層,位於該第二絕 :擴散轉層,錄觀應式料射 碟、氧及氫,—二=二=約 丄刀:>Dj/ 2 5介電常數’以及—傅利葉轉換紅外線(FTIR)光諸,具-石夕-氧吸_帶’祕迴旋為三個峰值;财、碳、氧及氫元素係 衍生^具分子式SiRR,R,,R,’,的一第一前驅物其中R、R,、R” 及R為相同或不同’且係選自氫、院基及烷氧基以及一第二前 驅物,係具以下各分子式之一: 烯烴(alkenes;) R1 R2
R3 R4 •R2 炔烴(alkynes> : R1 Rl R4 及 il(ethers) : ; 環氧乙烧(oxiranes) :rS^Vr3 R2 r4 其中,R、R、R、R4、R5及R6為相同或不同,且係選自氫、 烧基、稀(alkenyl)或烯基(alkenyl group;)。 29· —種具數層絕緣材料以在一線路結構中用作層内或層間介電 質的電子結構,包含: 曰/ 一預處理半導體基板,具一第一金屬區,係嵌入一第一絕緣 材料層中; -第-導體區,嵌人-第二絕緣材料層中,該第二絕緣材料 層與該第-絕緣材料層緊密接觸,該第_導體區與該第一金屬區 電相連;-第二導體區與該第-導體區電相連,且被嵌入〆第三 -44 - ^53637 、、巴緣材料層中’該第三絕緣材料層與該第二絕騎料層緊密接觸; —第一反應式離子蝕刻(RIE)硬罩/研磨停止層 -絕緣材料層頂上; 位於料 /研磨停 1層H阻障層’位於該第—反應式離子钱刻(RIE)硬罩 —-第二反應式離子糊(RJE)硬罩/研磨停止I,位於該第 二絕緣材料層頂上;以及 /研紅第散轉層,位概第二反就料_ (_硬罩 止層頂上’其中該反應式離子侧(Rffi)硬罩/研磨停止 石障層由一,k介電材料形成,該超低k材料包含 電常Γ及多巧生奈米級孔洞’該超低k材料具-介 ^ % ;、.以及一傅利葉轉換紅外線(FTIR)光譜具一 矽-氧吸收頻帶,其被解迴旋為三 . 象㈠一备 係衍生自具分子式贈R”R,”的1及風兀素, 及R,,,為相同或不同,且係選自氫、广=g ’其中R、R、R 驅物,係具以下各分子式之風烧基及烧氧基,以及一第二前 稀煙(alkenes): R1、 R2 .R3 、R4 R2 炔煙(alkynes) : R1 R1、 R2 _(ethers) : R; -R5 :及 〇 環氧乙烧類(oxiranes):
R3 -45· 1353637
其中,1^、尺2、1^、1^、尺5及尺6為相同或不同,且係選自氫、 烧基、稀(alkenyl)或烯基(alkenyl group)。 30.如請求項29所述之電子結構,更包含一介電帽蓋層,係由一 材料形成,此材料包含該超低k介電材料,該超低k介電材料位 於一層間介電層與一層内介電層之間。 -46-
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Families Citing this family (385)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8293001B2 (en) * 2002-04-17 2012-10-23 Air Products And Chemicals, Inc. Porogens, porogenated precursors and methods for using the same to provide porous organosilica glass films with low dielectric constants
US9061317B2 (en) 2002-04-17 2015-06-23 Air Products And Chemicals, Inc. Porogens, porogenated precursors and methods for using the same to provide porous organosilica glass films with low dielectric constants
US7384471B2 (en) * 2002-04-17 2008-06-10 Air Products And Chemicals, Inc. Porogens, porogenated precursors and methods for using the same to provide porous organosilica glass films with low dielectric constants
US20080268177A1 (en) * 2002-05-17 2008-10-30 Air Products And Chemicals, Inc. Porogens, Porogenated Precursors and Methods for Using the Same to Provide Porous Organosilica Glass Films with Low Dielectric Constants
US8951342B2 (en) 2002-04-17 2015-02-10 Air Products And Chemicals, Inc. Methods for using porogens for low k porous organosilica glass films
US7060330B2 (en) * 2002-05-08 2006-06-13 Applied Materials, Inc. Method for forming ultra low k films using electron beam
US6936551B2 (en) * 2002-05-08 2005-08-30 Applied Materials Inc. Methods and apparatus for E-beam treatment used to fabricate integrated circuit devices
US7485570B2 (en) 2002-10-30 2009-02-03 Fujitsu Limited Silicon oxycarbide, growth method of silicon oxycarbide layer, semiconductor device and manufacture method for semiconductor device
JP4338495B2 (ja) * 2002-10-30 2009-10-07 富士通マイクロエレクトロニクス株式会社 シリコンオキシカーバイド、半導体装置、および半導体装置の製造方法
US7049247B2 (en) * 2004-05-03 2006-05-23 International Business Machines Corporation Method for fabricating an ultralow dielectric constant material as an intralevel or interlevel dielectric in a semiconductor device and electronic device made
US7256124B2 (en) * 2005-03-30 2007-08-14 Taiwan Semiconductor Manufacturing Co., Ltd. Method of fabricating semiconductor device
US7638859B2 (en) * 2005-06-06 2009-12-29 Taiwan Semiconductor Manufacturing Co., Ltd. Interconnects with harmonized stress and methods for fabricating the same
JP2007214403A (ja) * 2006-02-10 2007-08-23 Renesas Technology Corp 半導体装置の製造方法
FR2904728B1 (fr) 2006-08-01 2008-11-21 Air Liquide Nouveaux precurseurs porogenes et couches dielectriques poreuses obtenues a partir de ceux-ci
US8053375B1 (en) * 2006-11-03 2011-11-08 Advanced Technology Materials, Inc. Super-dry reagent compositions for formation of ultra low k films
US7749894B2 (en) * 2006-11-09 2010-07-06 Chartered Semiconductor Manufacturing Ltd. Integrated circuit processing system
US7638443B2 (en) * 2006-11-14 2009-12-29 Asm Japan K.K. Method of forming ultra-thin SiN film by plasma CVD
US7749892B2 (en) * 2006-11-29 2010-07-06 International Business Machines Corporation Embedded nano UV blocking and diffusion barrier for improved reliability of copper/ultra low K interlevel dielectric electronic devices
JP5118337B2 (ja) * 2006-11-30 2013-01-16 アペックス株式会社 エキシマ真空紫外光照射処理装置
US20080173985A1 (en) * 2007-01-24 2008-07-24 International Business Machines Corporation Dielectric cap having material with optical band gap to substantially block uv radiation during curing treatment, and related methods
US20080230907A1 (en) * 2007-03-22 2008-09-25 Chartered Semiconductor Manufacturing Ltd. Integrated circuit system with carbon enhancement
US7615484B2 (en) * 2007-04-24 2009-11-10 Chartered Semiconductor Manufacturing Ltd. Integrated circuit manufacturing method using hard mask
US20090061237A1 (en) * 2007-08-28 2009-03-05 International Business Machines Corporation LOW k POROUS SiCOH DIELECTRIC AND INTEGRATION WITH POST FILM FORMATION TREATMENT
US20090061649A1 (en) 2007-08-28 2009-03-05 International Business Machines Corporation LOW k POROUS SiCOH DIELECTRIC AND INTEGRATION WITH POST FILM FORMATION TREATMENT
AU2008308827B2 (en) * 2007-10-05 2011-02-17 3M Innovative Properties Company Organic chemical sensor comprising plasma-deposited microporous layer, and method of making and using
US8258629B2 (en) 2008-04-02 2012-09-04 Taiwan Semiconductor Manufacturing Company, Ltd. Curing low-k dielectrics for improving mechanical strength
US20100143580A1 (en) * 2008-05-28 2010-06-10 American Air Liquide, Inc. Stabilization of Bicycloheptadiene
US8298965B2 (en) * 2008-09-03 2012-10-30 American Air Liquide, Inc. Volatile precursors for deposition of C-linked SiCOH dielectrics
US10378106B2 (en) 2008-11-14 2019-08-13 Asm Ip Holding B.V. Method of forming insulation film by modified PEALD
US20100151206A1 (en) 2008-12-11 2010-06-17 Air Products And Chemicals, Inc. Method for Removal of Carbon From An Organosilicate Material
JP2010192520A (ja) 2009-02-16 2010-09-02 Elpida Memory Inc 半導体装置の製造方法
WO2010104979A2 (en) 2009-03-10 2010-09-16 L'air Liquide - Société Anonyme Pour L'Étude Et L'exploitation Des Procédes Georges Claude Cyclic amino compounds for low-k silylation
US9394608B2 (en) 2009-04-06 2016-07-19 Asm America, Inc. Semiconductor processing reactor and components thereof
US8802201B2 (en) 2009-08-14 2014-08-12 Asm America, Inc. Systems and methods for thin-film deposition of metal oxides using excited nitrogen-oxygen species
EP2319821A1 (en) 2009-11-06 2011-05-11 L'Air Liquide Société Anonyme pour l'Etude et l'Exploitation des Procédés Georges Claude Stabilization of bicycloheptadiene
US8314005B2 (en) * 2010-01-27 2012-11-20 International Business Machines Corporation Homogeneous porous low dielectric constant materials
US8492239B2 (en) 2010-01-27 2013-07-23 International Business Machines Corporation Homogeneous porous low dielectric constant materials
SG183291A1 (en) 2010-02-17 2012-09-27 Air Liquide VAPOR DEPOSITION METHODS OF SiCOH LOW-K FILMS
CN102543844B (zh) * 2010-12-30 2014-05-14 中芯国际集成电路制造(上海)有限公司 一种制造半导体器件结构的方法和半导体器件结构
JP2012201658A (ja) * 2011-03-28 2012-10-22 Tosoh Corp 成膜材料、それを用いた膜の製造方法及びその用途
CN102751233B (zh) * 2011-04-18 2015-03-11 中芯国际集成电路制造(上海)有限公司 互连结构形成方法
US9312155B2 (en) 2011-06-06 2016-04-12 Asm Japan K.K. High-throughput semiconductor-processing apparatus equipped with multiple dual-chamber modules
US9793148B2 (en) 2011-06-22 2017-10-17 Asm Japan K.K. Method for positioning wafers in multiple wafer transport
US10364496B2 (en) 2011-06-27 2019-07-30 Asm Ip Holding B.V. Dual section module having shared and unshared mass flow controllers
US8927430B2 (en) 2011-07-12 2015-01-06 International Business Machines Corporation Overburden removal for pore fill integration approach
US8541301B2 (en) 2011-07-12 2013-09-24 International Business Machines Corporation Reduction of pore fill material dewetting
US10854498B2 (en) 2011-07-15 2020-12-01 Asm Ip Holding B.V. Wafer-supporting device and method for producing same
US20130023129A1 (en) 2011-07-20 2013-01-24 Asm America, Inc. Pressure transmitter for a semiconductor processing environment
US8551892B2 (en) 2011-07-27 2013-10-08 Asm Japan K.K. Method for reducing dielectric constant of film using direct plasma of hydrogen
US8828489B2 (en) 2011-08-19 2014-09-09 International Business Machines Corporation Homogeneous modification of porous films
US9017481B1 (en) 2011-10-28 2015-04-28 Asm America, Inc. Process feed management for semiconductor substrate processing
US8946830B2 (en) 2012-04-04 2015-02-03 Asm Ip Holdings B.V. Metal oxide protective layer for a semiconductor device
TWI581331B (zh) * 2012-07-13 2017-05-01 應用材料股份有限公司 降低多孔低k膜的介電常數之方法
US9558931B2 (en) 2012-07-27 2017-01-31 Asm Ip Holding B.V. System and method for gas-phase sulfur passivation of a semiconductor surface
US9659799B2 (en) 2012-08-28 2017-05-23 Asm Ip Holding B.V. Systems and methods for dynamic semiconductor process scheduling
US9021985B2 (en) 2012-09-12 2015-05-05 Asm Ip Holdings B.V. Process gas management for an inductively-coupled plasma deposition reactor
US9324811B2 (en) 2012-09-26 2016-04-26 Asm Ip Holding B.V. Structures and devices including a tensile-stressed silicon arsenic layer and methods of forming same
US10714315B2 (en) 2012-10-12 2020-07-14 Asm Ip Holdings B.V. Semiconductor reaction chamber showerhead
US9640416B2 (en) 2012-12-26 2017-05-02 Asm Ip Holding B.V. Single-and dual-chamber module-attachable wafer-handling chamber
US20160376700A1 (en) 2013-02-01 2016-12-29 Asm Ip Holding B.V. System for treatment of deposition reactor
US9484191B2 (en) 2013-03-08 2016-11-01 Asm Ip Holding B.V. Pulsed remote plasma method and system
US9589770B2 (en) 2013-03-08 2017-03-07 Asm Ip Holding B.V. Method and systems for in-situ formation of intermediate reactive species
US9058983B2 (en) 2013-06-17 2015-06-16 International Business Machines Corporation In-situ hardmask generation
US8993054B2 (en) 2013-07-12 2015-03-31 Asm Ip Holding B.V. Method and system to reduce outgassing in a reaction chamber
US9018111B2 (en) 2013-07-22 2015-04-28 Asm Ip Holding B.V. Semiconductor reaction chamber with plasma capabilities
US9793115B2 (en) 2013-08-14 2017-10-17 Asm Ip Holding B.V. Structures and devices including germanium-tin films and methods of forming same
TWI612182B (zh) * 2013-09-09 2018-01-21 液態空氣喬治斯克勞帝方法研究開發股份有限公司 用蝕刻氣體蝕刻半導體結構的方法
US9240412B2 (en) 2013-09-27 2016-01-19 Asm Ip Holding B.V. Semiconductor structure and device and methods of forming same using selective epitaxial process
US9556516B2 (en) 2013-10-09 2017-01-31 ASM IP Holding B.V Method for forming Ti-containing film by PEALD using TDMAT or TDEAT
US10179947B2 (en) 2013-11-26 2019-01-15 Asm Ip Holding B.V. Method for forming conformal nitrided, oxidized, or carbonized dielectric film by atomic layer deposition
US10683571B2 (en) 2014-02-25 2020-06-16 Asm Ip Holding B.V. Gas supply manifold and method of supplying gases to chamber using same
US9447498B2 (en) 2014-03-18 2016-09-20 Asm Ip Holding B.V. Method for performing uniform processing in gas system-sharing multiple reaction chambers
US10167557B2 (en) 2014-03-18 2019-01-01 Asm Ip Holding B.V. Gas distribution system, reactor including the system, and methods of using the same
US11015245B2 (en) 2014-03-19 2021-05-25 Asm Ip Holding B.V. Gas-phase reactor and system having exhaust plenum and components thereof
US9404587B2 (en) 2014-04-24 2016-08-02 ASM IP Holding B.V Lockout tagout for semiconductor vacuum valve
JP6345006B2 (ja) * 2014-07-08 2018-06-20 キヤノン株式会社 インクジェット記録ヘッド用基板の製造方法
US10858737B2 (en) 2014-07-28 2020-12-08 Asm Ip Holding B.V. Showerhead assembly and components thereof
US9543180B2 (en) 2014-08-01 2017-01-10 Asm Ip Holding B.V. Apparatus and method for transporting wafers between wafer carrier and process tool under vacuum
CN104209254B (zh) * 2014-08-15 2016-05-11 上海华力微电子有限公司 用于多孔低介电常数材料的紫外光固化工艺方法
US9890456B2 (en) 2014-08-21 2018-02-13 Asm Ip Holding B.V. Method and system for in situ formation of gas-phase compounds
US10941490B2 (en) 2014-10-07 2021-03-09 Asm Ip Holding B.V. Multiple temperature range susceptor, assembly, reactor and system including the susceptor, and methods of using the same
US9657845B2 (en) 2014-10-07 2017-05-23 Asm Ip Holding B.V. Variable conductance gas distribution apparatus and method
KR102300403B1 (ko) 2014-11-19 2021-09-09 에이에스엠 아이피 홀딩 비.브이. 박막 증착 방법
KR102263121B1 (ko) 2014-12-22 2021-06-09 에이에스엠 아이피 홀딩 비.브이. 반도체 소자 및 그 제조 방법
US9478415B2 (en) 2015-02-13 2016-10-25 Asm Ip Holding B.V. Method for forming film having low resistance and shallow junction depth
US10529542B2 (en) 2015-03-11 2020-01-07 Asm Ip Holdings B.V. Cross-flow reactor and method
US10276355B2 (en) 2015-03-12 2019-04-30 Asm Ip Holding B.V. Multi-zone reactor, system including the reactor, and method of using the same
US10458018B2 (en) 2015-06-26 2019-10-29 Asm Ip Holding B.V. Structures including metal carbide material, devices including the structures, and methods of forming same
US10600673B2 (en) 2015-07-07 2020-03-24 Asm Ip Holding B.V. Magnetic susceptor to baseplate seal
US9899291B2 (en) 2015-07-13 2018-02-20 Asm Ip Holding B.V. Method for protecting layer by forming hydrocarbon-based extremely thin film
US10043661B2 (en) 2015-07-13 2018-08-07 Asm Ip Holding B.V. Method for protecting layer by forming hydrocarbon-based extremely thin film
US10083836B2 (en) 2015-07-24 2018-09-25 Asm Ip Holding B.V. Formation of boron-doped titanium metal films with high work function
US10087525B2 (en) 2015-08-04 2018-10-02 Asm Ip Holding B.V. Variable gap hard stop design
US9647114B2 (en) 2015-08-14 2017-05-09 Asm Ip Holding B.V. Methods of forming highly p-type doped germanium tin films and structures and devices including the films
US9711345B2 (en) 2015-08-25 2017-07-18 Asm Ip Holding B.V. Method for forming aluminum nitride-based film by PEALD
US9960072B2 (en) 2015-09-29 2018-05-01 Asm Ip Holding B.V. Variable adjustment for precise matching of multiple chamber cavity housings
US9909214B2 (en) 2015-10-15 2018-03-06 Asm Ip Holding B.V. Method for depositing dielectric film in trenches by PEALD
US10211308B2 (en) 2015-10-21 2019-02-19 Asm Ip Holding B.V. NbMC layers
US10322384B2 (en) 2015-11-09 2019-06-18 Asm Ip Holding B.V. Counter flow mixer for process chamber
US9455138B1 (en) 2015-11-10 2016-09-27 Asm Ip Holding B.V. Method for forming dielectric film in trenches by PEALD using H-containing gas
US9905420B2 (en) 2015-12-01 2018-02-27 Asm Ip Holding B.V. Methods of forming silicon germanium tin films and structures and devices including the films
US9607837B1 (en) 2015-12-21 2017-03-28 Asm Ip Holding B.V. Method for forming silicon oxide cap layer for solid state diffusion process
US9735024B2 (en) 2015-12-28 2017-08-15 Asm Ip Holding B.V. Method of atomic layer etching using functional group-containing fluorocarbon
US9627221B1 (en) 2015-12-28 2017-04-18 Asm Ip Holding B.V. Continuous process incorporating atomic layer etching
US11139308B2 (en) 2015-12-29 2021-10-05 Asm Ip Holding B.V. Atomic layer deposition of III-V compounds to form V-NAND devices
US10468251B2 (en) 2016-02-19 2019-11-05 Asm Ip Holding B.V. Method for forming spacers using silicon nitride film for spacer-defined multiple patterning
US10529554B2 (en) 2016-02-19 2020-01-07 Asm Ip Holding B.V. Method for forming silicon nitride film selectively on sidewalls or flat surfaces of trenches
US9754779B1 (en) 2016-02-19 2017-09-05 Asm Ip Holding B.V. Method for forming silicon nitride film selectively on sidewalls or flat surfaces of trenches
US10501866B2 (en) 2016-03-09 2019-12-10 Asm Ip Holding B.V. Gas distribution apparatus for improved film uniformity in an epitaxial system
US10343920B2 (en) 2016-03-18 2019-07-09 Asm Ip Holding B.V. Aligned carbon nanotubes
US9892913B2 (en) 2016-03-24 2018-02-13 Asm Ip Holding B.V. Radial and thickness control via biased multi-port injection settings
US10087522B2 (en) 2016-04-21 2018-10-02 Asm Ip Holding B.V. Deposition of metal borides
US10190213B2 (en) 2016-04-21 2019-01-29 Asm Ip Holding B.V. Deposition of metal borides
US10865475B2 (en) 2016-04-21 2020-12-15 Asm Ip Holding B.V. Deposition of metal borides and silicides
US10367080B2 (en) 2016-05-02 2019-07-30 Asm Ip Holding B.V. Method of forming a germanium oxynitride film
US10032628B2 (en) 2016-05-02 2018-07-24 Asm Ip Holding B.V. Source/drain performance through conformal solid state doping
KR102592471B1 (ko) 2016-05-17 2023-10-20 에이에스엠 아이피 홀딩 비.브이. 금속 배선 형성 방법 및 이를 이용한 반도체 장치의 제조 방법
US11453943B2 (en) 2016-05-25 2022-09-27 Asm Ip Holding B.V. Method for forming carbon-containing silicon/metal oxide or nitride film by ALD using silicon precursor and hydrocarbon precursor
US10388509B2 (en) 2016-06-28 2019-08-20 Asm Ip Holding B.V. Formation of epitaxial layers via dislocation filtering
US9859151B1 (en) 2016-07-08 2018-01-02 Asm Ip Holding B.V. Selective film deposition method to form air gaps
US10612137B2 (en) 2016-07-08 2020-04-07 Asm Ip Holdings B.V. Organic reactants for atomic layer deposition
US9793135B1 (en) 2016-07-14 2017-10-17 ASM IP Holding B.V Method of cyclic dry etching using etchant film
US10714385B2 (en) 2016-07-19 2020-07-14 Asm Ip Holding B.V. Selective deposition of tungsten
KR102354490B1 (ko) 2016-07-27 2022-01-21 에이에스엠 아이피 홀딩 비.브이. 기판 처리 방법
US9812320B1 (en) 2016-07-28 2017-11-07 Asm Ip Holding B.V. Method and apparatus for filling a gap
US9887082B1 (en) 2016-07-28 2018-02-06 Asm Ip Holding B.V. Method and apparatus for filling a gap
US10395919B2 (en) 2016-07-28 2019-08-27 Asm Ip Holding B.V. Method and apparatus for filling a gap
US10177025B2 (en) 2016-07-28 2019-01-08 Asm Ip Holding B.V. Method and apparatus for filling a gap
KR102532607B1 (ko) 2016-07-28 2023-05-15 에이에스엠 아이피 홀딩 비.브이. 기판 가공 장치 및 그 동작 방법
US10090316B2 (en) 2016-09-01 2018-10-02 Asm Ip Holding B.V. 3D stacked multilayer semiconductor memory using doped select transistor channel
US10410943B2 (en) 2016-10-13 2019-09-10 Asm Ip Holding B.V. Method for passivating a surface of a semiconductor and related systems
US10643826B2 (en) 2016-10-26 2020-05-05 Asm Ip Holdings B.V. Methods for thermally calibrating reaction chambers
US11532757B2 (en) 2016-10-27 2022-12-20 Asm Ip Holding B.V. Deposition of charge trapping layers
US10643904B2 (en) 2016-11-01 2020-05-05 Asm Ip Holdings B.V. Methods for forming a semiconductor device and related semiconductor device structures
US10714350B2 (en) 2016-11-01 2020-07-14 ASM IP Holdings, B.V. Methods for forming a transition metal niobium nitride film on a substrate by atomic layer deposition and related semiconductor device structures
US10229833B2 (en) 2016-11-01 2019-03-12 Asm Ip Holding B.V. Methods for forming a transition metal nitride film on a substrate by atomic layer deposition and related semiconductor device structures
US10435790B2 (en) 2016-11-01 2019-10-08 Asm Ip Holding B.V. Method of subatmospheric plasma-enhanced ALD using capacitively coupled electrodes with narrow gap
US10134757B2 (en) 2016-11-07 2018-11-20 Asm Ip Holding B.V. Method of processing a substrate and a device manufactured by using the method
KR102546317B1 (ko) 2016-11-15 2023-06-21 에이에스엠 아이피 홀딩 비.브이. 기체 공급 유닛 및 이를 포함하는 기판 처리 장치
US10340135B2 (en) 2016-11-28 2019-07-02 Asm Ip Holding B.V. Method of topologically restricted plasma-enhanced cyclic deposition of silicon or metal nitride
KR20180068582A (ko) 2016-12-14 2018-06-22 에이에스엠 아이피 홀딩 비.브이. 기판 처리 장치
US11581186B2 (en) 2016-12-15 2023-02-14 Asm Ip Holding B.V. Sequential infiltration synthesis apparatus
US11447861B2 (en) 2016-12-15 2022-09-20 Asm Ip Holding B.V. Sequential infiltration synthesis apparatus and a method of forming a patterned structure
US9916980B1 (en) 2016-12-15 2018-03-13 Asm Ip Holding B.V. Method of forming a structure on a substrate
KR20180070971A (ko) 2016-12-19 2018-06-27 에이에스엠 아이피 홀딩 비.브이. 기판 처리 장치
US10269558B2 (en) 2016-12-22 2019-04-23 Asm Ip Holding B.V. Method of forming a structure on a substrate
US10867788B2 (en) 2016-12-28 2020-12-15 Asm Ip Holding B.V. Method of forming a structure on a substrate
US11390950B2 (en) 2017-01-10 2022-07-19 Asm Ip Holding B.V. Reactor system and method to reduce residue buildup during a film deposition process
US10655221B2 (en) 2017-02-09 2020-05-19 Asm Ip Holding B.V. Method for depositing oxide film by thermal ALD and PEALD
US10468261B2 (en) 2017-02-15 2019-11-05 Asm Ip Holding B.V. Methods for forming a metallic film on a substrate by cyclical deposition and related semiconductor device structures
US10529563B2 (en) 2017-03-29 2020-01-07 Asm Ip Holdings B.V. Method for forming doped metal oxide films on a substrate by cyclical deposition and related semiconductor device structures
US10283353B2 (en) 2017-03-29 2019-05-07 Asm Ip Holding B.V. Method of reforming insulating film deposited on substrate with recess pattern
US10103040B1 (en) 2017-03-31 2018-10-16 Asm Ip Holding B.V. Apparatus and method for manufacturing a semiconductor device
USD830981S1 (en) 2017-04-07 2018-10-16 Asm Ip Holding B.V. Susceptor for semiconductor substrate processing apparatus
KR102457289B1 (ko) 2017-04-25 2022-10-21 에이에스엠 아이피 홀딩 비.브이. 박막 증착 방법 및 반도체 장치의 제조 방법
US10892156B2 (en) 2017-05-08 2021-01-12 Asm Ip Holding B.V. Methods for forming a silicon nitride film on a substrate and related semiconductor device structures
US10446393B2 (en) 2017-05-08 2019-10-15 Asm Ip Holding B.V. Methods for forming silicon-containing epitaxial layers and related semiconductor device structures
US10770286B2 (en) 2017-05-08 2020-09-08 Asm Ip Holdings B.V. Methods for selectively forming a silicon nitride film on a substrate and related semiconductor device structures
US10504742B2 (en) 2017-05-31 2019-12-10 Asm Ip Holding B.V. Method of atomic layer etching using hydrogen plasma
US10886123B2 (en) 2017-06-02 2021-01-05 Asm Ip Holding B.V. Methods for forming low temperature semiconductor layers and related semiconductor device structures
US11306395B2 (en) 2017-06-28 2022-04-19 Asm Ip Holding B.V. Methods for depositing a transition metal nitride film on a substrate by atomic layer deposition and related deposition apparatus
US10685834B2 (en) 2017-07-05 2020-06-16 Asm Ip Holdings B.V. Methods for forming a silicon germanium tin layer and related semiconductor device structures
KR20190009245A (ko) 2017-07-18 2019-01-28 에이에스엠 아이피 홀딩 비.브이. 반도체 소자 구조물 형성 방법 및 관련된 반도체 소자 구조물
US11374112B2 (en) 2017-07-19 2022-06-28 Asm Ip Holding B.V. Method for depositing a group IV semiconductor and related semiconductor device structures
US11018002B2 (en) 2017-07-19 2021-05-25 Asm Ip Holding B.V. Method for selectively depositing a Group IV semiconductor and related semiconductor device structures
US10541333B2 (en) 2017-07-19 2020-01-21 Asm Ip Holding B.V. Method for depositing a group IV semiconductor and related semiconductor device structures
US10312055B2 (en) 2017-07-26 2019-06-04 Asm Ip Holding B.V. Method of depositing film by PEALD using negative bias
US10590535B2 (en) 2017-07-26 2020-03-17 Asm Ip Holdings B.V. Chemical treatment, deposition and/or infiltration apparatus and method for using the same
US10605530B2 (en) 2017-07-26 2020-03-31 Asm Ip Holding B.V. Assembly of a liner and a flange for a vertical furnace as well as the liner and the vertical furnace
US10692741B2 (en) 2017-08-08 2020-06-23 Asm Ip Holdings B.V. Radiation shield
US10770336B2 (en) 2017-08-08 2020-09-08 Asm Ip Holding B.V. Substrate lift mechanism and reactor including same
US10249524B2 (en) 2017-08-09 2019-04-02 Asm Ip Holding B.V. Cassette holder assembly for a substrate cassette and holding member for use in such assembly
US11769682B2 (en) 2017-08-09 2023-09-26 Asm Ip Holding B.V. Storage apparatus for storing cassettes for substrates and processing apparatus equipped therewith
US11139191B2 (en) 2017-08-09 2021-10-05 Asm Ip Holding B.V. Storage apparatus for storing cassettes for substrates and processing apparatus equipped therewith
US10236177B1 (en) 2017-08-22 2019-03-19 ASM IP Holding B.V.. Methods for depositing a doped germanium tin semiconductor and related semiconductor device structures
CN107523808B (zh) * 2017-08-23 2019-05-10 江苏菲沃泰纳米科技有限公司 一种有机硅纳米防护涂层的制备方法
USD900036S1 (en) 2017-08-24 2020-10-27 Asm Ip Holding B.V. Heater electrical connector and adapter
US11830730B2 (en) 2017-08-29 2023-11-28 Asm Ip Holding B.V. Layer forming method and apparatus
US11295980B2 (en) 2017-08-30 2022-04-05 Asm Ip Holding B.V. Methods for depositing a molybdenum metal film over a dielectric surface of a substrate by a cyclical deposition process and related semiconductor device structures
KR102491945B1 (ko) 2017-08-30 2023-01-26 에이에스엠 아이피 홀딩 비.브이. 기판 처리 장치
US11056344B2 (en) 2017-08-30 2021-07-06 Asm Ip Holding B.V. Layer forming method
KR102401446B1 (ko) 2017-08-31 2022-05-24 에이에스엠 아이피 홀딩 비.브이. 기판 처리 장치
US10607895B2 (en) 2017-09-18 2020-03-31 Asm Ip Holdings B.V. Method for forming a semiconductor device structure comprising a gate fill metal
KR102630301B1 (ko) 2017-09-21 2024-01-29 에이에스엠 아이피 홀딩 비.브이. 침투성 재료의 순차 침투 합성 방법 처리 및 이를 이용하여 형성된 구조물 및 장치
US10844484B2 (en) 2017-09-22 2020-11-24 Asm Ip Holding B.V. Apparatus for dispensing a vapor phase reactant to a reaction chamber and related methods
US10658205B2 (en) 2017-09-28 2020-05-19 Asm Ip Holdings B.V. Chemical dispensing apparatus and methods for dispensing a chemical to a reaction chamber
US10403504B2 (en) 2017-10-05 2019-09-03 Asm Ip Holding B.V. Method for selectively depositing a metallic film on a substrate
US10020254B1 (en) 2017-10-09 2018-07-10 International Business Machines Corporation Integration of super via structure in BEOL
US10319588B2 (en) 2017-10-10 2019-06-11 Asm Ip Holding B.V. Method for depositing a metal chalcogenide on a substrate by cyclical deposition
KR102470206B1 (ko) 2017-10-13 2022-11-23 삼성디스플레이 주식회사 금속 산화막의 제조 방법 및 금속 산화막을 포함하는 표시 소자
US10923344B2 (en) 2017-10-30 2021-02-16 Asm Ip Holding B.V. Methods for forming a semiconductor structure and related semiconductor structures
KR102443047B1 (ko) 2017-11-16 2022-09-14 에이에스엠 아이피 홀딩 비.브이. 기판 처리 장치 방법 및 그에 의해 제조된 장치
US10910262B2 (en) 2017-11-16 2021-02-02 Asm Ip Holding B.V. Method of selectively depositing a capping layer structure on a semiconductor device structure
US11022879B2 (en) 2017-11-24 2021-06-01 Asm Ip Holding B.V. Method of forming an enhanced unexposed photoresist layer
CN111316417B (zh) 2017-11-27 2023-12-22 阿斯莫Ip控股公司 与批式炉偕同使用的用于储存晶圆匣的储存装置
US11639811B2 (en) 2017-11-27 2023-05-02 Asm Ip Holding B.V. Apparatus including a clean mini environment
US10290508B1 (en) 2017-12-05 2019-05-14 Asm Ip Holding B.V. Method for forming vertical spacers for spacer-defined patterning
US10872771B2 (en) 2018-01-16 2020-12-22 Asm Ip Holding B. V. Method for depositing a material film on a substrate within a reaction chamber by a cyclical deposition process and related device structures
US11482412B2 (en) 2018-01-19 2022-10-25 Asm Ip Holding B.V. Method for depositing a gap-fill layer by plasma-assisted deposition
TWI799494B (zh) 2018-01-19 2023-04-21 荷蘭商Asm 智慧財產控股公司 沈積方法
USD903477S1 (en) 2018-01-24 2020-12-01 Asm Ip Holdings B.V. Metal clamp
US11018047B2 (en) 2018-01-25 2021-05-25 Asm Ip Holding B.V. Hybrid lift pin
USD880437S1 (en) 2018-02-01 2020-04-07 Asm Ip Holding B.V. Gas supply plate for semiconductor manufacturing apparatus
US10535516B2 (en) 2018-02-01 2020-01-14 Asm Ip Holdings B.V. Method for depositing a semiconductor structure on a surface of a substrate and related semiconductor structures
US11081345B2 (en) 2018-02-06 2021-08-03 Asm Ip Holding B.V. Method of post-deposition treatment for silicon oxide film
US10896820B2 (en) 2018-02-14 2021-01-19 Asm Ip Holding B.V. Method for depositing a ruthenium-containing film on a substrate by a cyclical deposition process
WO2019158960A1 (en) 2018-02-14 2019-08-22 Asm Ip Holding B.V. A method for depositing a ruthenium-containing film on a substrate by a cyclical deposition process
US10731249B2 (en) 2018-02-15 2020-08-04 Asm Ip Holding B.V. Method of forming a transition metal containing film on a substrate by a cyclical deposition process, a method for supplying a transition metal halide compound to a reaction chamber, and related vapor deposition apparatus
US10658181B2 (en) 2018-02-20 2020-05-19 Asm Ip Holding B.V. Method of spacer-defined direct patterning in semiconductor fabrication
KR102636427B1 (ko) 2018-02-20 2024-02-13 에이에스엠 아이피 홀딩 비.브이. 기판 처리 방법 및 장치
US10975470B2 (en) 2018-02-23 2021-04-13 Asm Ip Holding B.V. Apparatus for detecting or monitoring for a chemical precursor in a high temperature environment
US11473195B2 (en) 2018-03-01 2022-10-18 Asm Ip Holding B.V. Semiconductor processing apparatus and a method for processing a substrate
US11629406B2 (en) 2018-03-09 2023-04-18 Asm Ip Holding B.V. Semiconductor processing apparatus comprising one or more pyrometers for measuring a temperature of a substrate during transfer of the substrate
US11114283B2 (en) 2018-03-16 2021-09-07 Asm Ip Holding B.V. Reactor, system including the reactor, and methods of manufacturing and using same
KR102646467B1 (ko) 2018-03-27 2024-03-11 에이에스엠 아이피 홀딩 비.브이. 기판 상에 전극을 형성하는 방법 및 전극을 포함하는 반도체 소자 구조
US10510536B2 (en) 2018-03-29 2019-12-17 Asm Ip Holding B.V. Method of depositing a co-doped polysilicon film on a surface of a substrate within a reaction chamber
US11230766B2 (en) 2018-03-29 2022-01-25 Asm Ip Holding B.V. Substrate processing apparatus and method
US11088002B2 (en) 2018-03-29 2021-08-10 Asm Ip Holding B.V. Substrate rack and a substrate processing system and method
KR102501472B1 (ko) 2018-03-30 2023-02-20 에이에스엠 아이피 홀딩 비.브이. 기판 처리 방법
TWI811348B (zh) 2018-05-08 2023-08-11 荷蘭商Asm 智慧財產控股公司 藉由循環沉積製程於基板上沉積氧化物膜之方法及相關裝置結構
KR20190129718A (ko) 2018-05-11 2019-11-20 에이에스엠 아이피 홀딩 비.브이. 기판 상에 피도핑 금속 탄화물 막을 형성하는 방법 및 관련 반도체 소자 구조
KR102596988B1 (ko) 2018-05-28 2023-10-31 에이에스엠 아이피 홀딩 비.브이. 기판 처리 방법 및 그에 의해 제조된 장치
US11270899B2 (en) 2018-06-04 2022-03-08 Asm Ip Holding B.V. Wafer handling chamber with moisture reduction
US11718913B2 (en) 2018-06-04 2023-08-08 Asm Ip Holding B.V. Gas distribution system and reactor system including same
US11286562B2 (en) 2018-06-08 2022-03-29 Asm Ip Holding B.V. Gas-phase chemical reactor and method of using same
US10797133B2 (en) 2018-06-21 2020-10-06 Asm Ip Holding B.V. Method for depositing a phosphorus doped silicon arsenide film and related semiconductor device structures
KR102568797B1 (ko) 2018-06-21 2023-08-21 에이에스엠 아이피 홀딩 비.브이. 기판 처리 시스템
TW202405221A (zh) 2018-06-27 2024-02-01 荷蘭商Asm Ip私人控股有限公司 用於形成含金屬材料及包含含金屬材料的膜及結構之循環沉積方法
CN112292478A (zh) 2018-06-27 2021-01-29 Asm Ip私人控股有限公司 用于形成含金属的材料的循环沉积方法及包含含金属的材料的膜和结构
US10612136B2 (en) 2018-06-29 2020-04-07 ASM IP Holding, B.V. Temperature-controlled flange and reactor system including same
KR20200002519A (ko) 2018-06-29 2020-01-08 에이에스엠 아이피 홀딩 비.브이. 박막 증착 방법 및 반도체 장치의 제조 방법
US10755922B2 (en) 2018-07-03 2020-08-25 Asm Ip Holding B.V. Method for depositing silicon-free carbon-containing film as gap-fill layer by pulse plasma-assisted deposition
US10388513B1 (en) 2018-07-03 2019-08-20 Asm Ip Holding B.V. Method for depositing silicon-free carbon-containing film as gap-fill layer by pulse plasma-assisted deposition
US10767789B2 (en) 2018-07-16 2020-09-08 Asm Ip Holding B.V. Diaphragm valves, valve components, and methods for forming valve components
US10483099B1 (en) 2018-07-26 2019-11-19 Asm Ip Holding B.V. Method for forming thermally stable organosilicon polymer film
US11053591B2 (en) 2018-08-06 2021-07-06 Asm Ip Holding B.V. Multi-port gas injection system and reactor system including same
US10883175B2 (en) 2018-08-09 2021-01-05 Asm Ip Holding B.V. Vertical furnace for processing substrates and a liner for use therein
US10829852B2 (en) 2018-08-16 2020-11-10 Asm Ip Holding B.V. Gas distribution device for a wafer processing apparatus
US11430674B2 (en) 2018-08-22 2022-08-30 Asm Ip Holding B.V. Sensor array, apparatus for dispensing a vapor phase reactant to a reaction chamber and related methods
KR20200030162A (ko) 2018-09-11 2020-03-20 에이에스엠 아이피 홀딩 비.브이. 박막 증착 방법
US11024523B2 (en) 2018-09-11 2021-06-01 Asm Ip Holding B.V. Substrate processing apparatus and method
US11049751B2 (en) 2018-09-14 2021-06-29 Asm Ip Holding B.V. Cassette supply system to store and handle cassettes and processing apparatus equipped therewith
CN110970344A (zh) 2018-10-01 2020-04-07 Asm Ip控股有限公司 衬底保持设备、包含所述设备的系统及其使用方法
US11232963B2 (en) 2018-10-03 2022-01-25 Asm Ip Holding B.V. Substrate processing apparatus and method
KR102592699B1 (ko) 2018-10-08 2023-10-23 에이에스엠 아이피 홀딩 비.브이. 기판 지지 유닛 및 이를 포함하는 박막 증착 장치와 기판 처리 장치
US10847365B2 (en) 2018-10-11 2020-11-24 Asm Ip Holding B.V. Method of forming conformal silicon carbide film by cyclic CVD
US10811256B2 (en) 2018-10-16 2020-10-20 Asm Ip Holding B.V. Method for etching a carbon-containing feature
KR102546322B1 (ko) 2018-10-19 2023-06-21 에이에스엠 아이피 홀딩 비.브이. 기판 처리 장치 및 기판 처리 방법
KR102605121B1 (ko) 2018-10-19 2023-11-23 에이에스엠 아이피 홀딩 비.브이. 기판 처리 장치 및 기판 처리 방법
USD948463S1 (en) 2018-10-24 2022-04-12 Asm Ip Holding B.V. Susceptor for semiconductor substrate supporting apparatus
US10381219B1 (en) 2018-10-25 2019-08-13 Asm Ip Holding B.V. Methods for forming a silicon nitride film
US11087997B2 (en) 2018-10-31 2021-08-10 Asm Ip Holding B.V. Substrate processing apparatus for processing substrates
KR20200051105A (ko) 2018-11-02 2020-05-13 에이에스엠 아이피 홀딩 비.브이. 기판 지지 유닛 및 이를 포함하는 기판 처리 장치
US11572620B2 (en) 2018-11-06 2023-02-07 Asm Ip Holding B.V. Methods for selectively depositing an amorphous silicon film on a substrate
US11031242B2 (en) 2018-11-07 2021-06-08 Asm Ip Holding B.V. Methods for depositing a boron doped silicon germanium film
US10818758B2 (en) 2018-11-16 2020-10-27 Asm Ip Holding B.V. Methods for forming a metal silicate film on a substrate in a reaction chamber and related semiconductor device structures
US10847366B2 (en) 2018-11-16 2020-11-24 Asm Ip Holding B.V. Methods for depositing a transition metal chalcogenide film on a substrate by a cyclical deposition process
US10559458B1 (en) 2018-11-26 2020-02-11 Asm Ip Holding B.V. Method of forming oxynitride film
US11217444B2 (en) 2018-11-30 2022-01-04 Asm Ip Holding B.V. Method for forming an ultraviolet radiation responsive metal oxide-containing film
KR102636428B1 (ko) 2018-12-04 2024-02-13 에이에스엠 아이피 홀딩 비.브이. 기판 처리 장치를 세정하는 방법
US11158513B2 (en) 2018-12-13 2021-10-26 Asm Ip Holding B.V. Methods for forming a rhenium-containing film on a substrate by a cyclical deposition process and related semiconductor device structures
TW202037745A (zh) 2018-12-14 2020-10-16 荷蘭商Asm Ip私人控股有限公司 形成裝置結構之方法、其所形成之結構及施行其之系統
TW202405220A (zh) 2019-01-17 2024-02-01 荷蘭商Asm Ip 私人控股有限公司 藉由循環沈積製程於基板上形成含過渡金屬膜之方法
KR20200091543A (ko) 2019-01-22 2020-07-31 에이에스엠 아이피 홀딩 비.브이. 기판 처리 장치
CN111524788B (zh) 2019-02-01 2023-11-24 Asm Ip私人控股有限公司 氧化硅的拓扑选择性膜形成的方法
TW202104632A (zh) 2019-02-20 2021-02-01 荷蘭商Asm Ip私人控股有限公司 用來填充形成於基材表面內之凹部的循環沉積方法及設備
KR20200102357A (ko) 2019-02-20 2020-08-31 에이에스엠 아이피 홀딩 비.브이. 3-d nand 응용의 플러그 충진체 증착용 장치 및 방법
KR102626263B1 (ko) 2019-02-20 2024-01-16 에이에스엠 아이피 홀딩 비.브이. 처리 단계를 포함하는 주기적 증착 방법 및 이를 위한 장치
JP2020136678A (ja) 2019-02-20 2020-08-31 エーエスエム・アイピー・ホールディング・ベー・フェー 基材表面内に形成された凹部を充填するための方法および装置
JP2020133004A (ja) 2019-02-22 2020-08-31 エーエスエム・アイピー・ホールディング・ベー・フェー 基材を処理するための基材処理装置および方法
KR20200108243A (ko) 2019-03-08 2020-09-17 에이에스엠 아이피 홀딩 비.브이. SiOC 층을 포함한 구조체 및 이의 형성 방법
KR20200108242A (ko) 2019-03-08 2020-09-17 에이에스엠 아이피 홀딩 비.브이. 실리콘 질화물 층을 선택적으로 증착하는 방법, 및 선택적으로 증착된 실리콘 질화물 층을 포함하는 구조체
KR20200108248A (ko) 2019-03-08 2020-09-17 에이에스엠 아이피 홀딩 비.브이. SiOCN 층을 포함한 구조체 및 이의 형성 방법
JP2020167398A (ja) 2019-03-28 2020-10-08 エーエスエム・アイピー・ホールディング・ベー・フェー ドアオープナーおよびドアオープナーが提供される基材処理装置
KR20200116855A (ko) 2019-04-01 2020-10-13 에이에스엠 아이피 홀딩 비.브이. 반도체 소자를 제조하는 방법
US11447864B2 (en) 2019-04-19 2022-09-20 Asm Ip Holding B.V. Layer forming method and apparatus
KR20200125453A (ko) 2019-04-24 2020-11-04 에이에스엠 아이피 홀딩 비.브이. 기상 반응기 시스템 및 이를 사용하는 방법
KR20200130121A (ko) 2019-05-07 2020-11-18 에이에스엠 아이피 홀딩 비.브이. 딥 튜브가 있는 화학물질 공급원 용기
KR20200130118A (ko) 2019-05-07 2020-11-18 에이에스엠 아이피 홀딩 비.브이. 비정질 탄소 중합체 막을 개질하는 방법
KR20200130652A (ko) 2019-05-10 2020-11-19 에이에스엠 아이피 홀딩 비.브이. 표면 상에 재료를 증착하는 방법 및 본 방법에 따라 형성된 구조
JP2020188255A (ja) 2019-05-16 2020-11-19 エーエスエム アイピー ホールディング ビー.ブイ. ウェハボートハンドリング装置、縦型バッチ炉および方法
JP2020188254A (ja) 2019-05-16 2020-11-19 エーエスエム アイピー ホールディング ビー.ブイ. ウェハボートハンドリング装置、縦型バッチ炉および方法
CN110129769B (zh) * 2019-05-17 2021-05-14 江苏菲沃泰纳米科技股份有限公司 疏水性的低介电常数膜及其制备方法
USD947913S1 (en) 2019-05-17 2022-04-05 Asm Ip Holding B.V. Susceptor shaft
USD975665S1 (en) 2019-05-17 2023-01-17 Asm Ip Holding B.V. Susceptor shaft
CN110158052B (zh) 2019-05-17 2021-05-14 江苏菲沃泰纳米科技股份有限公司 低介电常数膜及其制备方法
USD935572S1 (en) 2019-05-24 2021-11-09 Asm Ip Holding B.V. Gas channel plate
USD922229S1 (en) 2019-06-05 2021-06-15 Asm Ip Holding B.V. Device for controlling a temperature of a gas supply unit
KR20200141002A (ko) 2019-06-06 2020-12-17 에이에스엠 아이피 홀딩 비.브이. 배기 가스 분석을 포함한 기상 반응기 시스템을 사용하는 방법
CN110255999B (zh) * 2019-06-10 2021-02-12 北京科技大学 一种氮氧双掺杂多孔空心碗形碳材料及其制备方法
KR20200143254A (ko) 2019-06-11 2020-12-23 에이에스엠 아이피 홀딩 비.브이. 개질 가스를 사용하여 전자 구조를 형성하는 방법, 상기 방법을 수행하기 위한 시스템, 및 상기 방법을 사용하여 형성되는 구조
USD944946S1 (en) 2019-06-14 2022-03-01 Asm Ip Holding B.V. Shower plate
USD931978S1 (en) 2019-06-27 2021-09-28 Asm Ip Holding B.V. Showerhead vacuum transport
KR20210005515A (ko) 2019-07-03 2021-01-14 에이에스엠 아이피 홀딩 비.브이. 기판 처리 장치용 온도 제어 조립체 및 이를 사용하는 방법
JP2021015791A (ja) 2019-07-09 2021-02-12 エーエスエム アイピー ホールディング ビー.ブイ. 同軸導波管を用いたプラズマ装置、基板処理方法
CN112216646A (zh) 2019-07-10 2021-01-12 Asm Ip私人控股有限公司 基板支撑组件及包括其的基板处理装置
KR20210010307A (ko) 2019-07-16 2021-01-27 에이에스엠 아이피 홀딩 비.브이. 기판 처리 장치
KR20210010820A (ko) 2019-07-17 2021-01-28 에이에스엠 아이피 홀딩 비.브이. 실리콘 게르마늄 구조를 형성하는 방법
KR20210010816A (ko) 2019-07-17 2021-01-28 에이에스엠 아이피 홀딩 비.브이. 라디칼 보조 점화 플라즈마 시스템 및 방법
US11643724B2 (en) 2019-07-18 2023-05-09 Asm Ip Holding B.V. Method of forming structures using a neutral beam
CN112242296A (zh) 2019-07-19 2021-01-19 Asm Ip私人控股有限公司 形成拓扑受控的无定形碳聚合物膜的方法
CN112309843A (zh) 2019-07-29 2021-02-02 Asm Ip私人控股有限公司 实现高掺杂剂掺入的选择性沉积方法
CN112309900A (zh) 2019-07-30 2021-02-02 Asm Ip私人控股有限公司 基板处理设备
CN112309899A (zh) 2019-07-30 2021-02-02 Asm Ip私人控股有限公司 基板处理设备
US11587815B2 (en) 2019-07-31 2023-02-21 Asm Ip Holding B.V. Vertical batch furnace assembly
US11587814B2 (en) 2019-07-31 2023-02-21 Asm Ip Holding B.V. Vertical batch furnace assembly
US11227782B2 (en) 2019-07-31 2022-01-18 Asm Ip Holding B.V. Vertical batch furnace assembly
CN112323048B (zh) 2019-08-05 2024-02-09 Asm Ip私人控股有限公司 用于化学源容器的液位传感器
USD965524S1 (en) 2019-08-19 2022-10-04 Asm Ip Holding B.V. Susceptor support
USD965044S1 (en) 2019-08-19 2022-09-27 Asm Ip Holding B.V. Susceptor shaft
JP2021031769A (ja) 2019-08-21 2021-03-01 エーエスエム アイピー ホールディング ビー.ブイ. 成膜原料混合ガス生成装置及び成膜装置
USD949319S1 (en) 2019-08-22 2022-04-19 Asm Ip Holding B.V. Exhaust duct
USD930782S1 (en) 2019-08-22 2021-09-14 Asm Ip Holding B.V. Gas distributor
USD979506S1 (en) 2019-08-22 2023-02-28 Asm Ip Holding B.V. Insulator
KR20210024423A (ko) 2019-08-22 2021-03-05 에이에스엠 아이피 홀딩 비.브이. 홀을 구비한 구조체를 형성하기 위한 방법
USD940837S1 (en) 2019-08-22 2022-01-11 Asm Ip Holding B.V. Electrode
US11286558B2 (en) 2019-08-23 2022-03-29 Asm Ip Holding B.V. Methods for depositing a molybdenum nitride film on a surface of a substrate by a cyclical deposition process and related semiconductor device structures including a molybdenum nitride film
KR20210024420A (ko) 2019-08-23 2021-03-05 에이에스엠 아이피 홀딩 비.브이. 비스(디에틸아미노)실란을 사용하여 peald에 의해 개선된 품질을 갖는 실리콘 산화물 막을 증착하기 위한 방법
KR20210029090A (ko) 2019-09-04 2021-03-15 에이에스엠 아이피 홀딩 비.브이. 희생 캡핑 층을 이용한 선택적 증착 방법
KR20210029663A (ko) 2019-09-05 2021-03-16 에이에스엠 아이피 홀딩 비.브이. 기판 처리 장치
US11562901B2 (en) 2019-09-25 2023-01-24 Asm Ip Holding B.V. Substrate processing method
CN112593212B (zh) 2019-10-02 2023-12-22 Asm Ip私人控股有限公司 通过循环等离子体增强沉积工艺形成拓扑选择性氧化硅膜的方法
TW202129060A (zh) 2019-10-08 2021-08-01 荷蘭商Asm Ip控股公司 基板處理裝置、及基板處理方法
KR20210043460A (ko) 2019-10-10 2021-04-21 에이에스엠 아이피 홀딩 비.브이. 포토레지스트 하부층을 형성하기 위한 방법 및 이를 포함한 구조체
KR20210045930A (ko) 2019-10-16 2021-04-27 에이에스엠 아이피 홀딩 비.브이. 실리콘 산화물의 토폴로지-선택적 막의 형성 방법
US11637014B2 (en) 2019-10-17 2023-04-25 Asm Ip Holding B.V. Methods for selective deposition of doped semiconductor material
KR20210047808A (ko) 2019-10-21 2021-04-30 에이에스엠 아이피 홀딩 비.브이. 막을 선택적으로 에칭하기 위한 장치 및 방법
KR20210050453A (ko) 2019-10-25 2021-05-07 에이에스엠 아이피 홀딩 비.브이. 기판 표면 상의 갭 피처를 충진하는 방법 및 이와 관련된 반도체 소자 구조
US11646205B2 (en) 2019-10-29 2023-05-09 Asm Ip Holding B.V. Methods of selectively forming n-type doped material on a surface, systems for selectively forming n-type doped material, and structures formed using same
KR20210054983A (ko) 2019-11-05 2021-05-14 에이에스엠 아이피 홀딩 비.브이. 도핑된 반도체 층을 갖는 구조체 및 이를 형성하기 위한 방법 및 시스템
US11501968B2 (en) 2019-11-15 2022-11-15 Asm Ip Holding B.V. Method for providing a semiconductor device with silicon filled gaps
KR20210062561A (ko) 2019-11-20 2021-05-31 에이에스엠 아이피 홀딩 비.브이. 기판의 표면 상에 탄소 함유 물질을 증착하는 방법, 상기 방법을 사용하여 형성된 구조물, 및 상기 구조물을 형성하기 위한 시스템
CN112951697A (zh) 2019-11-26 2021-06-11 Asm Ip私人控股有限公司 基板处理设备
US11450529B2 (en) 2019-11-26 2022-09-20 Asm Ip Holding B.V. Methods for selectively forming a target film on a substrate comprising a first dielectric surface and a second metallic surface
CN112885693A (zh) 2019-11-29 2021-06-01 Asm Ip私人控股有限公司 基板处理设备
CN112885692A (zh) 2019-11-29 2021-06-01 Asm Ip私人控股有限公司 基板处理设备
JP2021090042A (ja) 2019-12-02 2021-06-10 エーエスエム アイピー ホールディング ビー.ブイ. 基板処理装置、基板処理方法
KR20210070898A (ko) 2019-12-04 2021-06-15 에이에스엠 아이피 홀딩 비.브이. 기판 처리 장치
CN112992667A (zh) 2019-12-17 2021-06-18 Asm Ip私人控股有限公司 形成氮化钒层的方法和包括氮化钒层的结构
KR20210080214A (ko) 2019-12-19 2021-06-30 에이에스엠 아이피 홀딩 비.브이. 기판 상의 갭 피처를 충진하는 방법 및 이와 관련된 반도체 소자 구조
KR20210089077A (ko) 2020-01-06 2021-07-15 에이에스엠 아이피 홀딩 비.브이. 가스 공급 어셈블리, 이의 구성 요소, 및 이를 포함하는 반응기 시스템
US11993847B2 (en) 2020-01-08 2024-05-28 Asm Ip Holding B.V. Injector
KR20210095050A (ko) 2020-01-20 2021-07-30 에이에스엠 아이피 홀딩 비.브이. 박막 형성 방법 및 박막 표면 개질 방법
TW202130846A (zh) 2020-02-03 2021-08-16 荷蘭商Asm Ip私人控股有限公司 形成包括釩或銦層的結構之方法
TW202146882A (zh) 2020-02-04 2021-12-16 荷蘭商Asm Ip私人控股有限公司 驗證一物品之方法、用於驗證一物品之設備、及用於驗證一反應室之系統
US11776846B2 (en) 2020-02-07 2023-10-03 Asm Ip Holding B.V. Methods for depositing gap filling fluids and related systems and devices
US11781243B2 (en) 2020-02-17 2023-10-10 Asm Ip Holding B.V. Method for depositing low temperature phosphorous-doped silicon
TW202203344A (zh) 2020-02-28 2022-01-16 荷蘭商Asm Ip控股公司 專用於零件清潔的系統
KR20210116240A (ko) 2020-03-11 2021-09-27 에이에스엠 아이피 홀딩 비.브이. 조절성 접합부를 갖는 기판 핸들링 장치
US11876356B2 (en) 2020-03-11 2024-01-16 Asm Ip Holding B.V. Lockout tagout assembly and system and method of using same
KR20210117157A (ko) 2020-03-12 2021-09-28 에이에스엠 아이피 홀딩 비.브이. 타겟 토폴로지 프로파일을 갖는 층 구조를 제조하기 위한 방법
KR20210124042A (ko) 2020-04-02 2021-10-14 에이에스엠 아이피 홀딩 비.브이. 박막 형성 방법
TW202146689A (zh) 2020-04-03 2021-12-16 荷蘭商Asm Ip控股公司 阻障層形成方法及半導體裝置的製造方法
TW202145344A (zh) 2020-04-08 2021-12-01 荷蘭商Asm Ip私人控股有限公司 用於選擇性蝕刻氧化矽膜之設備及方法
US11821078B2 (en) 2020-04-15 2023-11-21 Asm Ip Holding B.V. Method for forming precoat film and method for forming silicon-containing film
US11996289B2 (en) 2020-04-16 2024-05-28 Asm Ip Holding B.V. Methods of forming structures including silicon germanium and silicon layers, devices formed using the methods, and systems for performing the methods
KR20210132600A (ko) 2020-04-24 2021-11-04 에이에스엠 아이피 홀딩 비.브이. 바나듐, 질소 및 추가 원소를 포함한 층을 증착하기 위한 방법 및 시스템
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US11898243B2 (en) 2020-04-24 2024-02-13 Asm Ip Holding B.V. Method of forming vanadium nitride-containing layer
KR20210134226A (ko) 2020-04-29 2021-11-09 에이에스엠 아이피 홀딩 비.브이. 고체 소스 전구체 용기
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KR20210141379A (ko) 2020-05-13 2021-11-23 에이에스엠 아이피 홀딩 비.브이. 반응기 시스템용 레이저 정렬 고정구
KR20210143653A (ko) 2020-05-19 2021-11-29 에이에스엠 아이피 홀딩 비.브이. 기판 처리 장치
KR20210145078A (ko) 2020-05-21 2021-12-01 에이에스엠 아이피 홀딩 비.브이. 다수의 탄소 층을 포함한 구조체 및 이를 형성하고 사용하는 방법
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USD990534S1 (en) 2020-09-11 2023-06-27 Asm Ip Holding B.V. Weighted lift pin
USD1012873S1 (en) 2020-09-24 2024-01-30 Asm Ip Holding B.V. Electrode for semiconductor processing apparatus
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CN114639631A (zh) 2020-12-16 2022-06-17 Asm Ip私人控股有限公司 跳动和摆动测量固定装置
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USD981973S1 (en) 2021-05-11 2023-03-28 Asm Ip Holding B.V. Reactor wall for substrate processing apparatus
USD1023959S1 (en) 2021-05-11 2024-04-23 Asm Ip Holding B.V. Electrode for substrate processing apparatus
USD980814S1 (en) 2021-05-11 2023-03-14 Asm Ip Holding B.V. Gas distributor for substrate processing apparatus
USD980813S1 (en) 2021-05-11 2023-03-14 Asm Ip Holding B.V. Gas flow control plate for substrate processing apparatus
CN113390305B (zh) * 2021-08-16 2021-10-29 北京航天天美科技有限公司 疏水憎冰涂层及具有该涂层的弹翼结构
USD990441S1 (en) 2021-09-07 2023-06-27 Asm Ip Holding B.V. Gas flow control plate

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6147009A (en) * 1998-06-29 2000-11-14 International Business Machines Corporation Hydrogenated oxidized silicon carbon material
US6312793B1 (en) * 1999-05-26 2001-11-06 International Business Machines Corporation Multiphase low dielectric constant material
JP3419745B2 (ja) * 2000-02-28 2003-06-23 キヤノン販売株式会社 半導体装置及びその製造方法
CN1257547C (zh) * 2000-08-02 2006-05-24 国际商业机器公司 多相低介电常数材料及其沉积方法与应用
US6768200B2 (en) * 2000-10-25 2004-07-27 International Business Machines Corporation Ultralow dielectric constant material as an intralevel or interlevel dielectric in a semiconductor device
US6790789B2 (en) 2000-10-25 2004-09-14 International Business Machines Corporation Ultralow dielectric constant material as an intralevel or interlevel dielectric in a semiconductor device and electronic device made
WO2002043119A2 (en) * 2000-10-25 2002-05-30 International Business Machines Corporation An ultralow dielectric constant material as an intralevel or interlevel dielectric in a semiconductor device, a method for fabricating the same, and an electronic device containing the same
US6716770B2 (en) * 2001-05-23 2004-04-06 Air Products And Chemicals, Inc. Low dielectric constant material and method of processing by CVD
WO2003088344A1 (en) 2002-04-10 2003-10-23 Honeywell International, Inc. Low metal porous silica dielectric for integral circuit applications
US20030211244A1 (en) 2002-04-11 2003-11-13 Applied Materials, Inc. Reacting an organosilicon compound with an oxidizing gas to form an ultra low k dielectric
US7384471B2 (en) * 2002-04-17 2008-06-10 Air Products And Chemicals, Inc. Porogens, porogenated precursors and methods for using the same to provide porous organosilica glass films with low dielectric constants
EP1504138A2 (en) * 2002-05-08 2005-02-09 Applied Materials, Inc. Method for using low dielectric constant film by electron beam
US8137764B2 (en) * 2003-05-29 2012-03-20 Air Products And Chemicals, Inc. Mechanical enhancer additives for low dielectric films
US7049247B2 (en) * 2004-05-03 2006-05-23 International Business Machines Corporation Method for fabricating an ultralow dielectric constant material as an intralevel or interlevel dielectric in a semiconductor device and electronic device made

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