TW563202B - An ultralow dielectric constant material as an intralevel or interlevel dielectric in a semiconductor device and an electronic device containing the same - Google Patents
An ultralow dielectric constant material as an intralevel or interlevel dielectric in a semiconductor device and an electronic device containing the same Download PDFInfo
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563202563202
技術領μ 本發明一般性的涉及一種方法,直製诰屮 八衣仏出具超低介電常 數(或超低k)之介電材料及包含此種介電材料之電子裝置。 更特定言之,本發明涉及一種方法及以此法所形成之電子 結構,該方法製造出熱穩定之超低k薄膜,作為極大型積體 電路(“ULSP)後段製程(“BE0L,,)導線結構中之層内或層間 介電質。 先前技藝説明 近年來,由於ULSI中電子裝置的尺寸不斷地縮小,造成 BEOL金屬化之電阻以及層内與層間介電質電容的增加。此 二值的增加使得ULSI電子裝置中的信號延遲加劇;為改善 未來ULSI電路的切換效能,吾人需要一種低介電常數(^)之 絕緣物質’特別是那些k值遠低於氧化矽之絕緣物質,以降 低其電容。已有商用的低k介電材料(即介電質)。聚四敗稀 (“PTFE”)即為其中之一,其所具有的k值為2〇。不過,這 些川電材料在攝氏300〜350度以上的溫度時並不具有熱穩定 性。將這些介電質整合在ULSI晶片中需要至少攝氏4〇0度。 因此,這些介電質是不堪於整合期間使用的。 已被考慮使用在ULSI裝置中之低k材料包括内含石夕,碳, 氧之聚合物,像是曱基矽氧烷,甲基三氧化矽烷,以及其 他的有機及無機聚合物。譬如,論文(N.海克等人“新的低 介電常數旋轉塗佈氧化矽型介電質之性質” Mat. Res. Soc. Symp· Zipc· 4 7 6 ( 1 9 9 7 ): 2 5 )中所描述的材料可滿足熱穩 -4 - 本紙張尺度適用中國國家標準(CNS) A4規格(210 X 297公釐) 563202TECHNICAL FIELD The present invention generally relates to a method for directly manufacturing a sintered quilt with a very low dielectric constant (or ultra-low k) dielectric material and an electronic device including the same. More specifically, the present invention relates to a method and an electronic structure formed by this method, which method produces a thermally stable ultra-low-k film as a very large integrated circuit ("ULSP") back-end process ("BE0L ,," In-layer or inter-layer dielectric in a wire structure. Description of previous techniques In recent years, due to the continuous shrinking of the size of electronic devices in ULSI, the resistance of BEOL metallization and the increase in dielectric capacitance between layers and between layers have increased. The increase of these two values makes the signal delay in ULSI electronic devices worse; in order to improve the switching performance of ULSI circuits in the future, we need an insulating material with a low dielectric constant (^), especially those with a k value much lower than silicon oxide. Substance to reduce its capacitance. There are commercial low-k dielectric materials (ie, dielectrics). Polytetrafluoroethylene ("PTFE") is one of them and has a k value of 20. However, these Chuan Dian materials are not thermally stable at temperatures above 300 ° C to 350 ° C. Integrating these dielectrics in a ULSI chip requires at least 4,000 degrees Celsius. Therefore, these dielectrics are unsuitable for use during integration. Low-k materials that have been considered for use in ULSI devices include polymers containing rock, carbon, and oxygen, such as fluorenylsiloxane, methylsiloxane, and other organic and inorganic polymers. For example, the paper (N. Heck et al. "Properties of a New Low Dielectric Constant Spin-Coated Silicon Oxide Dielectric" Mat. Res. Soc. Symp · Zipc · 4 7 6 (1 9 9 7): 2 The material described in 5) can meet the thermal stability -4-This paper size applies the Chinese National Standard (CNS) A4 specification (210 X 297 mm) 563202
定的需求,但這些材料中的某一些,在以旋轉塗佈技術製 備成薄膜之薄膜厚度達到互連結構中所需的厚度時,會產 生碎裂。另外,該等前驅物之價袼很高,量產時不敷成 本。與此相反的是,超大型積體電路(“vlsi,,)&ulsi晶片 大部分的製造步驟已可由電漿增強式化學或物理氣相沉積 技術來完成。用輕易可得之製造設備,以電漿增強式化學 氣相沉積(“PECVD”)技術來製造低k材料,可簡 材料的整合過程、降低製造成本及減少浪費:= 申請案( 1998年6月19日所申請,專利申請案號第〇9/1〇7,567 號名為·氫化氧化之碳石夕材料)描述了一種超低介電常數 材料,由矽,碳,氧以及氫原子所構成,具有不超過3.6之 介電常數以及非常低的碎裂傳播速度;在此,將該案分派 給本發明之共同受讓人並將其全文以引用的方式併入本文 中。 另一個分派給本發明之共同受讓人並將其全文以引用的 方式併入本文中之同在申請案件(1999年5月16曰所申請, 專利申請案號第09/320,495號,名為··多相低介電常數材料 及沉積方法)描述了 一種雙相材料,其乃由矽,碳,氧及氫 原子所構成的陣列,以及主要由碳及氫原子構成的相所組 成,具有不超過3·2之介電常數。應注意的是,此種介電常 數更低之材料可使包含了此種介電質之電子裝置的效能有 更進一步地改善。 考慮以上的事實,吾人仍有需要發展出一種介電常數不 超過約2.8且可阻止碎裂產生之介電材料。 -5 563202However, some of these materials can cause chipping when the thickness of the thin film produced by the spin coating technology reaches the thickness required in the interconnect structure. In addition, the price of these precursors is very high, which is not enough for mass production. In contrast, most of the manufacturing steps for very large integrated circuits ("vlsi ,," & ulsi) wafers can already be accomplished by plasma enhanced chemical or physical vapor deposition techniques. With easily available manufacturing equipment, Plasma enhanced chemical vapor deposition ("PECVD") technology is used to manufacture low-k materials, which can simplify the integration process of materials, reduce manufacturing costs and reduce waste: = Application (filed on June 19, 1998, patent application Case No. 099/107, 567, named "Hydro-oxidized Carbon Stone Material" describes an ultra-low dielectric constant material composed of silicon, carbon, oxygen and hydrogen atoms, with a dielectric constant not exceeding 3.6 Constant and very low fragmentation propagation speed; here, this case is assigned to the co-assignee of the present invention and is incorporated herein by reference in its entirety. Another co-assignee is assigned to the present invention and The full application of which is incorporated herein by reference (co-applied on May 16, 1999, patent application No. 09 / 320,495, named ... multiphase low dielectric constant material and deposition method ) Described A two-phase material, which is an array composed of silicon, carbon, oxygen, and hydrogen atoms, and a phase mainly composed of carbon and hydrogen atoms, has a dielectric constant not exceeding 3.2. It should be noted that this A material with a lower dielectric constant can further improve the performance of electronic devices containing such a dielectric. Considering the above facts, we still need to develop a dielectric constant that does not exceed about 2.8 and can prevent Fractured Dielectric Material. -5 563202
憂上月概述 因此’提供出一種方法,可製造出介電常數不超過大約 2· 8之超低介電常數材料,是本發明之目標。較佳的是,該 超低1^材料之介電常數大約在15至2.5;更佳的是,該超低化 材料之介電常數大約在2 ()至2.25。應注意的S,除非有特 別,明,所有的介電常數都是相對真空而言。 提供出種方法’可從包含至少兩種前驅物之前驅混合 物中製造出包含;5夕,碳,氧及氫原子之超低介電常數材 料,是本發明之另一目標;其中第一前驅物選自於包含 二COH成刀並具環形結構之分子,而第二前驅物則屬於具 環形結構之有機分子。 “提供出-種方法,可於平行板電漿增強式化學氣相沉積 (PECVD )反應爐中製造出超低介電常數薄膜,是本發明 之另一目標。 提供出一種方法,其所製造出之超低介電常數材料,^ 作為電子結構之後段製程(“BE〇L”)互連結構中之層内或^ 間介電質,是本發明之另一目標。 提供出一種具有低内應力及介電常數不超過大約28之養 穩定超低介電常數材料,是本發明之又_目標。較佳白 是,該超低k材料之介電常數大約在15至2 5 ;更佳的是, 該超低k材料之介電常數大約在2〇至2.25。 提供出-種電子結才冓,其合併絕緣材料層作為其後段t 程(“BEOL”)導線結構中之層内或層間介電質,其中至少肩 -6- 本紙張尺度適用中國國家標準(CNS) A4規格(210X297公釐) i m ---- 裝 訂An overview of the previous month. Therefore, it is an object of the present invention to provide a method for manufacturing an ultra-low dielectric constant material having a dielectric constant not exceeding about 2.8. Preferably, the dielectric constant of the ultra-low material is about 15 to 2.5; more preferably, the dielectric constant of the ultra-low material is about 2 () to 2.25. It should be noted that unless otherwise specified, all dielectric constants are relative to vacuum. Provide a method 'can be produced from a precursor mixture containing at least two precursors; ultra low dielectric constant materials containing carbon, oxygen and hydrogen atoms are another object of the present invention; wherein the first precursor The substance is selected from the group consisting of two COH-knife-shaped molecules having a ring structure, and the second precursor is an organic molecule having a ring structure. "Providing a method for making ultra-low dielectric constant films in a parallel-plate plasma enhanced chemical vapor deposition (PECVD) reactor is another object of the present invention. Providing a method for making The resulting ultra-low dielectric constant material is another object of the present invention as an intra-layer or inter-layer dielectric in an electronic structure back-end process ("BEOL") interconnect structure. Stable ultra-low dielectric constant materials with internal stress and dielectric constant not exceeding about 28 are another object of the present invention. Preferably, the dielectric constant of the ultra-low-k material is about 15 to 2 5; more Preferably, the dielectric constant of the ultra-low-k material is about 20 to 2.25. An electronic junction is provided, which incorporates a layer of insulating material as a layer in its subsequent t-way ("BEOL") wire structure. Or interlayer dielectric, at least shoulder -6- This paper size applies to China National Standard (CNS) A4 specification (210X297 mm) im ---- binding
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兩絕緣材料層包含本發明之超低介電常數材料 之又一目標。 ^月 提供出種電子結構,其除具有以本發明之超低介電常 數材料來作^其後段製程(“BEOL”)導線結構中之層内或^ 間介電質之佈局層夕卜,尚内含至少―個介電蓋層以作為二 I*生蝕刻(RIE”)遮罩研磨擋止或擴散障壁;是本發明之又一 目標。 — 提供出一種改良的方法,在C〇2或C〇2及〇2存在的情況 下,以於基板上沉積薄膜的方式製造出超低介電常數材 料,藉以改善沉積薄膜的均勻度及PECVD反應爐中電漿的 穩定度,是本發明之又一目標。 本發明提供出一種方法,可製造出熱穩定之介電材料, 5亥材料具有由矽,碳,氧及氫原子所構成之陣列及多個原 子大小之奈米孔。在較佳具體實施例中,該介電材料具有 基本上由矽,碳,氧及氫所構成之陣列。本發明另提供出 一種方法,在電漿增強式化學氣相沉積(“ PEC vd”)反應爐 中,將包含了矽,碳,氧及氫原子之第一前驅氣體以及至 少包含碳,氫(可選擇性地包含〇,F&N)之第二前驅氣體 加以/舌化’以製造出該介電材料。本發明另提供出一種電 子結構(即基板),其具有絕緣材質層以作為後段製程 (“ BEOL”)導線結構中層内或層間之介電質層,其中該絕緣 材質層中之絕緣材料可以是本發明之超低k薄膜。本發明另 將C〇2混入該第一前驅氣體,或是將C02及〇2混入該第一及 本紙張尺度適用中國國家標準(CNS) A4規格(210X 297公釐) 裝 訂The two insulating material layers contain another object of the ultra-low dielectric constant material of the present invention. ^ Provides an electronic structure, in addition to having the ultra-low dielectric constant material of the present invention as the ^ in the subsequent process ("BEOL") wire structure in the layer or interlayer dielectric layer layout layer, It still contains at least one dielectric capping layer as a secondary I * etching (RIE) mask for polishing stop or diffusion barrier; it is another object of the present invention.-Provide an improved method in C02 Or in the presence of Co2 and O2, an ultra-low dielectric constant material is manufactured by depositing a thin film on a substrate, thereby improving the uniformity of the deposited thin film and the stability of the plasma in the PECVD reactor. Another object of the present invention is to provide a method for manufacturing a thermally stable dielectric material. The material has an array of silicon, carbon, oxygen, and hydrogen atoms and nano-pores of multiple atom sizes. In a preferred embodiment, the dielectric material has an array consisting essentially of silicon, carbon, oxygen, and hydrogen. The present invention also provides a method for plasma enhanced chemical vapor deposition ("PEC vd") The reactor will contain silicon, carbon, and oxygen And a hydrogen atom, a first precursor gas and a second precursor gas containing at least carbon and hydrogen (optionally containing 0, F & N) are added / tonified 'to produce the dielectric material. The present invention also provides a dielectric material. An electronic structure (ie, a substrate) having an insulating material layer as a dielectric layer in or between layers in a back-end process ("BEOL") wire structure, wherein the insulating material in the insulating material layer may be the ultra-low k of the present invention. Film. In the present invention, C02 is mixed into the first precursor gas, or C02 and 〇2 are mixed into the first and the paper size. The Chinese National Standard (CNS) A4 specification (210X 297 mm) is used for binding.
線 563202Line 563202
第二前驅氣體,藉以穩定PECVD反應爐中電裝的穩定度, 及改善沉積於該基板上之薄膜的均勻度。 又 /較佳具體實施例中,提供出—種製造熱穩定超低介電 常數(超低k)薄膜之方法,其所包含之步驟·提供一電漿辦 強式化學氣相沉積(“PECVD,,)反應爐;將—f子結構(即^ 板)置於該反應爐中;將包含了石夕,碳,氧,氫原子之第: ,驅氣體通入該反應爐中;將包含了碳,氫(選擇性的可有 氧F,N)原子之第二前驅混合氣體通入該反應爐中;最後 於該基板上沉積一超薄膜。最好是,該第一前驅物乃是 從包含sic0H成分,像是u,5,7•四甲基環四矽氧烷 (“TMCTS”或qHwCUSi4)之環形結構分子中所挑選出。該第 二前驅物可以是由環形結構分子所構成的群中所挑選出之 有機7刀子,該分子最好是不只一個環。特別有用的是内含 稍合環的種類,至少有-個内含雜原子(最好是氧}。最適合 的是其環尺寸可明顯傳遞環張力的種類,亦即一個環有3或 4個原子以及/或者7或更多個原子的種類。特別具有吸引力 的種類是名為氧雜二環化合物等級的成員,像是環氧環戊 烯(“CPO” 或 “C5H80,,)。 選擇性地,可將本發明所沉積的薄膜以不超過大約攝氏 300度之溫度予以加熱至少大約〇 25個小時。本方法另包含 之步驟s’提供—平行板反應爐,其基板夹盤㈣電= 大約在300至700平方公分,基板至頂電極間的距離大約是 在1公分至10公分。高頻的射頻功率供應至其中之一個電 極,頻率大約是在12百萬赫至15百萬赫之間二選擇性地, -8 - 本紙張尺度適用中國國家標準(CNS) A4規格(210 X 297公釐) 裝 訂The second precursor gas stabilizes the stability of the electrical equipment in the PECVD reactor and improves the uniformity of the thin film deposited on the substrate. In another preferred embodiment, a method for manufacturing a thermally stable ultra-low dielectric constant (ultra-low k) film is provided. The method includes the steps of providing a plasma-based strong chemical vapor deposition ("PECVD" ,,) reaction furnace; -f substructure (ie ^ plate) is placed in the reaction furnace; will contain Shi Xi, carbon, oxygen, hydrogen atom number:, driving gas into the reaction furnace; will contain A second precursor mixed gas containing carbon, hydrogen (optionally aerobic F, N) atoms is passed into the reaction furnace; finally, an ultra-thin film is deposited on the substrate. Preferably, the first precursor is Selected from cyclic molecules containing sic0H components, such as u, 5,7 • tetramethylcyclotetrasiloxane ("TMCTS" or qHwCUSi4). The second precursor may be composed of a cyclic structure molecule The organic 7-knife selected from the group is preferably more than one ring. Particularly useful is a type containing a slightly closed ring, at least one containing a heteroatom (preferably oxygen). The most suitable Is the type whose ring size can clearly transmit ring tension, that is, a ring has 3 or 4 atoms and / or 7 or more atomic species. Particularly attractive species are members of the oxabicyclic compound class, such as epoxycyclopentene ("CPO" or "C5H80,"). Alternatively, may The film deposited by the present invention is heated at a temperature of not more than about 300 degrees Celsius for at least about 025 hours. The method further includes step s' provided-a parallel plate reaction furnace, the substrate chuck dysfunction = about 300 To 700 cm2, the distance from the substrate to the top electrode is about 1 cm to 10 cm. High-frequency RF power is supplied to one of the electrodes, and the frequency is between 12 MHz and 15 million Hz. By nature, -8-This paper size applies to China National Standard (CNS) A4 (210 X 297 mm) binding
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可另送-個低頻的功率至其中之一個電極。該加熱步驟的 第加熱時間區段中所使用的加熱溫度不超過大約攝氏3〇〇 度,之後的第二加熱時間區段的加熱溫度則不超過大約攝 氏380度;該第二加熱時間的長度應大於該第一加熱時間。 該第二加熱日寺間的長度至少大約十倍於該第一力。熱時 本發明之製造超低介電常數薄膜的沉積步驟,另包含下 列之步驟·將基板溫度設定在大約攝氏25度至4〇〇度;將該 同頻射頻功率密度設定在大約每平方厘米〇· 〇5瓦至大約每 平方厘米2.0瓦;將該第一前驅物的流量設定為大約每分鐘 5標準立方厘米至大約每分鐘1〇〇〇標準立方厘米;將該第二 前驅物的流量設定為大約每分鐘5標準立方厘米至大約每分 鐘1000立方厘米;將該反應爐的壓力設定在大約5〇毫托至 大約5000毫托之間;以及將該高頻射頻功率設定在大約i 5 瓦至大約500瓦。選擇性的可將一大約10瓦至大約3〇〇瓦之 超低頻功率送入電漿中。基板夾盤的導電面積改變χ倍時, 送至該基板夾盤的射頻功率也要跟著改變X倍。 另一較佳具體實施例所提供出製造超低k薄膜之方法,包 含下列之步驟··提供出一平行板型之電漿增強式化學氣相 >儿積反應爐,將預處理過之晶圓置放在導電面積大約在3 〇 〇 至700平方公分之基板夾盤上,並將該晶圓與頂電極間之空 隙維持在大約1公分至10公分;將包含環矽氧烷分子之第一 前驅氣體通入該反應爐中;至少通入一第二前驅氣體,該 氣體包含具碳,氫,氧原子環形結構之有機分子;於該晶 -9- 本紙張尺度適用中國國家標準(CNS) A4規格(210 X 297公釐) 裝 訂Can send another low-frequency power to one of the electrodes. The heating temperature used in the first heating time section of the heating step does not exceed about 300 degrees Celsius, and the heating temperature in the subsequent second heating time section does not exceed about 380 degrees Celsius; the length of the second heating time Should be longer than this first heating time. The length of the second heating day between the temples is at least about ten times longer than the first force. The deposition step of the ultra-low-dielectric-constant thin film of the present invention in thermal time further includes the following steps: Set the substrate temperature to about 25 ° C to 400 ° C; set the RF power density at the same frequency to about 1 cm2 0.005 watts to about 2.0 watts per square centimeter; the flow rate of the first precursor is set to about 5 standard cubic centimeters per minute to about 1,000 standard cubic centimeters per minute; the flow rate of the second precursor Set to about 5 standard cubic centimeters per minute to about 1,000 cubic centimeters per minute; set the pressure of the reactor between about 50 mTorr and about 5000 mTorr; and set the high frequency RF power at about i 5 Watts to about 500 watts. Optionally, an ultra-low frequency power of about 10 watts to about 300 watts can be fed into the plasma. When the conductive area of the substrate chuck changes by a factor of x, the RF power sent to the substrate chuck also changes by a factor of x. A method for manufacturing an ultra-low-k thin film provided by another preferred embodiment includes the following steps. A parallel-plate-type plasma-enhanced chemical vapor phase reactor is provided, and the pre-treatment is performed. The wafer is placed on a substrate chuck with a conductive area of about 300 to 700 cm 2 and the gap between the wafer and the top electrode is maintained at about 1 to 10 cm; A first precursor gas is passed into the reaction furnace; at least a second precursor gas is passed, the gas contains organic molecules having a ring structure of carbon, hydrogen, and oxygen atoms; in the crystal-9- this paper size applies Chinese national standards ( CNS) A4 size (210 X 297 mm) binding
563202 A7563202 A7
圓^ =積出一超低k薄膜。可在該沉積步驟之後,另加上對 ^膜之加熱步驟:以不超過大約攝氏3G0度之溫度加熱至 ;大約〇· 25摘小時。可另包含將射頻功率加至該晶圓之步 驟二該加熱步驟可另分為第一加熱時間及第二加熱時間, 第一加熱時間區段中所使用的加熱溫度不超過大約攝氏 度之後的第一加熱時間區段的加熱溫度則不超過大約攝 氏380度;該第二加熱時間的長度應大於該第一加熱時間。 5亥第一加熱時間的長度至少大約十倍於該第一加熱時間長 度0 所使用的環矽氧烷前驅物可以是四甲基環四矽氧燒 (TMCTS ),該有機前驅物則可以是環氧環戊烯 (“ CPO”)。超低k薄膜的沉積步驟可另包含下列之步驟:將 晶圓的溫度設定在大約攝氏25度至4〇〇度;將該射頻功率密 度設定在大約每平方厘米〇·〇5瓦至大約每平方厘米2 〇瓦; 將該環矽氧烷的流量設定為大約每分鐘5標準立方厘米至大 約每分鐘1000標準立方厘米;將該有機前驅物的流量設定 為大約每分鐘5標準立方厘米至大約每分鐘1〇〇〇立方厘来; 以及將該反應爐的壓力設定在大約5〇毫托至大約5〇〇〇毫托 之間。除此之外,該沉積步驟可另包含將環氧環戊烯與四 曱基環四矽氧烷的流量比設定在大約〇· i至大約〇· 7,最好 是在0.2至0.4之間。當基板夾盤的導電面積改變乂倍時,送 至該基板夾盤的射頻功率也要跟著改變X倍。 在又一具體實施例中,提供出一種製造熱穩定超介電 質薄膜之方法,其包含下列之步驟:提供出一平行板型之 -10- 本紙張尺度適用中國國家標準(CNS) A4規格(210X297公釐) 裝 訂Circle ^ = an ultra-low-k film is accumulated. After this deposition step, a heating step for the film may be added: heating to a temperature of not more than about 3G0 degrees Celsius; about 0.25 pick-up hours. It may further include the step of adding RF power to the wafer. The heating step may be further divided into a first heating time and a second heating time. The heating temperature used in the first heating time section does not exceed about The heating temperature in a heating time section does not exceed about 380 degrees Celsius; the length of the second heating time should be greater than the first heating time. The length of the first heating time is at least about ten times the length of the first heating time. The cyclosiloxane precursor used may be tetramethylcyclotetrasiloxane (TMCTS), and the organic precursor may be Epoxycyclopentene ("CPO"). The ultra-low-k thin film deposition step may further include the following steps: setting the temperature of the wafer to about 25 degrees to 400 degrees Celsius; setting the RF power density to about 0.05 Watts per square centimeter to about 20 watts per square centimeter; set the flow rate of the cyclosiloxane to about 5 standard cubic centimeters per minute to about 1,000 standard cubic centimeters per minute; set the flow rate of the organic precursor to about 5 standard cubic centimeters per minute to about 10,000 cubic centimeters per minute; and set the pressure of the reactor to between about 500 mTorr and about 5000 mTorr. In addition, the deposition step may further include setting a flow ratio of epoxycyclopentene to tetrafluorenylcyclotetrasiloxane to about 0.1 to about 0.7, and preferably between 0.2 to 0.4. . When the conductive area of the substrate chuck is changed by a factor of ,, the RF power sent to the substrate chuck must also be changed by a factor of X. In another specific embodiment, a method for manufacturing a thermally stable super-dielectric film is provided, which includes the following steps: a parallel plate type of -10- is provided. The paper size is applicable to China National Standard (CNS) A4 specifications (210X297 mm) Staple
線 563202 A7 B7 五、發明説明(8 ) 電衆增強式化學氣相沉積反應爐;將預處理過之晶圓置放 在導電面積大約在300至700平方公分之基板夾盤上,並將 該晶圓與頂電極間之空隙維持在大約丨公分至大約1〇公分; 將具有環狀有機分子之環矽氧院前驅混合氣體通入反應爐 中晶圓上方,其中溫度保持在大約攝氏6〇度至大約攝氏2〇〇 度’總流量保持在大約每分鐘25標準立方厘米至大約每分 鐘500標準立方厘米,反應爐的壓力保持在大約1〇〇毫托至 大約5000毫托;在射頻功率密度大約是在每平方厘米0.25 瓦至每平方厘米〇.8瓦的情況下,於該晶圓上沉積介電質薄 膜;以及以不超過大約攝氏3〇〇度之溫度對該超低k薄膜進 行至少大約〇· 25小時之回火。本發明方法另包含兩階段之 回火步驟,第一回火時間所使用的溫度不高於大約攝氏3〇〇 度,之後的第二回火時間所使用的溫度則不低於大約攝氏 380度,其中該第二時間的長度應大於該第一時間。該第二 時間的長度至少大約十倍於該第一時間的長度。環矽氧烷 前驅物可以是四曱基環四矽氧烷(“TMCTS”),該有機前驅 物則可以是環氧環戊烯(“ CPO”)。 本發明係另關於一種電子結構,其以絕緣材質作為後段 製程(“ BEOL”)互連結構中層内或層間之介電質,該互連尹 構包含已預處理過之半導電基板,其具有第一金屬區、第 一導體區以及第二導體區,該第一金屬區域鑲嵌在第一絕 緣層内,該第一導體區則鑲嵌在由本發明所製成之超低1^介 電質所形成的第二絕緣層中,該超低k介電質含有矽,碳, 氧,氫以及眾多毫微米尺寸的氣孔,介電常數不超過大約 -11 - 本紙張尺度適用中國國家標準(CNS) A4規格(210 X 297公釐)Line 563202 A7 B7 V. Description of the invention (8) Electron enhanced chemical vapor deposition reactor; Place the pre-processed wafer on a substrate chuck with a conductive area of approximately 300 to 700 cm2, and place the The gap between the wafer and the top electrode is maintained at about 丨 cm to about 10 cm; a ring silicon oxide precursor precursor gas mixture with ring-shaped organic molecules is passed into the reactor above the wafer, and the temperature is maintained at about 6 ° C. Degrees to about 200 degrees Celsius' total flow rate maintained at about 25 standard cubic centimeters per minute to about 500 standard cubic centimeters per minute, and the pressure of the reactor was maintained at about 100 mTorr to about 5000 mTorr; at RF power The density is approximately 0.25 watts per square centimeter to 0.8 watts per square centimeter, and a dielectric thin film is deposited on the wafer; and the ultra-low-k film is formed at a temperature not exceeding about 300 degrees Celsius. Temper for at least about 0.25 hours. The method of the present invention further includes a two-stage tempering step. The temperature used during the first tempering time is not higher than about 300 degrees Celsius, and the temperature used after the second tempering time is not lower than about 380 degrees Celsius. , Where the length of the second time should be greater than the first time. The length of the second time is at least about ten times longer than the length of the first time. The cyclosiloxane precursor may be tetramethylcyclotetrasiloxane ("TMCTS"), and the organic precursor may be epoxycyclopentene ("CPO"). The present invention relates to another electronic structure which uses an insulating material as a dielectric in or between layers in a back-end process ("BEOL") interconnect structure. The interconnect structure includes a pre-processed semi-conductive substrate having A first metal region, a first conductor region, and a second conductor region, the first metal region is embedded in a first insulating layer, and the first conductor region is embedded in an ultra-low 1 ^ dielectric material made by the present invention; In the formed second insulation layer, the ultra-low-k dielectric contains silicon, carbon, oxygen, hydrogen, and many nanometer-sized pores, and the dielectric constant does not exceed about -11-This paper is compliant with China National Standards (CNS) A4 size (210 X 297 mm)
線 563202Line 563202
2·8 ’該第二絕緣層緊貼著該第一絕緣層,該第一導體區則 與該第-金屬區在電氣上連接,$第二導體區鑲嵌在含有 本發明超低k介電絕緣材質之第三絕緣層中並與該第一導體 區在電氣上連接,1¾第三絕緣材f層與該第二絕緣材質層 緊密接觸。該電子結構在該第二絕緣材質層及該第三絕緣 材質層之間另包含-介電蓋層。f亥電子結構在該第二絕緣 材質層及該第三絕緣材質層之間另包含一第一介電蓋層', 以及在該第三絕緣材質層之上另包含一第二介電蓋層。曰 該介電蓋之材料可從下列的材料中挑選:氧化矽,氮化 矽,氮氧化矽,難熔的氮化矽金屬(其中該難熔的金屬選自 於鈕、鍅、铪、鎢)矽的碳化物,摻雜碳的氧化物或是 SiCOH及它們的氫化化合物。該第一及第二介面蓋層可以 選自於相同的介電材料群。該第一絕緣層之材質可以是氧 化石夕或氮化矽或是這些材料的各種摻雜物,像是碟碎玻璃 (“PSG”)或硼磷矽玻璃(“BPSG”)。該電子結構可另包含一 材質為介電質之擴散障壁層,至少沉積在該第二及第三絕 緣材質層兩者之一上。該電子結構可在該第二絕緣材質層 之上’另包含一介電驁以作為活性離子餘刻(“ RIE,,)之硬遮 罩及研磨擋止層,另外在該介電RIE硬遮罩友研磨擔止層之 上則又有一介電擴散障壁層。該電子結構可於該第二絕緣 材質層之上另包含一第一介電RIE硬遮罩/研磨擋止層,於 該第一介電研磨-擋止層之上另包含一第一介電RIE硬遮罩/ 擴散障壁層,於該第三絕緣材質層之上另包含一第二介電 RIE硬遮罩/研磨擔止層,以及於該第二介電研磨-擔止層之 -12 - 本紙張尺度適用中國國家標準(CNS) A4規格(210X297公釐)2 · 8 'The second insulating layer is in close contact with the first insulating layer, the first conductor region is electrically connected to the first metal region, and the second conductor region is embedded in the ultra-low-k dielectric containing the present invention The third insulating layer of insulating material is electrically connected to the first conductor region, and the third insulating material f layer is in close contact with the second insulating material layer. The electronic structure further includes a dielectric capping layer between the second insulating material layer and the third insulating material layer. f Hai electronic structure further includes a first dielectric cap layer between the second insulating material layer and the third insulating material layer, and further includes a second dielectric cap layer on the third insulating material layer. . The material of the dielectric cover can be selected from the following materials: silicon oxide, silicon nitride, silicon oxynitride, refractory silicon nitride metal (where the refractory metal is selected from the group consisting of buttons, rhenium, thorium, tungsten ) Silicon carbides, carbon-doped oxides or SiCOH and their hydrogenated compounds. The first and second interface cap layers may be selected from the same group of dielectric materials. The material of the first insulating layer may be oxidized silicon oxide or silicon nitride, or various dopants of these materials, such as plate glass (“PSG”) or borophosphosilicate glass (“BPSG”). The electronic structure may further include a diffusion barrier layer made of a dielectric material, and deposited on at least one of the second and third insulating material layers. The electronic structure may further include a dielectric layer on top of the second insulating material layer as a hard mask and a polishing stop layer for active ion etching ("RIE,"), and a hard mask on the dielectric RIE. A dielectric diffusion barrier layer is formed on the grinding stop layer of the cover friend. The electronic structure may further include a first dielectric RIE hard mask / grind stop layer on the second insulating material layer. A dielectric polishing-stop layer further includes a first dielectric RIE hard mask / diffusion barrier layer, and a third dielectric material layer further includes a second dielectric RIE hard mask / grinding stop. Layer, and -12 of the second dielectric grinding-resisting layer-this paper size applies Chinese National Standard (CNS) A4 specification (210X297 mm)
裝 訂Binding
563202563202
入=6乃是本發明電子裝置之放大剖面圖,其所具有之層内 介電層及層間介電層乃是由本發明之超低k材質所做成。 圖7乃是根據本發明,於圖2之超低k材質薄膜上另加一擴 散障壁介電蓋層後之電子結構的放大剖面圖。 圖8乃是根據本發明,於圖3之研磨擋止層上另加一 硬 遮罩/研磨擋止介電蓋層及介電蓋擴散障壁後之電子結構的 放大剖面圖。I = 6 is an enlarged cross-sectional view of the electronic device of the present invention. The inner dielectric layer and the interlayer dielectric layer are made of the ultra-low-k material of the present invention. Fig. 7 is an enlarged cross-sectional view of the electronic structure of the ultra-low-k material film of Fig. 2 after a dielectric barrier layer of a diffusion barrier is added. FIG. 8 is an enlarged cross-sectional view of the electronic structure after adding a hard mask / grind stop dielectric cover layer and a diffusion barrier of the dielectric cover to the abrasive stop layer of FIG. 3 according to the present invention.
圖9乃是根據本發明,於圖4之層間超低質薄膜上另加 一 RIE硬遮罩/研磨擋止介電層後之電子結構的放大剖面 圖。 裝 訂Fig. 9 is an enlarged cross-sectional view of the electronic structure after adding an RIE hard mask / grinding blocking dielectric layer to the interlayer ultra-low-quality film of Fig. 4 according to the present invention. Binding
灰發明較佳具體實施例之詳細說昍 “本發明揭示一種於平行板電漿增強式化學氣相沉積 (“ PEC VD”)反應爐中製造出熱穩定超低介電常數薄膜之方 法。本較佳具體實施例所揭示之材質内含氫氧化之碳矽材 料(SiCOH)陣列,此種材料包含共價鍵結成網狀之矽,碳, 氧,氫以及具有不超過大約2· 8之介電常數,其另内含一些 分子大小之空洞,直徑大約〇.5至2〇毫微米,這使得介電常 數更進一步地降低到大約2.〇以下。較佳的是,該超低k薄 膜的介電常數在大約1.5至大約2. 5的範圍,.最佳的是,介 電糸數在大約2.0至大約2.25的範圍。為製造出超低k熱穩定 薄膜,需要特定的長成條件及特定形狀的沉積反應爐。譬 如,在平行板反應爐中,基板夾盤的導電面積應該在大約 3〇〇平方公分到大約700平方公分之間,基板至頂電極之間 的間隙大約是1公分到1〇公分左右。將射頻功率送至該基 -14-A detailed description of a preferred embodiment of the ash invention: "The present invention discloses a method for manufacturing a thermally stable ultra-low dielectric constant film in a parallel plate plasma enhanced chemical vapor deposition (" PEC VD ") reactor. The material disclosed in the preferred embodiment includes a carbon-silicon-silicon (SiCOH) array containing hydroxide. The material includes silicon, carbon, oxygen, hydrogen covalently bonded into a network, and a dielectric having no more than about 2.8. The electric constant, which also contains some molecular-sized voids, has a diameter of about 0.5 to 20 nanometers, which further reduces the dielectric constant to less than about 2.0. Preferably, the ultra-low-k film The dielectric constant is in the range of about 1.5 to about 2.5, and most preferably, the dielectric constant is in the range of about 2.0 to about 2.25. In order to manufacture ultra-low-k thermally stable films, specific growth conditions are required And a special-shaped deposition reactor. For example, in a parallel plate reactor, the conductive area of the substrate chuck should be between about 300 square centimeters and about 700 square centimeters, and the gap between the substrate and the top electrode is about 1 Cm to 10 cm left The power supplied to the RF-14
五、發明説明(12 ) 板。根據本發明,該超低介電常數: 反應爐中於特定反應條件下,從;!膜乃疋在特定形狀的 ™CTS)與第二前驅物(為具 =氧炫前驅物(像是 裱乳環戊烯)的混合物中形成。 子像疋 度之、、拉谇斜士政ΠΟ 以不超過大約攝氏300 又之,皿度對本發明之低介電f數薄m至 個小時,以降低介電常數。在加埶 * …、别間,源自於贫兹一於 駆氣體(或混合氣體),包括了碳、 ’ 歧么批\ Λ 風或乳原子之分子碎片 、曰…分解,轉換成較小的分子 叩寻膜中釋放出來。選 擇性地可藉由該轉換及釋放分子 ^ f从刀卞砰片之步驟使薄膜中產生 孔洞。溥獏的密度因而降低。 本發明提供出一種製備具超低介電常數(即低於大約2 8) ㈣之方法,此種材料適於整合在刪[導線結構中。較佳 的是,本發明超低k薄膜的介電常數在大約丨5至大約2 5的 範圍,最佳的則是大約2·〇至大約225範圍之介電常數。選 擇至、兩種合適的前驅物,以如下所述的特定處理參數予 以組合,可製備本發明之薄膜。最好是,該第一前驅物選 自於其環形包含SiCOH成分之環形結構分子,像是 四曱基環四矽氧烷(TMCTS或C4H丨6〇4Si4)或是八曱基環四矽 氧烷(0MCTS或C8H2404Si4)。更一般性的,·該第一前驅物 是包含環形結構之環烷基四矽氧烷等級,包括以交替方式 鍵結,數目相等之矽及氧原子,且其中至少有一矽原子共 價鍵結著烷基群(像是曱基,乙基,丙基或更高的分支類似 物’以及環碳氫化合物像是,環丙基,環戊基,環己基或 更南的類似物),所有的矽原子均接有兩個烷基群的情況亦 -15-本紙張尺度適用中國國家標準(CNS) A4規格(210 X 297公釐) 5632025. Description of the invention (12) board. According to the present invention, the ultra-low dielectric constant: under a specific reaction condition in a reaction furnace, the membrane is a ™ CTS with a specific shape and a second precursor (for a precursor with oxygen = like oxygen) It is formed in a mixture of cyclopentene). The degree of the sub-images is about 300 ° C and less than about 300 ° C. In addition, the degree of dielectricity of the low dielectric f of the present invention is as thin as m to hours to reduce Dielectric constant. In the case of 埶 *…, among others, it is derived from lean gas and tritium gas (or mixed gas), including carbon, molecular fragments of wind, milk, or milk atom, and decomposition. It is converted into smaller molecules and released in the membrane. Optionally, the conversion and release of the molecules ^ f can be used to create holes in the film. The density of radon is thus reduced. The present invention provides A method for preparing an ultra-low dielectric constant (i.e., less than about 2 8) 此种. This material is suitable for integration in a conductor structure. Preferably, the dielectric constant of the ultra-low-k film of the present invention is about丨 5 to about 25, most preferably about 2.0 to about 225 The electric constant. The film of the present invention can be prepared by selecting two or more suitable precursors and combining them with specific processing parameters as described below. Preferably, the first precursor is selected from the group consisting of a ring having a SiCOH component Structural molecules, such as tetramethylcyclotetrasiloxane (TMCTS or C4H 丨 604Si4) or octamethylcyclotetrasiloxane (0MCTS or C8H2404Si4). More generally, the first precursor is Cycloalkyltetrasiloxane grades containing a ring structure, including equal numbers of silicon and oxygen atoms bonded in an alternating manner, and at least one of the silicon atoms covalently bonded to an alkyl group (such as fluorenyl, ethyl , Propyl or higher branched analogues' and cyclohydrocarbons like cyclopropyl, cyclopentyl, cyclohexyl or even southerly analogs), all silicon atoms are connected by two alkyl groups Circumstances -15- This paper size applies to Chinese National Standard (CNS) A4 (210 X 297 mm) 563202
隙z,大約是1英寸,反應爐1〇的抽真空則是透過3英寸的排 氣口 18來完成。射頻功率2〇連接至gDP 16,與反庫岸 絕緣,基板夾盤12則是接地。為實用’反應爐中=其= 的物件均接地在不同具體實施例中,射頻功率2 〇可連接 至基板夾盤12並傳送至基板22。若是如此,該基板可獲得 負偏壓,偏壓值則視反應爐的形狀及電漿參數而定。在另 -具體實施例+,可使用不止一個的電源供應器。譬如, 可使用兩個操作在相同射頻頻率之電源供應器,或是,一 個操作在低頻’一個操作在高頻。這兩個I源供應器可均 j接至相同的電極,亦可分別連至不同的電極。在另一具 扭只施例中,在沉積期間該射頻電源供應器所送出的電源 可以疋脈衝形式。沉積低k薄膜時所應控制的變數包括,射 頻功率’前驅物的混合情況與流量,反應爐中之壓力,以 及基板溫度。 反應爐10的表面24塗有絕緣材料。譬如,可在反應爐 24上塗上幾密爾厚之某一特定型式之塗料。基板夾盤12 則可使用另-種型式之塗料,譬如塗上氧化链薄層或是 他可抗拒電聚氧㈣之絕緣物f。對晶圓失盤加熱可控 基板的溫度。 根據本發明,使用適當的第一及第二前驅物及以如上, 述的處理參數的特定組合所製備的超低让材料最好包含, 约5至大約40原子百分數之矽;大約5至大約45原子百分』 之:,大約〇至大約5〇原子百分數之氧;以及大約腿幻 55原子百分數之氫。The gap z is approximately 1 inch, and the evacuation of the reactor 10 is performed through the 3-inch exhaust port 18. The RF power 20 is connected to the gDP 16, which is insulated from the anti-bank, and the substrate chuck 12 is grounded. For practical purposes, the objects in the reactor are grounded. In different embodiments, RF power 20 can be connected to the substrate chuck 12 and transmitted to the substrate 22. If so, the substrate can obtain a negative bias voltage, which depends on the shape of the reactor and the plasma parameters. In another embodiment, more than one power supply may be used. For example, two power supplies operating at the same RF frequency may be used, or one operating at a low frequency 'and one operating at a high frequency. These two I source suppliers can be connected to the same electrode, or can be connected to different electrodes respectively. In another embodiment, the power supplied by the RF power supply during the deposition may be in the form of chirped pulses. Variables to be controlled when depositing a low-k film include the mixing and flow rate of the RF power 'precursor, the pressure in the reaction furnace, and the substrate temperature. The surface 24 of the reaction furnace 10 is coated with an insulating material. For example, the reaction furnace 24 may be coated with a certain type of paint of a certain mil thickness. The substrate chuck 12 may use another type of coating, such as a thin layer of oxide chain or an insulator f which is resistant to electrical polyoxygen. Control the temperature of the substrate by heating the wafer out of control. According to the present invention, the ultra-low yield material prepared using appropriate first and second precursors and a specific combination of processing parameters as described above preferably contains, from about 5 to about 40 atomic percent silicon; from about 5 to about 45 atomic percent ": about 0 to about 50 atomic percent oxygen; and about 55 atomic percent of hydrogen.
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563202 A7 —- ______B7__ 五、發明説明(16 ) ' ' 在沉積薄膜的過程中所需控制的主要變數是:射頻功 率,該等前驅物之流量,反應爐壓力以及基板溫度。以下 提供幾個根據本發明,從第一前驅物四曱基環四矽氧烷 (TMCTS)及第二前驅物環氧環戊烯(“cp〇”)中沉積出薄膜 的例子。這些例子乃以He為載氣,將TMCTS前驅物蒸氣輸 =至反應爐中。可選擇性地於沉積之後,以攝氏4〇〇度對該 薄膜加熱,以降低k值。 應強調的是,本發明之製造方法只適用在特定的長成條 件及特定形狀之沉積反應爐中。若在所定義的長成條件^ 使用不同形狀的反應爐,則所製造出來之薄膜有可能無法 達到所要求的超低介電常數。譬如,本發明之平行板^應 爐所具有的基板夾盤面積應在大約3〇〇平方厘米到大約7〇〇 平方厘米之間,且最好是在大約5〇〇平方厘米到大約6〇〇平 方厘米之間。基板與氣體散佈板(或頂電極)間的距離大約 是在1公分至大約10公分之間,且最好是在大約15公分至 大約7公分之間。送至其中之一電極之射頻功率的頻率則是 在大約12百萬赫至大約丨5百萬赫之間,且最好是在大約 13. 56百萬赫。可選擇性地將一個低於丨百萬赫之低頻送至 相同的電極以作為射頻功率,或是以每平方厘米〇至〇3瓦 的功率密度,送至相反的電極。 所使用的沉積條件也是沉積處理是否成功的重要關鍵。 譬如’晶圓溫度應在大約攝氏25度至大約攝氏325度,且最 好疋在大約攝氏6 〇度到大約攝氏2 〇 〇度之間。射頻功率密度 則大約疋每平方厘米〇· 〇5瓦至大約每平方厘米i · 〇瓦,且最563202 A7 —- ______B7__ 5. Description of the invention (16) '' The main variables to be controlled during the film deposition process are: RF power, the flow rate of these precursors, reactor pressure, and substrate temperature. The following provides several examples of depositing a thin film according to the present invention from a first precursor tetramethylcyclotetrasiloxane (TMCTS) and a second precursor epoxy cyclopentene ("cp0"). These examples use He as the carrier gas to transport TMCTS precursor vapor into the reactor. Optionally, after deposition, the film is heated at 400 ° C to reduce the k value. It should be emphasized that the manufacturing method of the present invention is only applicable to a deposition reactor having a specific growth condition and a specific shape. If the reactors with different shapes are used under the defined growth conditions ^, the manufactured films may not reach the required ultra-low dielectric constant. For example, the substrate chuck area of the parallel plate oven of the present invention should be between about 300 square centimeters and about 700 square centimeters, and preferably between about 500 square centimeters and about 600 square centimeters. 〇 square centimeters. The distance between the base plate and the gas diffusion plate (or top electrode) is about 1 cm to about 10 cm, and preferably about 15 cm to about 7 cm. The frequency of the RF power delivered to one of the electrodes is between about 12 MHz and about 5 MHz, and preferably about 13.56 MHz. Optionally, a low frequency below megahertz can be sent to the same electrode as RF power, or at a power density of 0 to 03 watts per square centimeter to the opposite electrode. The deposition conditions used are also critical to the success of the deposition process. For example, the wafer temperature should be between about 25 ° C and about 325 ° C, and preferably between about 60 ° C and about 200 ° C. RF power density ranges from approximately 0.55 watts per square centimeter to approximately 0.5 watts per square centimeter, and most
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線 -19- 本紙張尺度適用中國國家標準(CNS) A4規格(210 X 297公釐) 563202 五 A7 B7 、發明説明(17 ) 好是在大約每平方厘米0.25瓦至大約每平方厘米0.8瓦。反 應氣體TMCTS之流量大約是每分鐘5標準立方厘米至大約每 分鐘1000標準立方厘米,且最好是大約每分鐘25標準立方 厘米至大約每分鐘200標準立方厘米。反應氣體CPO之流量 大約是每分鐘5標準立方厘米至大約每分鐘1000標準立方厘 米,且最好是大約每分鐘10標準立方厘米至大約每分鐘120 標準立方厘米。沉積處理期間的反應爐壓力則大約是在50 毫托至大約5000毫托之間,且最好是在大約100毫托至大約 3000毫托之間。 另外,TMCTS- C02 (其中C〇2乃是用作為載氣)的總反應 氣體流量大約是在每分鐘25標準立方厘米至大約每分鐘 1000標準立方厘米,C02與02混合氣體的流量則分別是 C02 :大約每分鐘25個標準立方厘米到每分鐘1000個標準立 方厘米,02 :大約是每分鐘0. 5個標準立方厘米到每分鐘50 個標準立方厘米,以及C02的流量大約是每分鐘15標準立方 厘米至大約每分鐘1000標準立方厘米。TMCTS-C02 (其中 C02乃是用作為載氣)的總反應氣體流量最好是大約每分鐘 50標準立方厘米至每分鐘500標準立方厘米。(:02與02混合 氣體的流量則最好分別是C02 :大約每分鐘50個標準立方厘 米到大約每分鐘500個標準立方厘米,02 :大約每分鐘1個 標準立方厘米到大約每分鐘3〇個標準立方厘米,以及C02的 流量大約是每分鐘50標準立方厘米至大約每分鐘500標準立 方厘米。沉積處理期間的反應爐壓力大約是5,0毫托至大約 5000毫托,最好是在100毫托至大約3000毫托之間。 -20- 本紙張尺度適用中國國家標準(CNS) A4規格(210 X 297公釐) 裝 訂Line -19- This paper size is in accordance with Chinese National Standard (CNS) A4 (210 X 297 mm) 563202 Five A7 B7, Invention Description (17) It is preferably about 0.25 watts per square centimeter to about 0.8 watts per square centimeter. The flow rate of the reaction gas TMCTS is about 5 standard cubic centimeters per minute to about 1,000 standard cubic centimeters per minute, and preferably about 25 standard cubic centimeters per minute to about 200 standard cubic centimeters per minute. The flow rate of the reaction gas CPO is about 5 standard cubic centimeters per minute to about 1,000 standard cubic centimeters per minute, and preferably about 10 standard cubic centimeters per minute to about 120 standard cubic centimeters per minute. The reactor pressure during the deposition process is then between about 50 mTorr and about 5000 mTorr, and preferably between about 100 mTorr and about 3000 mTorr. In addition, the total reaction gas flow rate of TMCTS-C02 (where C02 is used as a carrier gas) is approximately 25 standard cubic centimeters per minute to approximately 1,000 standard cubic centimeters per minute, and the flow rates of the mixed gas of C02 and 02 are C02: about 25 standard cubic centimeters per minute to 1000 standard cubic centimeters per minute, 02: about 0.5 standard cubic centimeters per minute to 50 standard cubic centimeters per minute, and the flow rate of C02 is about 15 per minute Standard cubic centimeters to about 1000 standard cubic centimeters per minute. The total reaction gas flow rate of TMCTS-C02 (where C02 is used as a carrier gas) is preferably about 50 standard cubic centimeters per minute to 500 standard cubic centimeters per minute. (: The flow rate of 02 and 02 mixed gas is preferably C02: about 50 standard cubic centimeters per minute to about 500 standard cubic centimeters per minute, 02: about 1 standard cubic centimeter per minute to about 3 per minute. Standard cubic centimeters, and the flow rate of C02 is about 50 standard cubic centimeters per minute to about 500 standard cubic centimeters per minute. The reactor pressure during the deposition process is about 5,0 mTorr to about 5000 mTorr, preferably at 100 mTorr to approximately 3000 mTorr. -20- This paper size applies to China National Standard (CNS) A4 (210 X 297 mm) binding
563202 五、發明説明(18 A7 B7563202 V. Description of the invention (18 A7 B7
應注意的是,基板夾盤的面積若變為又倍,即其面積值的 範圍就變更為大約300平方厘米至大約7〇〇平方厘米,則射 頻功率也應變為X倍。相同的,基板夾盤的面積若變為Y倍 以及氣體散佈板與基板夾盤間之距離變為2倍,則將使得氣 體流量ϋ為原先的YZ倍。#使料是"臺的沉積反應 爐,則基板的面積歸於個別的基板夾盤,氣體的流量歸於 個別的沉積平臺。於是,輸入至該反應爐中之總流量及與 總功率需乘上反應爐内沉積平臺的總數。 在將所沉積的薄膜接受更進一步的整合處理之前,須先 穩疋之。該穩定處理可以爐内退火的方式以大約攝氏3⑼度 至大約攝氏400度的溫度執行大約〇· 5個小時到大約4小時。 该穩定處理亦可用高於攝氏3〇〇度的溫度,以快速熱回火的 方式來執行。依照本發明所得到之薄膜的介電常數可低於 大約2. 8。本發明之薄膜在非氧化環境下的熱穩定度,可達 大約攝氏400度。 根據本發明所形成之電子裝置,示於圖6- 9。應注意的 是,圖6-9所示之裝置僅為本發明之說明例,其他無數的裝 置亦可依本發明製造。 圖6所繪為建置在矽基板32之上的電子裝置3〇。絕緣材料 層34形成於石夕基板32之上,其内嵌有第一金屬區%。在對 該第一金屬區36執行過化學機械研磨(“CMP”)處理後,再 於該第一絕緣材料層34及第一金屬區36之上沉積一個像超 低k薄膜38這樣的薄膜。第一絕緣材料層34可由氧化矽,氮 化石夕,以及這些材料的摻雜變體,或是任何其他合適的絕 -21 - 本紙張尺度適用中國國家標準(CNS) A4規格(21〇χ 297公釐)It should be noted that if the area of the substrate chuck is doubled, that is, the range of its area value is changed from about 300 cm 2 to about 700 cm 2, the radio frequency power is also changed to X times. Similarly, if the area of the substrate chuck becomes Y times and the distance between the gas diffusion plate and the substrate chuck becomes two times, the gas flow rate will be ϋYZ times the original. # 使 料 是 &台; Deposition reaction furnace, the area of the substrate is attributed to the individual substrate chuck, and the flow rate of the gas is attributed to the individual deposition platform. Therefore, the total flow rate and total power input to the reactor need to be multiplied by the total number of deposition platforms in the reactor. The deposited film must be stabilized before undergoing further integration. This stabilization treatment can be performed in a furnace annealing at a temperature of about 3 ° C to about 400 ° C for about 0.5 hours to about 4 hours. This stabilization process can also be performed at a temperature higher than 300 ° C in a rapid thermal tempering manner. The dielectric constant of the thin film obtained according to the present invention may be lower than about 2.8. The thermal stability of the film of the present invention in a non-oxidizing environment can reach about 400 degrees Celsius. An electronic device formed according to the present invention is shown in Figs. 6-9. It should be noted that the devices shown in Figs. 6-9 are only illustrative examples of the present invention, and countless other devices can also be manufactured according to the present invention. FIG. 6 illustrates an electronic device 30 built on a silicon substrate 32. The insulating material layer 34 is formed on the Shixi substrate 32, and the first metal region% is embedded therein. After a chemical mechanical polishing ("CMP") process is performed on the first metal region 36, a film such as an ultra-low-k film 38 is deposited on the first insulating material layer 34 and the first metal region 36. The first insulating material layer 34 may be made of silicon oxide, nitride nitride, or a doped variant of these materials, or any other suitable insulation -21-This paper size applies to the Chinese National Standard (CNS) A4 specification (21〇χ 297 (Mm)
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線 、發明説明(19 缘材枓所形成。以微影蝕刻 然德爯於甘士 次將起低k薄膜38予以圖案仆 、、後再於其中沉積導體層4〇 韦化, 處理之後,再以電漿增強式化二“體層40執行過CMP 積第二超低k薄膜層44 于乳相j冗積(“PECVD”)法沉 曰, 體層可用金屬的導電材料來沉穑 疋非金屬的導電材料。譬如, 、,或 ,非金屬的材料’像是氮化物或多晶 ::, 電連通於第-金屬區36。 弟導體層4〇 f對第二超低k薄膜層44中執行微影㈣,並接著〜 一‘體材質之沉積步驟後,第- 丁弟 道祕 弟—導體區50於焉形成。第- =5=是可以用金屬材質或是非金屬材質來沉 : 體⑽時的情況相類似電連= 第;導體區40且内嵌在第二超低k絕緣層44之卜 柄 k薄膜層緊貼著第—超低絕緣材質層3卜在此特定例中,第 一絕緣材質層38 (其為本發明之超低k材料)乃充作層内介電 材質,而第二絕緣材質層,亦即超低k薄膜44,則是充當為 層内及層間介電質。由於超低k薄膜具有低介電常數,所以 第一絕緣層38及第二絕緣層44可具有較佳的絕緣性質。 圖7所描繪的是本發明之電子裝置6〇,其與圖6所示之電 子裝置30相類似,但多了一個介電蓋層62,沉積在第一絕 緣材質層38及第二絕緣材質層44之間。介電蓋層&可用合 適的材料形成,像是氧化矽、氮化矽、氮氧化矽、碳化 矽、矽的碳氧化合物(SiCO),修正的超低k及它們的氫化化 合物,以及難熔的氮化矽金屬(其中該難熔的金屬選自於 -22-本紙張尺度適用中國國家標準(CNS) A4規格(210X 297公釐) 563202 五、發明説明(2〇 :鎢)。该另加的介電蓋層62乃是擴散障壁層, “ 導體層4G擴散至第二絕緣材質層44,或是擴 散至較下的佈局層,特別是層34及32。 义疋擴 j8所1會的是本發明電子裝置之另-替代具體實施例70。 '裝置70中,使用了兩個額外的介電蓋層72及74,充 作RIE遮罩及CMp (化學機械研磨)研磨擔止層。第—介面蓋 層72乃’儿積在第—絕緣材質層38之上。介電層”的功用在 於為在平坦化第一導體層40時所使用的CMP處理提供 CMP的處理終點。可用適當的介電材質來沉積研磨擋止層 72,像是氧化矽、氮化矽、a氧化矽、碳化矽、矽的碳‘ 化合物(SiCO),修正的超低k及它們的氫化化合物,以及難 熔的氮化矽金屬(其中該難熔的金屬選自於鈕、鍅、铪、 鎢)。介電層72的上表面與第一導體層4〇的上表面平高。可 在第二絕緣材質層44之上另加一第二介電層74,其目的與 加入介電層72的目的相同。 圖9所緣的是本發明電子裝置之又一替代具體實施例8〇。 在此替代具體實施例中,另沉積了一介電層82,將第二絕 緣材質層44分割為兩層84與86。圖8所繪的層内及層間介電 層44因而在互連92及互連94的邊界處,被分·割成層間介電 層84與層内介電層86,如圖9所繪。另於上介電層74之上沉 積一擴散障壁層96。此種替代具體實施例電子結構80所能 提供的額外好處在於,介電層82所扮演的RIE蝕刻擋止角 色,擁有更優越的互連深度控制能力。 -23- 本紙張尺度適用中國國家標準(CNS) A4規格(210X297公釐) 裝 訂Thread, invention description (19 formed by edge material 。. lithography etched 爯 甘 甘 甘 次 次 甘 the low-k film 38 is patterned, and then a conductor layer 40 is deposited in it, after processing, and then The plasma-enhanced body layer 40 has been subjected to CMP, and the second ultra-low-k thin film layer 44 has been subjected to the emulsion phase redundancy ("PECVD") method. The body layer can be made of metallic conductive materials to immerse non-metallic materials. Conductive materials. For example,,, or, non-metallic materials such as nitrides or polycrystallines: are electrically connected to the first metal region 36. The second conductive layer 40f performs the second ultra-low-k thin film layer 44 Lithography, and then ~ After the step of depositing the bulk material, the first-Ding ’s secret secretary-the conductor area 50 is formed in the base. The-= 5 = can be used to sink metal or non-metal materials: body The situation is similar to electrical connection = the first; the conductor region 40 and the k-thin film layer embedded in the second ultra-low-k insulating layer 44 are close to the first-ultra-low-insulation material layer 3. In this particular example, the An insulating material layer 38 (which is the ultra-low-k material of the present invention) is used as the dielectric material in the layer, and the second insulation The low-k film, ie, the ultra-low-k thin film 44, acts as a dielectric within and between layers. Since the ultra-low-k film has a low dielectric constant, the first insulating layer 38 and the second insulating layer 44 may have better properties. FIG. 7 depicts the electronic device 60 of the present invention, which is similar to the electronic device 30 shown in FIG. 6 but with a dielectric cover layer 62 deposited on the first insulating material layer 38 and Between the second insulating material layers 44. The dielectric cap layer & can be formed with a suitable material, such as silicon oxide, silicon nitride, silicon oxynitride, silicon carbide, silicon carbide (SiCO), ultra-low correction k and their hydrogenated compounds, and refractory silicon nitride metal (where the refractory metal is selected from -22- this paper size applies Chinese National Standard (CNS) A4 specifications (210X 297 mm) 563202) V. Invention Explanation (20: Tungsten). The additional dielectric cap layer 62 is a diffusion barrier layer, "the conductor layer 4G diffuses to the second insulating material layer 44, or to a lower layout layer, especially layer 34. And 32. What I will discuss is another alternative to the embodiment 70 of the electronic device of the present invention. 'In the device 70, two additional dielectric cap layers 72 and 74 are used as RIE masks and CMP (Chemical Mechanical Polishing) polishing stop layers. The first interface cover layer 72 is the first layer of insulation Above the material layer 38. The function of the "dielectric layer" is to provide a CMP process endpoint for the CMP process used to planarize the first conductor layer 40. The polishing stop layer 72 can be deposited with a suitable dielectric material, such as Silicon oxide, silicon nitride, silicon oxide, silicon carbide, silicon carbon 'compounds (SiCO), modified ultra-low-k and their hydrogenated compounds, and refractory silicon nitride metals (of which the refractory metal is selected From buttons, osmium, thorium, tungsten). The upper surface of the dielectric layer 72 is level with the upper surface of the first conductor layer 40. A second dielectric layer 74 may be added on top of the second insulating material layer 44 for the same purpose as that of the dielectric layer 72. FIG. 9 illustrates another alternative embodiment 80 of the electronic device of the present invention. In this alternative embodiment, another dielectric layer 82 is deposited, and the second insulating material layer 44 is divided into two layers 84 and 86. The inter-layer and inter-layer dielectric layers 44 depicted in FIG. 8 are thus divided and split into the inter-layer dielectric layer 84 and the inter-layer dielectric layer 86 at the boundaries of the interconnects 92 and 94, as shown in FIG. A diffusion barrier layer 96 is deposited on the upper dielectric layer 74. An additional benefit that this alternative embodiment electronic structure 80 can provide is that the RIE etch stop role played by the dielectric layer 82 has a superior interconnect depth control capability. -23- This paper size applies to China National Standard (CNS) A4 (210X297 mm) binding
563202563202
^下所呈現之例子,說明出本發明超低W電薄模的製造 方式’並展示由此所得到之好處。 例1 此例子中,根據圖3,首先,透過長條閥14將晶圓置入反 應爐10中,然後利用氬氣加以刻。在製備此晶圓的過 =中,晶圓的溫度大約在攝氏180度,氬的流量大約在每分 鐘25個標準立方厘米,以使壓力達到大約1〇〇毫托。接著將 射頻電源打開’調至大約i25瓦,維持大約6〇秒。隨後將射 頻電源及氬氣關閉。 以He作為載氣,將TMCTS前驅物載入反應爐中。…流入 TMCTS谷器中時的壓力大約是5 psig。本發明之超低k薄膜 可以下法沉積:將TMCTS+He以及CPO的流量及壓力設定 在大約TMCTS + He ··每分鐘20標準立方厘米,CPO :每分 鐘6標準立方厘米,以及大約1 〇〇毫托。隨後將射頻電源打 開’調至大約15瓦,維持大約5〇分鐘。隨後將射頻電源及 氣流關閉。將晶圓從反應爐1 〇中移開。 為了降低所沉積薄膜的介電常數,以及改善它們的熱穩 定性(亦即,使它們在大於攝氏3〇〇度時仍具有穩定性),可 令薄膜接受後回火處理,以使其内的揮發性物質蒸發,全 面性地穩定該薄膜。該後回火處理可在回火爐中依下列步 驟執行。首先以每分鐘大約1〇公升的流量將氮氣通入,清 洗回火爐大約5分鐘(該等薄膜樣品置於承載台上)。之後將 該等薄膜樣本轉放至反應爐中,開始進行後回火步驟:以 大約每分鐘攝氏5度的加熱率加熱至大約攝氏280度,將溫 -24 - 本紙張尺度適用中國國家標準(CNS) Α4規格(210 X 297公釐)The example presented below illustrates the manufacturing method of the ultra-low W electric thin mold of the present invention 'and shows the benefits obtained thereby. Example 1 In this example, according to FIG. 3, first, a wafer is placed in a reactor 10 through a long valve 14, and then engraved with argon. During the preparation of this wafer, the temperature of the wafer was about 180 degrees Celsius, and the flow rate of argon was about 25 standard cubic centimeters per minute to bring the pressure to about 100 mTorr. Then turn the RF power on 'to about i25 watts for about 60 seconds. The radio frequency power and argon were then turned off. With He as the carrier gas, the TMCTS precursor was loaded into the reactor. ... the pressure into the TMCTS trough is about 5 psig. The ultra-low-k film of the present invention can be deposited by setting the flow rate and pressure of TMCTS + He and CPO at about TMCTS + He · 20 standard cubic centimeters per minute, CPO: 6 standard cubic centimeters per minute, and about 10 〇mtor. The RF power was then turned on to about 15 watts for about 50 minutes. Then turn off the RF power and airflow. Remove the wafer from the reactor 10. In order to reduce the dielectric constant of the deposited films and to improve their thermal stability (that is, to make them stable at temperatures greater than 300 degrees Celsius), the films may be subjected to tempering after they are accepted, so that The volatile substances evaporate and stabilize the film comprehensively. This post-tempering treatment can be performed in a tempering furnace by the following steps. Nitrogen was first passed in at a rate of about 10 liters per minute, and the tempering furnace was cleaned for about 5 minutes (the film samples were placed on a stage). The film samples were then transferred to a reaction furnace, and the post-tempering step was started: the heating rate was about 5 degrees Celsius per minute to about 280 degrees Celsius, and the temperature was -24-this paper scale applies Chinese national standards ( CNS) Α4 size (210 X 297 mm)
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563202 A7 B7 五、發明説明(22 ) 度保持在大約攝氏280度約5分鐘,再以大約每分鐘攝氏5度 的第一加熱率將其加熱至大約攝氏4 0 0度’再將溫度保持在 大約攝氏400度約4小時,最後將爐火關閉讓該等薄膜樣品 冷卻至大約攝氏100度以下。第一次保溫動作的合適保溫範 圍,大約是攝氏280度至攝氏300度,第二次保溫動作的合 適保溫範圍則是將溫度保持在大約攝氏300度至攝氏4〇〇 度。 現在將第一具體實施例的結果討論於圖4及5。圖4是標準 SiCOH薄膜的傅立葉轉換紅外線(“FTIR”)光譜。該光譜告 訴我們大約1000-1 100 cm·1的波長範圍是Si-〇—個很強的吸 收帶,Si-CH3的吸收峰大約是在1275 cm-1,Si-H的吸收帶則 大約是在2150-2250 cnT1,小C-H吸收高峰則大約是在2900-3 000 cm-1。CH,SiH及SiCH3高峰相較於SiCOH薄膜之SiO高 峰的相對強度,示於表1。 圖5顯示的是根據本發明,由(TMCTS+He) + CPO之混合 物所製備之超低k薄膜其FTIR光譜。該光譜顯示s卜〇, Si-CH3以及C-Η吸收峰之光譜,如圖4所做的那樣。不過, 此圖中沒有8卜《[之吸收峰,且(:*^其大約在2900- 3000 (:111-1 之吸收帶的超低k薄膜強度亦遠大於圖4中所示之siCOH薄 膜之超低k薄膜強度。CH及SiCH3高峰相較於此薄膜之Si〇 高峰的相對強度,亦示於表i。如表1所特別說明的,該超 低k薄膜之C-H高峰的整合區域是s i-CH3高峰的40%,而僅 疋SiCOH薄膜中S i-CH3高峰的2%。此很清楚的指出該超低k 薄膜除内含SiCOH相之外,還内含了相當程度的次要CHx -25- 本紙張尺度適用中國國家標準(CNS) A4規格(210 X 297公釐) 563202 A7 B7 五、發明説明(23 ) ^ (碳氫)相的量。該超低k薄膜的FTIR光譜的另一個特徵是該 Si-Ο高峰分裂成兩個高峰,約在i139 cm·1及1〇56 cm.1 ,於 圖5中可看出。 材質 CH/SiO (〇/〇) SiH/SiO (%) SiCH/SiO r%) SiCOH 2 7 5 超低k 10 0 4 例2 表1 FTIR吸收峰的相對#合強度 此例中之晶圓亦如例1所述之法製備,但晶圓的溫度則設 定在大約攝氏300度。之後使用He為載氣,將TMCTS前驅物 送入反應爐中;He流入丁MCTS容器中時的壓力大約是5 psig。本發明之超低k薄膜可以下法沉積:將TMCTS + He以 及CPO的流量及壓力設定在大約TMCTS + He :每分鐘150標 準立方厘米,CPO :每分鐘50標準立方厘米,以及大約2000 毫托。隨後將射頻電源打開,調至大約1 50瓦,維持大約1 〇 分鐘。隨後將射頻電源及氣流關閉。將晶圓從反應爐10中 移開並以例1中所述之法加以回火。 例3 此例所使用的反應爐内含6個沉積臺。晶圓夾盤的溫度設 定在約攝氏3 5 0。使用液體傳遞系統,以大約每分鐘5毫克 的流量將TMCTS前驅物載入反應爐中,該CPO的流量則大 約是每分鐘900個標準立方厘米,壓力則是穩定在大約3000 毫托。送至反應爐之總射頻功率約為6〇〇瓦,低頻功率則約 為3 00瓦。晶圓在沉積臺上接受一段預定時間之沉積後,即 移動至下一個沉積臺,以如此方式於每一個沉積臺上接受 -26- 本紙張尺度適用中國國家標準(CNS) A4規格(210 X 297公釐) 563202 A7 B7 五、發明説明(24 ) 沉積’最後沉積出該超低k薄膜。晶圓在通過最後一個沉積 $後即自反應爐中移出,接受例丨中所述之回火程序。 則述例中之電漿乃操作在連續模式。以下例4之電漿則是 操作在脈衝模式中。 例4 此例中’儿積的執行條件類似於例1,只不過電漿是操作在 脈$模式,亦即,責任週期大約是50%,電漿的開啟時間563202 A7 B7 V. Description of the invention (22) The temperature is maintained at about 280 degrees Celsius for about 5 minutes, and then it is heated to about 400 degrees Celsius at a first heating rate of about 5 degrees Celsius per minute, and the temperature is maintained at At about 400 ° C for about 4 hours, the furnace fire was turned off and the film samples were cooled to about 100 ° C or below. The suitable insulation range for the first insulation action is approximately 280 ° C to 300 ° C, and the appropriate insulation range for the second insulation action is to maintain the temperature at approximately 300 ° C to 400 ° C. The results of the first specific embodiment will now be discussed in Figs. Figure 4 is a Fourier transformed infrared ("FTIR") spectrum of a standard SiCOH film. The spectrum tells us that the wavelength range of about 1000-1 to 100 cm · 1 is Si—0—a very strong absorption band, the absorption peak of Si-CH3 is about 1275 cm-1, and the absorption band of Si-H is about At 2150-2250 cnT1, the peak of small CH absorption is about 2900-3 000 cm-1. The relative intensities of the CH, SiH and SiCH3 peaks compared to the SiO peaks of the SiCOH film are shown in Table 1. Figure 5 shows the FTIR spectrum of an ultra-low-k film prepared from a mixture of (TMCTS + He) + CPO according to the present invention. This spectrum shows the spectra of sbO, Si-CH3, and C-fluorene absorption peaks, as shown in Fig. 4. However, there is no 8 absorption peak in this figure, and the intensity of the ultra-low-k film with an absorption band of about 2900-3000 (: 111-1 is also much greater than that of the siCOH film shown in FIG. 4 The strength of the ultra-low-k film. The relative intensities of the CH and SiCH3 peaks compared to the Si0 peak of this film are also shown in Table i. As specifically illustrated in Table 1, the integrated region of the CH peak of the ultra-low-k film is 40% of the peak of s i-CH3, and only 2% of the peak of Si-CH3 in the 疋 SiCOH film. It is clear that the ultra-low-k thin film contains a considerable degree of in addition to the SiCOH phase. Yes CHx -25- This paper size applies Chinese National Standard (CNS) A4 specification (210 X 297 mm) 563202 A7 B7 V. Description of the invention (23) ^ (hydrocarbon) phase amount. FTIR of this ultra-low-k film Another feature of the spectrum is that the Si-O peak is split into two peaks, about i139 cm · 1 and 1056 cm.1, which can be seen in Figure 5. Material CH / SiO (〇 / 〇) SiH / SiO (%) SiCH / SiO r%) SiCOH 2 7 5 ultra-low k 10 0 4 Example 2 Table 1 Relative intensity of FTIR absorption peaks The wafer in this example was also prepared as described in Example 1, but the crystal The temperature of the circle is set At about 300 degrees Celsius. Then use He as the carrier gas to send the TMCTS precursor into the reactor; the pressure when He flows into the MCTS container is about 5 psig. The ultra-low-k film of the present invention can be deposited by: The flow and pressure of TMCTS + He and CPO are set at about TMCTS + He: 150 standard cubic centimeters per minute, CPO: 50 standard cubic centimeters per minute, and about 2000 mTorr. Then turn on the RF power and adjust to about 150 watts Keep it for about 10 minutes. Then turn off the RF power and air flow. Remove the wafer from the reactor 10 and temper it by the method described in Example 1. Example 3 The reactor used in this example contains 6 Deposition stations. The temperature of the wafer chuck is set at about 350 ° C. Using a liquid transfer system, the TMCTS precursor is loaded into the reactor at a rate of approximately 5 mg per minute, and the flow rate of this CPO is approximately per minute. 900 standard cubic centimeters, and the pressure is stable at about 3000 mTorr. The total RF power sent to the reactor is about 600 watts, and the low-frequency power is about 300 watts. The wafer is accepted on the deposition table for a predetermined time After the deposition, Move to the next deposition station and accept it at each deposition station in this way. -26- This paper size applies Chinese National Standard (CNS) A4 (210 X 297 mm) 563202 A7 B7 V. Description of the invention (24) 'Finally, the ultra-low-k film was deposited. The wafer is removed from the reactor after passing the last deposition $, and is subjected to the tempering procedure described in Example 丨. The plasma in the example is operated in continuous mode. The plasma in Example 4 below is operated in pulse mode. Example 4 In this example, the execution condition of the child product is similar to Example 1, except that the plasma is operated in the pulse $ mode, that is, the duty cycle is about 50%, and the plasma is turned on.
約疋從50¾秒至10〇亳秒。將晶圓從反應爐1〇中移開之後, P將X已有薄膜,儿積於上之晶圓送至接受如例1所述之回火 程序。 裝 就如上述例中所言,所製備出之薄膜具有範圍為約2.0至 2·25之介電常數。 訂About 疋 from 50¾ seconds to 100 亳 seconds. After removing the wafer from the reaction furnace 10, P will send the existing X film to the wafer to receive the tempering procedure as described in Example 1. As mentioned in the above examples, the prepared thin film has a dielectric constant ranging from about 2.0 to 2.25. Order
快速熱回火(“RTA”)處理也可用於穩定超低匕薄膜。根據 本發明所得到之薄膜其介電常數M、於大約2·8,纟於後段 製程(“BEOL,,)互連結構中的整合階段時亦具熱穩錢,在 做整合處理時的溫度通常可達攝氏度。因此本發明所教 導之事務亦可輕易地修改適於製造出作為邏輯及記憶 置其後段製程中層内及層間介電質之薄膜。 心 、 本發明之方法及依其所形成之電子結構,已充份地屐示 於以上的說明及所附的圖^圖示中。應強調的是,圖6_9 所示之電子結構例僅作說明本發明方法用,此法是可應用 在多數的電子裝置的製造上。 〜 例5 -27-Rapid thermal tempering ("RTA") processing can also be used to stabilize ultra-low dagger films. The dielectric constant M of the thin film obtained according to the present invention is about 2 · 8, which is also thermally stable during the integration stage in the later stage ("BEOL,") interconnect structure, and the temperature during the integration process It can usually reach degrees Celsius. Therefore, the matters taught by the present invention can also be easily modified to produce thin films of inter-layer and inter-layer dielectrics which are used as logic and memory in the subsequent process. Heart, the method of the present invention, and the formation thereof The electronic structure is fully shown in the above description and the attached figure ^. It should be emphasized that the example of the electronic structure shown in Figure 6_9 is only used to illustrate the method of the present invention, this method is applicable In the manufacture of most electronic devices. ~ Example 5 -27-
563202563202
此例子中,根據圖3 ,首先,透過,長條閥14將晶圓置入反 應爐10中’然後利用氬氣加以預蝕刻。在製備此晶圓的過 程中,晶圓的溫度大约在攝氏180度,氬的流量大約在每分 隹里25個“準立方厘米,以使壓力達到大約i⑽毫托。接著將 射頻電源打開,調至大約125瓦,維持大約6〇秒。隨後將射 頻電源及氬氣關閉。 以c〇2作為載氣,將驅物載入反應爐中。c〇2流 入丁 MCTS谷為中時的壓力大約是5 psig。本發明之超低k薄 膜可以下法沉積:將TMCTS+c〇2以及cp〇的流量及壓力設 疋在大約TMCTS + C〇2 :每分鐘20標準立方厘米,cp〇 :每 分鐘10標準立方厘米,以及大約100毫托。隨後將射頻電源 打開,調至大約15瓦,維持大約50分鐘。隨後將射頻電源 及氣流關閉。將晶圓從反應爐丨〇中移開。 為了降低所沉積薄膜的介電常數,以及改善它們的熱穩 疋性(亦即’使它們在大於攝氏3 〇 〇度時仍具有穩定性),可 令薄膜接受後回火處理,以使其内的揮發性物質蒸發,全 面性地穩定該薄膜。該後回火處理可在回火爐中依下列步 驟執行。首先以每分鐘大約1 0公升的流量將氮氣通入,清 洗回火爐大約5分鐘(該等薄膜樣品置於承載台上)。之後將 該等薄膜樣本轉放至反應爐中,開始進行後回火步驟:以 大約每分鐘攝氏5度的加熱率加熱至大約攝氏28〇度,將溫 度保持在大約攝氏2 8 0度約5分鐘,再以大約每分鐘攝氏5度 的第一加熱率將其加熱至大約攝氏4 0 0度,再將溫度保持在 大約攝氏400度約4小時,最後將爐火關閉讓該等薄膜樣品 -28- 本紙張尺度適用中國國家標準(CNS) A4規格(210 X 297公釐) 563202 A7 B7 五、發明説明(26 ) ^ ~ 冷卻至大約攝氏100度以下。第一次保溫動作的合適保溫範 圍,大約是攝氏280度至攝氏300度,第二次保溫動作的合 適保溫範圍則是大約攝氏300度至攝氏400度。 例6 此例中之晶圓亦如例5所述之法製備,但晶圓的溫度則設 疋在大約攝氏300度。之後使用C〇2為載氣,將tmC T S前驅 物送入反應爐中;C〇2流入TMCTS容器中時的壓力大約是5 psig。本發明之超低k薄膜可以下法沉積··將TMCTS + C02 以及CPO的流量及壓力設定在大約丁MCTS + c〇2 :每分鐘 150標準立方厘米,CPO :每分鐘75標準立方厘米,以及大 約2 0 0 0宅托。隨後將射頻電源打開,調至大約1 $ 〇瓦,維持 大約10分鐘。隨後將射頻電源及氣流關閉。將晶圓從反應 爐10中移開並以例5中所述之法加以回火。 前述例中之電漿乃操作在連續模式。以下例7之電漿則是 操作在脈衝模式中。 例7 此例中沉積的執行條件類似於例5,只不過電漿是操作在 脈衝模式’亦即,責任週期大約是5〇%,電漿的開啟時間約 是從50毫秒至1〇〇毫秒。將晶圓從反應爐1〇中移開之後,即 將該已有薄膜沉積於上之晶圓送至接受如例5所述之回火程 序。 例8 此例所使用的反應爐内含6個沉積臺。晶圓夾盤的溫度設 定在約攝氏350度。使用液體傳遞系統,以大約每分鐘$毫 -29- I紙張尺度適财S S家標準(CNS) A4規格(21GX撕公爱) 563202 A7 —______B7 五、發明説明(27 ) 升的流量將TMCTS前驅物載入反應爐中,該cp〇的流量則 大約是每分·鐘250個標準立方厘米,壓力則是穩定在大約 4000毫托。分別以大約每分鐘5〇〇〇個標準立方厘米的流量 及大約每分鐘250個標準立方厘米的流量,將c〇2及〇2通入 反應爐’摻入TMCTS、CPO的混合氣體中。(:02及02的加入 可使電漿穩定並改善薄膜的均勻度。送至反應爐之總高頻 射頻功率約為6〇〇瓦,低頻功率則約為3〇〇瓦。晶圓在沉積 $上接叉一段預定時間之沉積後,即移動至下一個沉積 臺’以如此方式於每一個沉積臺上接受沉積,最後沉積出 該超低k薄膜。晶圓在通過最後一個沉積臺後即自反應爐中 移出,然後選擇性地進一步接受例5中所述之回火程序。 就如上述例中所言,所製備出之薄膜具有範圍為約2.0至 約2.25之介電常數。 快速熱回火(“ RTA”)處理也可用於穩定超低k薄膜。根據 本I明所得到之薄膜其介電常數k小於大約2 8,在於後段 製程(“BEOL”)互連結構中的整合階段時亦具熱穩定性,在 做整合處理時的溫度通常可達攝氏4〇〇度。因此本發明所教 導之事務亦可輕易地修改適於製造出作為邏輯及記憶體裝 置其後段製程中層内及層間介電質之薄膜。 本發明之改良方法已充份地展示於以上的說明及所附的 圖1-3圖tf中。應注意的是,前述之改良方法可應用在無數 的電子結構及裝置的製造上。 雖然本發明已以圖解的方式加以說明,但應了解的是, 其中所使用的名詞僅為說明用而非欲以此為限。In this example, according to FIG. 3, first, the wafer is placed in the reactor 10 through the long valve 14 'and then pre-etched with argon. During the preparation of this wafer, the temperature of the wafer was about 180 degrees Celsius, and the flow rate of argon was about 25 "quasi-cubic centimeters per minute, so that the pressure reached about 1 ⑽mTorr. Then the RF power was turned on. Adjust it to about 125 watts and maintain it for about 60 seconds. Then turn off the RF power and argon. Use c02 as the carrier gas to load the drive into the reactor. Pressure when c02 flows into the MCTS valley It is about 5 psig. The ultra-low-k film of the present invention can be deposited by setting the flow rate and pressure of TMCTS + c0 and cp0 at about TMCTS + C02: 20 standard cubic centimeters per minute, cp0: 10 standard cubic centimeters per minute, and about 100 millitorr. The RF power was then turned on, adjusted to about 15 watts, and maintained for about 50 minutes. The RF power and air flow were then turned off. The wafer was removed from the reactor. In order to reduce the dielectric constant of the deposited films and improve their thermal stability (that is, to 'make them stable at temperatures greater than 300 degrees Celsius), the films may be subjected to post-tempering treatment to make them The volatile substances inside evaporate, The film is surface-stabilized. The post-tempering treatment can be performed in the tempering furnace according to the following steps. First, nitrogen gas is passed in at a rate of about 10 liters per minute, and the tempering furnace is cleaned for about 5 minutes (the film samples are placed in On the stage). Then transfer the film samples to the reaction furnace and start the post-tempering step: heat up to about 28 ° C with a heating rate of about 5 ° C per minute and keep the temperature at about 2 ° C 80 degrees for about 5 minutes, and then heat it to about 400 degrees Celsius at a first heating rate of about 5 degrees Celsius per minute, and then maintain the temperature at about 400 degrees Celsius for about 4 hours, and finally turn the furnace off and let Samples of these films-28- This paper size is in accordance with Chinese National Standard (CNS) A4 (210 X 297 mm) 563202 A7 B7 V. Description of the invention (26) ^ ~ Cool to about 100 degrees Celsius or below. First heat preservation The suitable insulation range for the action is approximately 280 ° C to 300 ° C, and the suitable insulation range for the second insulation action is approximately 300 ° C to 400 ° C. Example 6 The wafer in this example is also described in Example 5. Prepared, but The temperature of the circle is set at about 300 degrees Celsius. The TmC TS precursor is then sent into the reactor using CO2 as the carrier gas; the pressure when CO2 flows into the TMCTS container is about 5 psig. Ultra-low-k thin film can be deposited by setting the flow rate and pressure of TMCTS + C02 and CPO to about MCTS + c02: 150 standard cubic centimeters per minute, CPO: 75 standard cubic centimeters per minute, and about 20 0 0 home care. The RF power was then turned on, adjusted to about 1 $ 0 watts, and maintained for about 10 minutes. The RF power and air flow were then turned off. The wafer was removed from the reaction furnace 10 and tempered in the manner described in Example 5. The plasma in the previous example was operated in continuous mode. The plasma in Example 7 below is operated in pulse mode. Example 7 The execution conditions of the deposition in this example are similar to Example 5, except that the plasma is operated in pulse mode, that is, the duty cycle is about 50%, and the turn-on time of the plasma is about 50 milliseconds to 100 milliseconds. . After the wafer is removed from the reaction furnace 10, the wafer on which the existing thin film is deposited is sent to a tempering process as described in Example 5. Example 8 The reactor used in this example contains 6 deposition stations. The temperature of the wafer chuck is set at about 350 degrees Celsius. Use a liquid delivery system at a price of approximately $ m-29-I paper standard SS Home Standard (CNS) A4 specification (21GX tear public love) 563202 A7 —______ B7 V. Description of the invention (27) The flow of liters will drive the TMCTS precursor The material is loaded into the reaction furnace, the flow rate of the cp0 is about 250 standard cubic centimeters per minute and clock, and the pressure is stabilized at about 4000 mTorr. At a flow rate of about 5,000 standard cubic centimeters per minute and a flow rate of about 250 standard cubic centimeters per minute, co2 and 〇2 were introduced into a reaction furnace 'and mixed into a mixed gas of TMCTS and CPO. (: The addition of 02 and 02 can stabilize the plasma and improve the uniformity of the film. The total high-frequency RF power sent to the reactor is about 600 watts, and the low-frequency power is about 300 watts. The wafer is being deposited $ 上 接 叉 After a predetermined period of deposition, it will move to the next deposition station 'in this way to accept the deposition on each deposition station, and finally deposit the ultra-low-k thin film. After the wafer passes through the last deposition station, Remove from the reactor and then optionally further accept the tempering procedure described in Example 5. As stated in the above example, the prepared film has a dielectric constant ranging from about 2.0 to about 2.25. Fast heat Tempering ("RTA") processing can also be used to stabilize ultra-low-k films. The dielectric constant k of the films obtained according to this document is less than about 28, which is at the integration stage in the back-end process ("BEOL") interconnect structure It also has thermal stability, and the temperature during integration processing can usually reach 400 degrees Celsius. Therefore, the affairs taught by the present invention can also be easily modified and suitable for manufacturing logic and memory devices. Between floors The thin film of electricity. The improvement method of the present invention has been fully shown in the above description and the attached figures 1-3 to tf. It should be noted that the aforementioned improvement method can be applied to countless electronic structures and devices. Manufacture. Although the present invention has been illustrated by way of illustration, it should be understood that the terms used therein are for illustration only and are not intended to be limited thereto.
563202 A7 B7 五、發明説明(28 ) 另外,雖然本文以一個特定的較佳具體實施例及幾個替 代具體實施例來展示及描述本發明,但歡迎習於此藝人士 在不偏離本發明之精神及範圍下,以此處之所學將本發明 做各種可能的變化。 本發明具體實施例中所宣稱之專有性質或特權均定義於 以下所附之專利範圍中。 -31 - 本紙張尺度適用中國國家標準(CNS) A4規格(210 X 297公釐)563202 A7 B7 V. Description of the Invention (28) In addition, although the present invention is shown and described with a specific preferred embodiment and several alternative embodiments, those skilled in the art are welcome to do so without departing from the invention. In the spirit and scope, the present invention can make various possible changes based on what has been learned here. The proprietary properties or privileges declared in the specific embodiments of the present invention are defined in the scope of patents attached below. -31-This paper size applies to China National Standard (CNS) A4 (210 X 297 mm)
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