TW561513B - Semiconductor device and method of manufacturing the same - Google Patents
Semiconductor device and method of manufacturing the same Download PDFInfo
- Publication number
- TW561513B TW561513B TW091125021A TW91125021A TW561513B TW 561513 B TW561513 B TW 561513B TW 091125021 A TW091125021 A TW 091125021A TW 91125021 A TW91125021 A TW 91125021A TW 561513 B TW561513 B TW 561513B
- Authority
- TW
- Taiwan
- Prior art keywords
- film
- silicon nitride
- semiconductor device
- insulating film
- nitride film
- Prior art date
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Classifications
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/69—IGFETs having charge trapping gate insulators, e.g. MNOS transistors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28158—Making the insulator
- H01L21/28167—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
- H01L21/28176—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation with a treatment, e.g. annealing, after the formation of the definitive gate conductor
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/022—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being a laminate, i.e. composed of sublayers, e.g. stacks of alternating high-k metal oxides
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/0217—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28158—Making the insulator
- H01L21/28167—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
- H01L21/28202—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation in a nitrogen-containing ambient, e.g. nitride deposition, growth, oxynitridation, NH3 nitridation, N2O oxidation, thermal nitridation, RTN, plasma nitridation, RPN
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28247—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon passivation or protection of the electrode, e.g. using re-oxidation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
- H01L21/28518—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table the conductive layers comprising silicides
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76897—Formation of self-aligned vias or contact plugs, i.e. involving a lithographically uncritical step
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/01—Manufacture or treatment
- H10D64/021—Manufacture or treatment using multiple gate spacer layers, e.g. bilayered sidewall spacers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/01—Manufacture or treatment
- H10D64/031—Manufacture or treatment of data-storage electrodes
- H10D64/037—Manufacture or treatment of data-storage electrodes comprising charge-trapping insulators
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/60—Electrodes characterised by their materials
- H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
- H10D64/68—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
- H10D64/681—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator having a compositional variation, e.g. multilayered
- H10D64/685—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator having a compositional variation, e.g. multilayered being perpendicular to the channel plane
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/60—Electrodes characterised by their materials
- H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
- H10D64/68—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
- H10D64/693—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator the insulator comprising nitrogen, e.g. nitrides, oxynitrides or nitrogen-doped materials
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/0212—Manufacture or treatment of FETs having insulated gates [IGFET] using self-aligned silicidation
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/0223—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate
- H10D30/0227—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate having both lightly-doped source and drain extensions and source and drain regions self-aligned to the sides of the gate, e.g. lightly-doped drain [LDD] MOSFET or double-diffused drain [DDD] MOSFET
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Crystallography & Structural Chemistry (AREA)
- General Chemical & Material Sciences (AREA)
- Semiconductor Memories (AREA)
- Non-Volatile Memory (AREA)
- Formation Of Insulating Films (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Electrodes Of Semiconductors (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2002155740A JP3637332B2 (ja) | 2002-05-29 | 2002-05-29 | 半導体装置及びその製造方法 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| TW561513B true TW561513B (en) | 2003-11-11 |
Family
ID=29561437
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW091125021A TW561513B (en) | 2002-05-29 | 2002-10-25 | Semiconductor device and method of manufacturing the same |
Country Status (5)
| Country | Link |
|---|---|
| US (3) | US6774462B2 (enExample) |
| JP (1) | JP3637332B2 (enExample) |
| KR (3) | KR100555810B1 (enExample) |
| CN (1) | CN1316629C (enExample) |
| TW (1) | TW561513B (enExample) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7588883B2 (en) | 2006-05-09 | 2009-09-15 | United Microelectronics Corp. | Method for forming a gate and etching a conductive layer |
| US8022465B2 (en) | 2005-11-15 | 2011-09-20 | Macronrix International Co., Ltd. | Low hydrogen concentration charge-trapping layer structures for non-volatile memory |
| TWI770857B (zh) * | 2020-09-22 | 2022-07-11 | 南亞科技股份有限公司 | 製造半導體裝置的方法 |
Families Citing this family (80)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6465373B1 (en) * | 2000-08-31 | 2002-10-15 | Micron Technology, Inc. | Ultra thin TCS (SiCl4) cell nitride for DRAM capacitor with DCS (SiH2Cl2) interface seeding layer |
| JP3753994B2 (ja) * | 2002-03-11 | 2006-03-08 | 松下電器産業株式会社 | 半導体装置の製造方法 |
| KR100474850B1 (ko) * | 2002-11-15 | 2005-03-11 | 삼성전자주식회사 | 수직 채널을 가지는 비휘발성 sonos 메모리 및 그 제조방법 |
| US6943126B1 (en) * | 2002-12-06 | 2005-09-13 | Cypress Semiconductor Corporation | Deuterium incorporated nitride |
| US6861320B1 (en) * | 2003-04-04 | 2005-03-01 | Silicon Wafer Technologies, Inc. | Method of making starting material for chip fabrication comprising a buried silicon nitride layer |
| US6765254B1 (en) * | 2003-06-12 | 2004-07-20 | Advanced Micro Devices, Inc. | Structure and method for preventing UV radiation damage and increasing data retention in memory cells |
| JP4186725B2 (ja) * | 2003-06-24 | 2008-11-26 | トヨタ自動車株式会社 | 光電変換素子 |
| US6881636B2 (en) * | 2003-07-03 | 2005-04-19 | Micron Technology, Inc. | Methods of forming deuterated silicon nitride-containing materials |
| JP2005050917A (ja) * | 2003-07-30 | 2005-02-24 | Toshiba Corp | 半導体装置及びその製造方法 |
| JP2005064317A (ja) * | 2003-08-18 | 2005-03-10 | Semiconductor Leading Edge Technologies Inc | 半導体装置 |
| US7256087B1 (en) * | 2003-12-22 | 2007-08-14 | Cypress Semiconductor Corporation | Techniques for improving negative bias temperature instability (NBTI) lifetime of field effect transistors |
| JP2005294791A (ja) * | 2004-03-09 | 2005-10-20 | Nec Corp | 不揮発性メモリ及び不揮発性メモリの製造方法 |
| JP4296128B2 (ja) | 2004-06-23 | 2009-07-15 | 株式会社東芝 | 不揮発性半導体メモリ装置及びその製造方法 |
| JP4951861B2 (ja) * | 2004-09-29 | 2012-06-13 | ソニー株式会社 | 不揮発性メモリデバイスおよびその製造方法 |
| US20060113586A1 (en) * | 2004-11-29 | 2006-06-01 | Macronix International Co., Ltd. | Charge trapping dielectric structure for non-volatile memory |
| JP2006196643A (ja) * | 2005-01-13 | 2006-07-27 | Renesas Technology Corp | 不揮発性半導体記憶装置 |
| JP2006253311A (ja) * | 2005-03-09 | 2006-09-21 | Toshiba Corp | 半導体装置及びその製造方法 |
| JP2006318985A (ja) * | 2005-05-10 | 2006-11-24 | Sharp Corp | 半導体記憶装置 |
| JP4259528B2 (ja) * | 2005-05-26 | 2009-04-30 | セイコーエプソン株式会社 | 電気光学装置及びこれを備えた電子機器 |
| KR100766229B1 (ko) * | 2005-05-30 | 2007-10-10 | 주식회사 하이닉스반도체 | 플래시 메모리 소자의 제조 방법 |
| US7858458B2 (en) * | 2005-06-14 | 2010-12-28 | Micron Technology, Inc. | CMOS fabrication |
| KR100669089B1 (ko) * | 2005-07-11 | 2007-01-16 | 삼성전자주식회사 | 게이트 구조물, 이를 갖는 소노스 타입의 비휘발성 메모리장치 및 그 제조 방법 |
| US8063655B2 (en) * | 2005-07-19 | 2011-11-22 | Cypress Semiconductor Corporation | Method and circuit for reducing degradation in a regulated circuit |
| JP4897948B2 (ja) * | 2005-09-02 | 2012-03-14 | 古河電気工業株式会社 | 半導体素子 |
| JP5234301B2 (ja) | 2005-10-03 | 2013-07-10 | Nltテクノロジー株式会社 | 薄膜トランジスタ、薄膜トランジスタアレイ基板、液晶表示装置およびそれらの製造方法 |
| JP4781806B2 (ja) * | 2005-12-20 | 2011-09-28 | シャープ株式会社 | 半導体記憶装置およびその製造方法 |
| US8803216B2 (en) * | 2006-03-20 | 2014-08-12 | Spansion, Llc | Memory cell system using silicon-rich nitride |
| JP4965878B2 (ja) * | 2006-03-24 | 2012-07-04 | 株式会社東芝 | 不揮発性半導体メモリ装置 |
| JP2007311695A (ja) * | 2006-05-22 | 2007-11-29 | Renesas Technology Corp | 半導体装置の製造方法 |
| JP4936790B2 (ja) * | 2006-05-22 | 2012-05-23 | 株式会社東芝 | 半導体装置 |
| TWI431726B (zh) * | 2006-06-01 | 2014-03-21 | Semiconductor Energy Lab | 非揮發性半導體記憶體裝置 |
| KR100733055B1 (ko) * | 2006-07-10 | 2007-06-28 | 삼성전자주식회사 | 전하 트랩형 비휘발성 메모리 장치 및 그 제조 방법 |
| US7910420B1 (en) * | 2006-07-13 | 2011-03-22 | National Semiconductor Corporation | System and method for improving CMOS compatible non volatile memory retention reliability |
| US8587049B2 (en) * | 2006-07-17 | 2013-11-19 | Spansion, Llc | Memory cell system with charge trap |
| US8809936B2 (en) * | 2006-07-31 | 2014-08-19 | Globalfoundries Inc. | Memory cell system with multiple nitride layers |
| US20080032464A1 (en) * | 2006-08-02 | 2008-02-07 | Spansion Llc | Memory cell system with nitride charge isolation |
| JP2008078376A (ja) | 2006-09-21 | 2008-04-03 | Oki Electric Ind Co Ltd | 半導体記憶装置 |
| KR100757324B1 (ko) * | 2006-10-10 | 2007-09-11 | 삼성전자주식회사 | 불휘발성 메모리 장치의 제조 방법 |
| KR101005638B1 (ko) * | 2006-12-04 | 2011-01-05 | 주식회사 하이닉스반도체 | 반도체 메모리 소자 및 제조방법 |
| KR100786707B1 (ko) * | 2006-12-21 | 2007-12-18 | 삼성전자주식회사 | 불휘발성 메모리 장치 및 이의 제조 방법 |
| US20080150005A1 (en) * | 2006-12-21 | 2008-06-26 | Spansion Llc | Memory system with depletion gate |
| US7687360B2 (en) * | 2006-12-22 | 2010-03-30 | Spansion Llc | Method of forming spaced-apart charge trapping stacks |
| JP2008166518A (ja) * | 2006-12-28 | 2008-07-17 | Toshiba Corp | 不揮発性半導体記憶装置 |
| KR100807220B1 (ko) * | 2007-02-01 | 2008-02-28 | 삼성전자주식회사 | 불휘발성 메모리 장치의 제조 방법 |
| JP5186776B2 (ja) * | 2007-02-22 | 2013-04-24 | 富士通株式会社 | 半導体装置及びその製造方法 |
| JP4687671B2 (ja) * | 2007-03-16 | 2011-05-25 | セイコーエプソン株式会社 | 半導体装置の製造方法 |
| KR101402102B1 (ko) * | 2007-03-23 | 2014-05-30 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 반도체장치의 제작 방법 |
| US8680601B2 (en) * | 2007-05-25 | 2014-03-25 | Cypress Semiconductor Corporation | Nonvolatile charge trap memory device having a deuterated layer in a multi-layer charge-trapping region |
| US20090179253A1 (en) | 2007-05-25 | 2009-07-16 | Cypress Semiconductor Corporation | Oxide-nitride-oxide stack having multiple oxynitride layers |
| US9716153B2 (en) | 2007-05-25 | 2017-07-25 | Cypress Semiconductor Corporation | Nonvolatile charge trap memory device having a deuterated layer in a multi-layer charge-trapping region |
| US8633537B2 (en) | 2007-05-25 | 2014-01-21 | Cypress Semiconductor Corporation | Memory transistor with multiple charge storing layers and a high work function gate electrode |
| US8940645B2 (en) | 2007-05-25 | 2015-01-27 | Cypress Semiconductor Corporation | Radical oxidation process for fabricating a nonvolatile charge trap memory device |
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- 2003-05-28 KR KR1020030034051A patent/KR100555810B1/ko not_active Expired - Fee Related
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2005
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| US8022465B2 (en) | 2005-11-15 | 2011-09-20 | Macronrix International Co., Ltd. | Low hydrogen concentration charge-trapping layer structures for non-volatile memory |
| US8026136B2 (en) | 2005-11-15 | 2011-09-27 | Macronix International Co., Ltd. | Methods of forming low hydrogen concentration charge-trapping layer structures for non-volatile memory |
| US7588883B2 (en) | 2006-05-09 | 2009-09-15 | United Microelectronics Corp. | Method for forming a gate and etching a conductive layer |
| TWI770857B (zh) * | 2020-09-22 | 2022-07-11 | 南亞科技股份有限公司 | 製造半導體裝置的方法 |
| US11456177B2 (en) | 2020-09-22 | 2022-09-27 | Nanya Technology Corporation | Method of manufacturing semiconductor device |
Also Published As
| Publication number | Publication date |
|---|---|
| KR100555811B1 (ko) | 2006-03-03 |
| CN1463045A (zh) | 2003-12-24 |
| CN1316629C (zh) | 2007-05-16 |
| US7372113B2 (en) | 2008-05-13 |
| US20040251521A1 (en) | 2004-12-16 |
| US20030222318A1 (en) | 2003-12-04 |
| KR100555810B1 (ko) | 2006-03-03 |
| US6774462B2 (en) | 2004-08-10 |
| KR20050037547A (ko) | 2005-04-22 |
| US20070215958A1 (en) | 2007-09-20 |
| KR100555812B1 (ko) | 2006-03-03 |
| KR20030093122A (ko) | 2003-12-06 |
| JP3637332B2 (ja) | 2005-04-13 |
| JP2003347543A (ja) | 2003-12-05 |
| KR20050037546A (ko) | 2005-04-22 |
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