TW483054B - A method of forming silicon containing thin films by atomic layer deposition utilizing Si2Cl6 and NH3 - Google Patents

A method of forming silicon containing thin films by atomic layer deposition utilizing Si2Cl6 and NH3 Download PDF

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TW483054B
TW483054B TW090111293A TW90111293A TW483054B TW 483054 B TW483054 B TW 483054B TW 090111293 A TW090111293 A TW 090111293A TW 90111293 A TW90111293 A TW 90111293A TW 483054 B TW483054 B TW 483054B
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Yeong-Kwan Kim
Young-Wook Park
Joo-Won Lee
Dong-Chan Kim
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Samsung Electronics Co Ltd
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    • H01L21/02211—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound being a silane, e.g. disilane, methylsilane or chlorosilane
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Description

五、發明說明（1) 1、發明背景 本發明有關以原子層沉穑 明確的說，本發明包含使用=用（ALD)形成薄膜。更 WD)與NH3，或是HCD盘NH原將子層沉積法，並使用叫仏 膜。 / %電漿作為反應物，形成Si3N4薄 在半導體裝置製造方法Φ ▲ ^ owc*n w^aac*m 中’變得S i3 N4薄膜愈形重要。在 S1 / S1 02界面的S 13 N4獏合降細田 ^ . ς. Μ ^ '曰~低界面陷阱，並改善熱載體抗 擾性。S13 Ν4膜改善習用s · η „ t 。.rw π # a + λλ。.、 〇2閘氧化物的可靠性與性能。
Si02 /閘界面處的Si3N4膜传从& < μ I孤认w从於π 作為優良擴散障礙，值得注意 W古人帝^u、卜丨 导域在超薄膜裝置中，S i3N4可以提 供面>M笔$數材料，复2-»- ^ 批一认c. n mc· μ u /、 抗電子隧道效應。亦證實介電常 數咼於Si02的Si3N4非當搞1 ^ ^ ^ ^ ^ -r 15 ^ ;作為DR AM與其他裝置上覆蓋高 度縱k比部件之順應锅缕恩 一 π々古本 Γ表層。此等應用需要一種形成Sl3N4 溥腰之方法，該s 1彳兄a肢親一， #胃#、# ；#、/# 顯不出有關生長率、熱預算、圖 性等良好特徵。 1勺度以及對於高縱橫比部件的一致 可以使用化學洛氣沉穑r「ν η、 、+膝Μ 積UVD)、低壓化學蒸氣沉積 (LPCVD)、電漿強化化學蒗s ^ … ., ρπΑ 予条虱九積（PECVD)等沉積方法製備 S“N4薄膜。以CVD為基璣古、也z ^ ^ 楚方去緩常具有其於製造半導體裝 ..^ . 缺^ 其中此等半導體裝置係因包括 Si3N4薄膜而付到盈處。右一絲, iC.M .. _ 在種代表性CVD方法中，以相當 高溫沉積S 1 N溥胰，因為斟 化巧卞、 對於该裝置有不良熱效應可能性 之故，在較低〉皿下進杆·; g + > r
^ y _ b 丁 ^吊較不佳。亦對以CVD沉積之Si N 層進行幾何卩早破’造成兮驻罢+ 战3衣置表面的厚度變化。沿著該表 483054 五、發明說明（2) 面上緻密集中之部件所形成薄膜厚度可能比沿著較不緻窟 集中之部件所形成薄膜厚度還薄。此問題習知為圖型負載 效應。 LPCVD也會遇到許多缺點。該Lpcvl)所製造之薄膜的氫含 量通常很高，而且該表面的步驟覆蓋不良。因為使用 LPCVD時’該膜生長率相對較低，生長適當厚度所需之進 行時間相對較長。進行時間長會使該基板長時間曝於相對 較高溫’並造成與LPCVD法伴隨發生之高熱預算。 已提出原子層沉積法（ALD)代替以CVD為基礎沉積法，用 以形成S i N薄膜。A LD係一種表面控制方法，其以一種表面 動力方式進行，而且其在該表面上形成二維逐層沉積。 Goto等人描述一種ALD沉積法，其使用二氯矽烷（DCS)與 NH3 電漿，形成Si3N4 膜。（Appl. Surf. Sci.， 112， 75-81 (1997); Appl· Phys· Lett· 68(23)， 3257-9(1996))。 不過，以Goto中所述之方法製得的薄膜性質並不適用。該 C 1含量（0 · 5 % )與〇含量高得無法接受。此等情況結合測得 之Si : N比為4 1 : 37，表示該方法不會形成si3N4的近化學計 量膜。此外’每3 0 0秒循環〇 · 9 1埃之生長率不如工業應用 所需之生長率高。
Klaus等人描述一種藉由反應SiCl4與麗3形成Si3N4膜之 ，ALD方法。詳見美國專利6, 〇9〇, 442與Surf · Sci · 418， L14-L1 9 ( 1 9 9 8 )。以此種方法製得之薄膜特徵優於以G〇t〇 專人所付到之薄膜特徵。S丨：n之比率=1 : 1 · 3 9，而C 1、Η與 0之含量低得可接受。不過，1〇分鐘生長2· 45埃膜之循環
483054 五、發明說明（3) 太長，無法實際用在工業應用上。 - 亦已提出藉由ALD，使用Si2Cl6(HCD)與N2H4沉積Si3N4薄 膜。（Appl. Surf · Sci·，112， 1 98 -2 0 3 ( 1 9 9 7 ))。當此 等膜之化學計量、C 1與Η含量適當時，其顯示高得無法被 接受氧含量，使此等膜不適於上述用途。 因此，雖然長久以來已知可能用於廣泛應用，不過仍然 需要一種符合下列標準之形成S i3 Ν4膜的新穎方法：低熱預 算方法；優良步驟覆蓋率；無圖型負載效應；S i : Ν比率與 S i3 N4 —致；優良厚度控制與均勻度；包含之微粒子數最/ 少；低雜質含量；以及能符合實際工業應用的膜生長率。 發明總論 因此，本發明目的係提出一種形成S i3 N4膜之方法，其中 該Si3N4包括與高純度Si3N4 —致之物理與化學性質。本發明 其他目的提出一種將Si3N4沉積成薄膜之方法，其中該方法 展現優良之步驟覆蓋率，圖型負載效應很小或者沒有，以 及優良厚度控制與均勻度。本發明另外目的係提出一種將 Si3N4沉積為薄膜或是其他固體形·式之方法，其中該方法表 示出相當低熱預算與可接受之高生長率，使該方法可以實 際用於工業應周。 為了完成上述各項，本發明具體呈現一種使用S i 2 C 16與 N H3或是S i 2 C 16與經活化N H3作為反應物之原子層沉積法 (ALD) 〇 在一實例中，本發明包括步驟：a )將一片基板放置於一 個室中，b)將包含Si2Cl6之第一反應物注入該室中，c)將
483054 五、發明說明（4) 第一反應物的第一部份化學吸附在該基板上，並將第一及 應物的第二部份物理吸附在該基板上，d )自該室去除第一 反應物之未經化學吸附部份，e)將包括NH3的第二反應物 注入該室，f )使第二反應物的第一部份與第一反應物的經 化學吸附第一部份化學反應，在該基板上形成含矽固體， 以及g )自該室去除第二反應物之未反應部份。在本發明其 他實例中，步驟b中，該第一反應物包含兩種以上化合 物，各包含Si與C1。在其較佳實例中，這兩種含Si與C1之 化合物係Si2Cl6與3丨(：14。本發明其他實例中，重複步驟 b -g —次以上，以增加該層厚度。 本發明另外實例中，該方法包括步驟a)將一片基板放置 於一個室中，b)將包含S i2Cl6之第一反應物注入該室中， c)於該第一反應物注入該室同時，將S i C 14添加於第一反 應物物流中，d)將第一反應物的第一部份化學吸附在該基 板上，並將第一反應物的第二部份物理吸附在該基板上， e )將該S i C 14的第一部份化學吸附在該基板上，並將該 S i C 14的第二部份物理吸附在該基板上，f)自該室去除 Si2Cl6與31(：14的未經化學吸附部份，g)將包括NH3的第二反 應物注入該室，h)使第二反應物的第一部份與該S i2 C 16的 化學吸附第一部份以及S i C14的化學吸附第一部份化學反 應，在該基板上形成含矽固體；以及i)自該室去除第二反 應物的第二部份。在其他實例中，重複步驟b- i —次以 上。現在茲將參考下列圖式與詳細說明，更詳實的解釋本 發明此等與其他特性。
483054 五、發明說明（5) 圖式簡述 — 藉由本發明較佳實例詳細說明以及其中所附之圖式，可 以更明白本發明上述目的與優點。 圖1至圖5說明使用本發明原子層沉積作用形成S i3 N4薄膜 之方法的步驟。 圖6係一種本發明薄膜製造方法所使用之薄膜製造裝置 的略圖。 圖7係說明本發明薄膜製造方法的流程圖。 圖8係顯示使用本發明一較佳實例之製造方法，每個循 環所形成之Si3N4膜厚度的圖表。 圖9係顯示使用本發明第二較佳實例之製造方法，每個 循環所形成之S i 3 N4膜厚度的圖表。 較佳實例詳細說明 下列較佳實例說明係先解釋該方法處理步驟，然後說明 本發明較佳實例的特定實例。 現在茲參考圖卜5，將基板1諸如矽（1 0 0 )置於一個室 3 (詳見圖6 )，然後將該室3之壓力抽空到約2托耳之壓力。 將基板1加熱至約5 5 0 °C。然後將5 0 0 seem在Ar承載氣體中 之Si2Cl6氣流2導入該室30秒。在本發明之另一實例中，包 含Si2Cl6之氣流也包含SiCl4。在另一實例中，將包含 Si2Cl6氣流導入室3，同時保持此氣流，包括Si Cl4的氣流 係於導入室3之前與含S i 2 C 1 δ氣流混合，或是分別但與該含 Si2Cl6氣流同時導入。 此期間，將該Si2Cl6分子的第一部份（與該SiCl4分子，
第10頁 五、發明說明（6) 的話）化學吸附在基板1表面上，並形成層p 、以ShCi6分子的第二部份（與該Sic丨丨分子，若存在31(：14 的^物，吸附在其上’ i鬆鬆的固MW與該 二4右存在Si C14的話）之化學吸附層。然後，以n2沖洗 至3約5秒，並真空沖洗5秒。在沖洗步驟期間，自該室去 ，812(：16與3丨（：14的未經化學吸附部份，留下在基板1上之 元整無缺的Si/l6(與該SiCl4，若存在SiCi4的話）化學吸附 層（圖2 )。現在茲參考圖3 ,然後將2 0 0 0 seem的NH3氣流Θ 導入室3約30秒，同時保持室壓為2托耳，以及基板溫度 5 5 0 C。該NH3部份與基板上之化學吸附μα反應，形成
SiA層8(圖4)。在一實例中，導入之叫係夾帶在紅承载 =。在可替代實例中，該nh3夾帶在-種於遠 帝ΐ Γ斗叫态中產生之電漿的Ar氣流中。在一實例中，該 ;不：=約4°〇瓦操作，但是可以改變該功率，而且 尽發明不希望受限於特定雷將— | 流入該室30秒之後，以Ν2沖電先準：該含叫氣流 秒。可以重複將Si/l6 (與Sici )墓、t，然後真空沖洗5 入該室，以及再次沖洗等、半4入至3、沖洗、將NHS導 厚度。現在已形成Si3N4|8 ’達到任何所需之叫\層8 圖6係本發明薄膜製造9方 圖。圖7係說明本發明薄膜使用之薄膜製造裝置的略 1 (例如一片（1 0 0 )矽美k λ4造方法的流程圖。將基板 至約2托耳，並使用加熱哭$八至0之後，使該室的壓力降 含Si/le之第一氣流沉積=加熱至約55〇°C(步驟1〇〇)。將 積至3約30秒，同時使該基板保持 483054 五、發明說明（7) 550 C與2托耳（步驟1Q5)。自來源19將500 seem之Ar承載 氣體沉積第一起泡器1 2 (其包含溫度約4 0 °C之液態 Si2Cl6)，蒸發該Si2Cl6，形成第一反應物物流6。然後，如 上述，經由第一氣體管線丨3與喷頭i 5，將混合的S i2 C 16與 Ar氣流注入室3約3 0秒。然後，以純Ar沖洗5秒，然後以泵 7真空沖洗5秒。本發明並不希望受限於這種特定沖洗計 劃，而希望包括其他沖洗順序，以去除S i2 c 16化學吸附表 層上之物理吸附Si2Cl6。 然後’以約2 0 0 〇 s c c m速率，經由氣體管線1 6與喷頭J 5 注入室（3 )於A r載劑中之N H3氣流約3 0秒。此步驟期間，基 板1保持5 5 0 C ’而且該室壓力保持約2托耳（圖7中之步驟 11 5 ) °在一實例中，藉由在第二起泡器丨7中，自氣體來源 1 9使Ar起泡通過保持約2 5 °C液態NH3 1 4，蒸發該第二反應 物氣流中之NH3 °在另一較佳實例中，將受載於Ar氣流中 之電漿形式的N Hs注入室3。該N Hs電漿係在一個遠距電漿產 生器（未顯示出來）中產生’然後經由氣體管線1 6與喷豆貝 1 5，以約2 0 0 0 s c c m速率導入室3約3 〇秒。 如圖3與4所述，將第二反應物物流之nh3部份與化學吸 附在基板1上之Si'l6(與某些實例中之SiCi4)反應，形成 一層S is叱。在基板上形成該層SI3 \時，將第二反應物物流 中之NHS第二部份物理吸附於該Shi層。然後使用一種八/1 氣流沖洗室3約5秒，然後使用泵7真空沖洗（步驟12〇)。不 過，亦可藉由真空泵抽該室而且不必以惰性氣體第一次沖 洗該室，去除.該物理吸附第二反應物。
483054
五、發明說明（8) 自室3沖洗該未反應NH3之後，測量S i3 N4膜厚度（步驟 — 125) °若需要額外層厚度，重複步驟105至125，直到獲得 戶斤需膜厚度為止。當到達所需厚度時，將該室溫度與壓力 恢復正常，即完成該製造方法。（步驟1 3 0 )。 現在茲參考下列實施例說明較佳實例。希望下列實施例 係作為本發明較佳實例範例，而非限制。 實施例1 將一片矽晶圓置於標準設計的沉積室中。以氮沖洗該 室’然後抽空至2托耳。將該基板加熱至55 0 °C，並於該溫 度下安定化。藉由起泡5 0 0 seem的Ar通過40 °C液態 S i2 C 16 ’產生第一反應物物流，然後導入該室3 0秒。然後 以N2沖洗該室5秒，並真空沖洗5秒。然後，藉由起泡2 0 0 〇 seem的Ar通過25 °C液態NH3，產生第二反應物物流。然後 將該第二反應物物流導入該室3 0秒，再次使室壓保持2托 耳，基板溫度為5 5 0 °C。然後以N2沖洗該室5秒，並真空沖 洗5秒。 由前述步驟發現，以每個循環2. 6 8埃之速率形成SIN 膜。已發現該S“N4具有非常高品質。於波長6 3 2· 8毫微米 下之折射指數為2 · 0，表示該沉積層為化學計量S i3 N4。所 測得的抗張應力很高，為5 E 1 0達因/ c m2。以此種方法沉積 之S “ N4顯示出與純S “叱相當之s i : N比率，而且污染水準非 常低。氫含量非常低，而且未偵測到氧。在縱橫比為5 : 1 之結構中，步驟覆蓋率為98%或以上，而且該膜顯示約5% 或以下之圖型負載效應.。在此實施例中，對其他矽晶圓進
483054 五、發明說明（9) 行與上述相同之重複循環。參考圖8，已發現S i 3 N4膜之厍 度與循環次數產生線性關係。因此實施例1證實本發明此 實例以每個循環約2· 68埃之速率形成高純度Si3N4層。Si3N4 層之生成作用係於5 5 0 °C之較低溫，以及少於約9 0秒之較 短循環時間發生。 實施例之 在實施例2中，大部份處理條件與實施例1相同。實施例 2與實施例1不同之處在於第二反應物包括一種於Ar承載氣 體中之NH3。再次將矽晶圓置於標準設計的沉積室中。以 氮沖洗該室，然後抽空至2托耳。將該基板加熱至5 5 0 °C， 並安定化。以實施例1所述之方式產生包含於Ar承載氣體 中之S i 2 C 16的第一反應物物流。將5 〇 〇 s c c m流速之第一反 應物氣體導入該室3 0秒。然後以n2沖洗該室5秒，並真空 沖洗5秒。將一種於Ar承載氣體中之龍3氣流導入一個電漿 室，產生於Ar載劑中之NH3電漿第二反應物物流。於40 0瓦 操作該電漿室。然後將流速於2 0 0 0sccm的NH3電漿/Ar混合 物導入該室3 0秒。然後以N2沖洗該室5秒，並真空沖洗5 秒。
已發現前述方法係以每個循環2 · 5 1埃之速率形成S i3 N4 膜，循環時間少於90秒。已發現該Si3N4具有非常高品質。 於波長6 3 2 · 8毫微米下之折射指數為1 · 9 5，表示該沉積層 為化學計量S “ 。於下所測得的抗張應力很高，為7 E1 〇達 因/cm2。該氫含量少於3%，而且未偵測到氧。如實施例1 之情況’在縱橫比為5 : 1之結構中，步驟覆蓋率為9 8%或以
483054 五、發明說明（10) 上’而且該圖型負載效應為5%或以下，相當良好。在此實 施例中’對其他矽晶圓進行與上述相同之重複循環。參考 圖9 ’已發現S i3 膜之厚度與循環次數產生線性關係。 實施例3 貫施例3中’除了該基板溫度降低至4 〇 〇 °c之外，該方法 與貫施例2相同。已發現實施例3之方法以每個循環1. 2 3埃 之速率形成Si3N4膜，循環時間少於90秒。已發現該Si3N4亦 具有非常高品質。於波長6 3 2 · 8毫微米下之折射指數為 1· 95 ’表示該沉積層為化學計量。於下所測得的抗張 應力很南’為7E10達因/cm2。該氫含量少於3%，而且未偵 測到氧。不過，實施例3證實S i3 \膜之生長速率具有高度 溫度依存度，在4〇〇 °C溫度下時，該膜生長速率約為55(}艺 下之生長速率的一半。4 〇 〇 °C之較低溫度亦會導致該s i3 N4 膜中的氫含量較高。 實施例4
—將一片石夕晶圓置於標準設計的沉積室中。以氮沖洗該 主然後抽空至2托耳。將該基板加熱至5 5 0 °C，並於該溫 度下安定化。藉由起泡起5〇〇 sccm的紅通過4〇。〇液態 Si/i。6，產生第一反應物物流。藉由起泡5〇Q sccm的Ar通 過20 t液態SiCl4，產生含Si與Cl之另外物流。然後將此 等物流同時導入該室30秒，然後中止這兩種物流。然後以 乂沖洗遠室5秒，並真空沖洗5秒。然後，藉由起泡2 〇 〇 〇 sc⑽的Ar通過25。(：液態NH3，產生第二反應物物流。然後 將5亥苐一反應物物流導入該室3 0秒，再次使室壓保持2托
第15頁 483054 五、發明說明（11) 耳’基板溫度為5 5 0 °C。然後以I沖洗該室5秒，並真空沖 洗5秒。
由前述步驟發現，以每個循環2 · 7 2埃之速率形成S i3 N4 膜。已發現該S i3叱具有非常高品質。於波長6 3 2 · 8毫微米 下之折射指數為2 · 0 1，表示該沉積層為化學計量s i 3 n4。以 此種方法沉積之SisN4顯示出與純SisN4相當之si : N比率，而 且污染水準非常低。氫含量< 1 %，而且未偵測到氧。在縱 檢比為5 : 1之結構中，步驟覆蓋率為9 8 %或以上，而且該膜 顯示5%或以下之圖型負載效應。因此，實施例4證實本發、 明此實例以每個循環約2 · 72埃之速率形成高純度s i3 N4層。 該s丨3 Μ*層係於5 5 0 °C之較低溫，以及少於約9 〇秒之較短循 % k間中形成。此實施例中，對其他矽晶圓進行與上述相 同之重複循環。已發現S i3N4膜之厚度與循環次數產生線性 關係。 實施例5
一將一片矽晶圓置於標準設計的沉積室中。以氮沖洗該 至然後抽空至2托耳。將該基板加熱至5 5 0 °C，並於該溫 度下女定化。藉由起泡5 0 0 s c c m的A r通過4 0。(：液態 ^2^1。6’產生第一反應物物流。藉由起泡50〇3〇(：111的人1"通 ^ j C液態SiCl4，產生含Si與01之另外物流。然後將此 Μ寺&、、Γ\同時導入該室3 〇秒，然後中止這兩種物流。然後以 i 66二忒至5移，並真空沖洗5秒。—在一 AΓ載體中之Ν Η3電 二雷將Γ反應物物流藉由導入—Ar載體氣體中之ΗΝ3氣流至 ”孟至中。使用以40 0瓦操作之電漿產生器產生該Nh電
第16頁 483054 ___ 五、發明說明（12) ------ 漿然後將机速於20 0 0 seem的NH3電疲/Ar混合物導入 室3〇秒。錢以N2沖洗該室5秒，之後真空沖洗5^入该、 .已^見藉由剐述步驟，以每個循環2 · 5 4埃之速率开彡士 Si3N4膜。已發現該具有非常高口口口冑。於波長 微米下之折射指數為1.96，表示該沉積層為化學計量8笔 ShN4。以此種方法沉積之以3叱顯示出與純Si^相去二 N比率。該氫含量<2· 5%，而且未價測到氧。在縱^ 1 :· 1之結構中’、步驟覆蓋率為98%或以上，而且該膜顯示出囝 型負載效應為5 %或以下。在此實施例中，對其他矽曰θ 行與上述相同之重複循環。已發現31汍膜之厚度與==^ 數產生線性關係。因此，實施例6證實本發明實例以^人 循環約2· 54。埃之速率形成高純度層。以3化層之生成作 用係於5 5 0 °C之較低溫，以及少於約9 〇秒之較短循環 發生。 、 實施例β
將一片石夕晶圓置於標準設計的沉積室中。以氮沖洗該 室，然後抽空至2托耳。將該基板加熱至5 5 〇艺，並於該溫 度下安定化。藉由起泡5 0 〇 s c c m的A r通過4 0 °C液態 S is C I ’產生第一反應物物流。藉由起泡5 〇 ◦ s c c ^的a r通 過20 C液悲Si Cl4，產生含Si與Cl之另外物流。然後將該 含Si，le物流導入該室30秒。該含Si2Ci6物流開始流入該室 1 5秒之後，將含S i C I*物流導入該室丨5秒，此段時間當 中’該含S I? C le物流與該含s i C 14物流同時流入該室，然後 停止各種物流。然後以A沖洗該室5秒，並真空沖洗5秒。
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五、發明說明（13) 然後’藉由起泡2 〇 〇 〇 s c c m的A r通過2 5 °C液態N H3，產生第 二反應物物流。然後將該第二反應物物流導入該室3 〇秒， 再次使室壓保持2托耳，基板溫度為5 5 0 t。然後% 該室5秒，並真空沖洗5秒。 2
由前述步驟發現，以每個循環2 . 7 〇埃之速率形成s、N 膜。已發現該Si^具有非常高品質。於波長6 32· 8毫米 下之折射指數為2· 〇〇，表示該沉積層為化學計量/以 此種方法沉積之SiA顯示出與純SiA相當之Si:N比3率\而 且=染水準非常低。氫含量非常低，其<1%，而且未偵測 到氧。在縱橫比為5:1之結構中，步驟覆蓋率為98%或以 上，而且該膜顯示5%或以下之圖型負載效應。此實施例 中’對其他石夕晶圓進行與上述相同之重複循環。已發現 Si^4膜之厚度與循環次數產生線性關係。因此，實ς例6 證實本發明此實例以每個循環約2· 7〇埃之速率形成高純度 SiA層。該Si，4層係於5 5 0。(：之較低溫，以及少於約9〇秒 之較短循環時間中形成。 實施例7 71夸片石夕曰曰圓置於標準設計的沉積室中。以氮沖洗該 至然後抽二至2托耳。將該基板加熱至5 5 〇 °C，並於該溫 度下女定化。藉由起泡5 0 0 s c c m的A r通過4 0 °C液態 SisC I〗’產生第—反應物物流。藉由起泡5〇〇 sccin的紅通 =20 C液態SiCl4，產生含si與C1之另外物流。然後將該 含ShCle物流導入該室3〇秒。該含μ/%物流開始流入該室 1 5秒之後’將含c 14物流導入該室1 5秒，此段時間當
483054 五、發明說明（14) 中，該含S i2 C 1 β物流與該含S i C 14物流同時流入該室，然後 停止各種物流。然後以N2沖洗該室5秒，並真空沖洗5秒。 將在Ar承載氣體之NH3電聚導入一個電漿室，產生於Ar載 劑中之N Hs電漿之第二反應物物流。該N H3電漿係使用以4 〇 〇 瓦操作之電漿產生器產生。然後將流速於2 〇 〇 〇 s c c m的n h3 電漿/Ar混合物流導入該室3〇秒。然後以％沖洗該室5秒， 之後真空沖洗5秒。 ◦嘴、現 Si3N4 膜。 該沉積層 與純Si3N4 量<2· 5% : 驟覆蓋率 5%或以下 之重複循 係。因此 之速率形 之較低溫 前述實 希望限制 不達背下 有各種修 猎甶刖述步驟，以每個循環2 · 5 3埃之速率形成 於波長6 3 2 · 8毫微米下之折射指數為丨· 9 6，表示 為化學計量Si^。以此種方法沉積之顯示出 相當之Si 比率，而該污染水準非常低。該氫含 ，而且未偵測到氧。在縱橫比為5 :丨之結構中，步 為98%或以上’而且該膜顯示出圖型負載效應為〃 。在此實施例巾，對其他矽晶圓進行與上述相同 壤二已發現S i3 N4膜之厚度與循環次數產生線 丄貫施例7證實本發明實例以每個循環約2.53埃” 成南純度sw層。生成作用係於。c ，以及少於約90秒之較短循環時間笋生。 施例與較佳實例欽述係用以說明4 下列申請專利範圍。熟悉本技藝者將：明：且： 列申請專利範圍之下，前述方 ^ ^ 正。 或夕者可能
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Claims (1)

  1. 483054 六、申請專利範圍 1 · 一種形成含矽之固態薄膜層的原子層沉積法，包括一步 驟： (a) 將一片基板放置於一個室中； (b) 將包含Si2Cl6之第一反應物注入該室中； (c) 將第一反應物的第一部份化學吸附在該基板上， 並將第一反應物的第二部份物理吸附在該基板上； (d) 自該室去除第一反應物之未經化學吸附部份； (e) 將包括NH3的第二反應物注入該室； (f )使第二反應物的第一部份與第一反應物的經化學 吸附第一部份化學反應，在該基板上形成含矽固體；以及 (g )自該室去除第二反應物之未反應部份。 2. 根據申請專利範圍第1項之方法，其中在該基板上形 成的含矽固態包括Si3N4。 3. 根據申請專利範圍第1項之方法，其中該含矽固體包 括Si3N4薄膜。 4. 根據申請專利範圍第1項之方法，其中該含矽固體的 N/Si組份比率介於約卜1. 6，包括1與1. 6。 5. 根據申請專利範圍第1項之方法，其另外包括將該基 板加熱至3 50與7 0 0 °C的步驟。 6. 根據申請專利範圍第1項之方法，其另外包括將該室 加壓至絕對壓力為0 . (H - 1 0 0托耳的步驟。 7. 根據申請專利範圍第1項之方法，其中室壓維持在 0 · (H - 1 0 0托耳之固定絕對壓力。 8. 根據申請專利範圍第1項之方法，其另外包括進行該
    483054
    第22頁 483054 六、申請專利範圍 成之含矽固體包括一半導體裝置之電容器的介電層。 1 8.根據申請專利範圍第1項之方法，其中在該基板上形 成之含矽固體包括一半導體裝置之STI墊片。 19.根據申請專利範圍第1項之方法，其中該含NH3之第 二反應物包括經活化N H3。 2 0.根據申請專利範圍第1項之方法，其中該遠距電漿法 之電漿功率介於約100-3000瓦，包括100瓦與3000瓦。 2 1 ·根據申請專利範圍第1項之原子層沉積法，其另外包 括重複步驟（b) - (g )至少一者之步驟。 2 2. —種形成含矽固態薄膜層之原子層沉積法，包括步 驟： (a) 將一片基板放置於一個室中； (b) 將包含兩種以上化合物之第一反應物注入該室 中，每種化合物均包含Si與C1 ; (c) 將第一反應物的第一部份化學吸附在該基板上， 並將第一反應物的第二部份物理吸附在該基板上； (d) 自該室去除第一反應物之未經化學吸附部份； (e )將包括N H3的第二反應物注入該室； (f )使第二反應物的第一部份與第一反應物的經化學 吸附第一部份化學反應，在該基板上形成含矽固體；以及 (g)自該室去除第二反應物之未反應部份。 2 3.根據申請專利範圍第2 2項之方法，其中在該基板上 形成的含矽固態包括Si3N4。 2 4.根據申請專利範圍第22項之方法，其中該含矽固體
    第23頁 483054 六、申請專利範圍 包括Si3N4薄膜。 25·根據申請專利範圍第22項之方法，其中該含矽固體 的N/Si組份比率介於約丨―丨· 6，包括}與丨· 6。 26·根據申請專利範圍第⑴貝之方法，纟另外包括將該 基板加熱至3 5 0與7 0 0它的步驟。 27.根據申請專利範圍第22項之方法，其另外包括將該 室加壓至絕對壓力為〇. 01-1 00托耳的步驟。 2:=申請專利範圍第22項之方法，其中室壓維持在 0.01 100托耳之固定絕對壓力。 其另外包括進行 其中在該基板上 2 9 ·根據申請專利範圍第2 2項之方法 该步驟至少一者期間改變室壓的步驟。 ,30.根2康申請專利範圍第22項之方法丹m盎低丄 形成之3矽固體對於矽材料具有乾式蝕刻選擇性（活性掩 模氮化物）。 31‘根^申請專利範圍第22項之方法，其中在該基板上 y '之έ夕固對於閘材料具有乾式餘刻選擇性，該閘材 料選自包括WS ix與經摻雜多晶矽（閘掩模氮化物）。 32.根^中請專利範圍第22項之方法，其中在該基板上 形成之3矽固體對於導電材料具有乾式蝕刻選擇性，兮 電材料選自包括（數元線掩模氮化物）。^、 η據申請專利範圍第22項之方法，其中該含 包括一種化學機械性拋光中止層。 4 34·根據申請專利範圍第22項之方法，其中 形成之切固體包括_層對於s i。2具有乾式#刻°選m
    第24頁 483054 六、申請專利範圍 絕緣層（間隔物）。 3 5 ·根據申請專利範圍第2 2項之方法，其中在該基板上 形成之含矽固體包括一層絕緣層，其對於半導體裝置之 S i 02具有含HF溶液濕式蝕刻選擇性（濕式蝕刻中止劑）。 3 6.根據申請專利範圍第2 2項之方法，其中在該基板上 形成之含矽固體包括一半導體裝置之閘介電體。 3 7.根據申請專利範圍第2 2項之方法，其中在該基板上 形成之含矽固體包括一層在一半導體裝置之Ta2 05層與一個 電容器儲存結點之間的層。 3 8.根據申請專利範圍第2 2項之方法，其中在該基板上 形成之含矽固體包括一半導體裝置之電容器的介電層。 3 9.根據申請專利範圍第2 2項之方法，其中在該基板上 形成之含矽固體包括一半導體裝置之STI墊片。 4 0 ·根據申請專利範圍第2 2項之方法，其中該含N H3之第 二反應物包括經活化NH3。 4 1.根據申請專利範圍第2 2項之方法，其中該遠距電漿 法之電漿功率介於約1 0 0 - 3 0 0 0瓦，包括1 0 0瓦與3 0 0 0瓦。 42.根據申請專利範圍第2 1項之原子層沉積法，其另外 包括重複步驟（b)-(f)至少一者。 4 3 · —種形成含矽固態薄膜層之原子層沉積法，包括步 驟： (a) 將一片基板放置於一個室中； (b) 將包含Si2Cl6之第一反應物注入該室中； (c )於該第一反應物注入該室同時，將S i C 14添加於第
    第25頁 483054 六、申請專利範圍 一反應物物流中； (d)將該Si2Cl6與SiCl4的第一部份化學吸附在該基板 上； (e )自該室去除第二反應物的未經化學吸附部份； (f )將包括N H3的第二反應物注入該室； (g) 使第二反應物的第一部份與該Si2Cl6以& SiCi4的 個別化學吸附部份化學反應，在該基板上形成含矽固體； 以及 (h) 自該室去除第二反應物的第二部份。 4 4.根據申請專利範圍第43項之方法，其另外包括重複 步驟（b ) - (h )至少一者之步驟。 4 5 .根據申請專利範圍第4 3項之方法，其中該含N H3之第 二反應物包含經活化NH3。
    第26頁
TW090111293A 2001-05-01 2001-05-11 A method of forming silicon containing thin films by atomic layer deposition utilizing Si2Cl6 and NH3 TW483054B (en)

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CN102047386B (zh) * 2008-06-03 2013-06-19 气体产品与化学公司 含硅薄膜的低温沉积

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US6528430B2 (en) 2003-03-04
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JP3602072B2 (ja) 2004-12-15
JP2002343793A (ja) 2002-11-29
DE10123858B4 (de) 2006-03-23
KR100443085B1 (ko) 2004-08-04
US20020164890A1 (en) 2002-11-07

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