TW297158B - - Google Patents
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- Publication number
- TW297158B TW297158B TW084103673A TW84103673A TW297158B TW 297158 B TW297158 B TW 297158B TW 084103673 A TW084103673 A TW 084103673A TW 84103673 A TW84103673 A TW 84103673A TW 297158 B TW297158 B TW 297158B
- Authority
- TW
- Taiwan
- Prior art keywords
- film
- layer
- integrated circuit
- semiconductor
- mentioned
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B10/00—Static random access memory [SRAM] devices
- H10B10/12—Static random access memory [SRAM] devices comprising a MOSFET load element
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/412—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using field-effect transistors only
- G11C11/4125—Cells incorporating circuit means for protecting against loss of information
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B10/00—Static random access memory [SRAM] devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
- H10D89/10—Integrated device layouts
-
- H10W20/0698—
-
- H10W20/496—
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/412—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using field-effect transistors only
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S257/00—Active solid-state devices, e.g. transistors, solid-state diodes
- Y10S257/903—FET configuration adapted for use as static memory cell
- Y10S257/904—FET configuration adapted for use as static memory cell with passive components,, e.g. polysilicon resistors
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Semiconductor Memories (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11492594A JP3404123B2 (ja) | 1994-05-27 | 1994-05-27 | 半導体集積回路装置 |
| JP15316394A JP3426711B2 (ja) | 1994-07-05 | 1994-07-05 | 半導体集積回路装置およびその製造方法 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| TW297158B true TW297158B (enExample) | 1997-02-01 |
Family
ID=26453568
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW084103673A TW297158B (enExample) | 1994-05-27 | 1995-04-14 |
Country Status (3)
| Country | Link |
|---|---|
| US (16) | US5754467A (enExample) |
| KR (3) | KR100344488B1 (enExample) |
| TW (1) | TW297158B (enExample) |
Families Citing this family (72)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW297158B (enExample) * | 1994-05-27 | 1997-02-01 | Hitachi Ltd | |
| US5739576A (en) * | 1995-10-06 | 1998-04-14 | Micron Technology, Inc. | Integrated chip multilayer decoupling capacitors |
| JPH09260510A (ja) * | 1996-01-17 | 1997-10-03 | Hitachi Ltd | 半導体集積回路装置およびその製造方法 |
| US6150247A (en) * | 1996-03-19 | 2000-11-21 | Vanguard International Semiconductor Corporation | Method for making polycide-to-polycide low contact resistance contacts for interconnections on integrated circuits |
| KR100240883B1 (ko) * | 1997-02-06 | 2000-01-15 | 윤종용 | Cmos sram 장치 |
| JP3064957B2 (ja) * | 1997-05-23 | 2000-07-12 | 日本電気株式会社 | 半導体装置およびその製造方法 |
| US6445049B1 (en) * | 1997-06-30 | 2002-09-03 | Artisan Components, Inc. | Cell based array comprising logic, transfer and drive cells |
| KR100258347B1 (ko) * | 1998-01-20 | 2000-06-01 | 윤종용 | 반도체 장치의 제조 방법 |
| JP4501164B2 (ja) * | 1998-05-01 | 2010-07-14 | ソニー株式会社 | 半導体記憶装置 |
| JP4030198B2 (ja) * | 1998-08-11 | 2008-01-09 | 株式会社ルネサステクノロジ | 半導体集積回路装置の製造方法 |
| JP2001358233A (ja) * | 2000-06-15 | 2001-12-26 | Hitachi Ltd | 半導体集積回路装置および半導体集積回路装置の製造方法 |
| JP2002176112A (ja) * | 2000-12-08 | 2002-06-21 | Mitsubishi Electric Corp | 半導体記憶装置およびその製造方法 |
| JP3526553B2 (ja) * | 2001-01-26 | 2004-05-17 | 松下電器産業株式会社 | Sram装置 |
| WO2002061840A1 (en) * | 2001-01-30 | 2002-08-08 | Hitachi, Ltd. | Semiconductor integrated circuit device and production method therefor |
| US6898110B2 (en) * | 2001-01-31 | 2005-05-24 | Hitachi, Ltd. | Semiconductor integrated circuit device |
| JP4083397B2 (ja) * | 2001-06-18 | 2008-04-30 | 株式会社ルネサステクノロジ | 半導体集積回路装置 |
| DE10142690A1 (de) * | 2001-08-31 | 2003-03-27 | Infineon Technologies Ag | Kontaktierung des Emitterkontakts einer Halbleitervorrichtung |
| JP2003100902A (ja) | 2001-09-21 | 2003-04-04 | Mitsubishi Electric Corp | 半導体装置の製造方法 |
| JP4065694B2 (ja) * | 2002-01-17 | 2008-03-26 | 株式会社ルネサステクノロジ | 半導体記憶装置 |
| JP4173672B2 (ja) * | 2002-03-19 | 2008-10-29 | 株式会社ルネサステクノロジ | 半導体装置及びその製造方法 |
| JP4278338B2 (ja) * | 2002-04-01 | 2009-06-10 | 株式会社ルネサステクノロジ | 半導体記憶装置 |
| US6867131B2 (en) * | 2002-08-29 | 2005-03-15 | Micron Technology, Inc. | Apparatus and method of increasing sram cell capacitance with metal fill |
| US6649456B1 (en) | 2002-10-16 | 2003-11-18 | Taiwan Semiconductor Manufacturing Company | SRAM cell design for soft error rate immunity |
| JP2004253730A (ja) * | 2003-02-21 | 2004-09-09 | Renesas Technology Corp | 半導体集積回路装置およびその製造方法 |
| KR100553682B1 (ko) * | 2003-03-07 | 2006-02-24 | 삼성전자주식회사 | 게이트 전극을 갖는 반도체 소자 및 그 형성방법 |
| US6992916B2 (en) * | 2003-06-13 | 2006-01-31 | Taiwan Semiconductor Manufacturing Co., Ltd. | SRAM cell design with high resistor CMOS gate structure for soft error rate improvement |
| US7486541B2 (en) * | 2003-06-13 | 2009-02-03 | Taiwan Semiconductor Manufacturing Company, Ltd. | Resistive cell structure for reducing soft error rate |
| JP2006127737A (ja) * | 2004-09-30 | 2006-05-18 | Nscore:Kk | 不揮発性メモリ回路 |
| JP2006114681A (ja) * | 2004-10-14 | 2006-04-27 | Nec Electronics Corp | 半導体装置及びその製造方法 |
| KR100575002B1 (ko) * | 2004-12-16 | 2006-05-02 | 삼성전자주식회사 | 공통 게이트를 구비하는 상보형 금속 산화물 반도체 박막트랜지스터, 이를 포함하는 논리소자 및 그 트랜지스터의제조 방법 |
| JP4925601B2 (ja) * | 2005-04-18 | 2012-05-09 | 三菱電機株式会社 | 半導体装置 |
| US7230842B2 (en) * | 2005-09-13 | 2007-06-12 | Intel Corporation | Memory cell having p-type pass device |
| US9035359B2 (en) | 2006-03-09 | 2015-05-19 | Tela Innovations, Inc. | Semiconductor chip including region including linear-shaped conductive structures forming gate electrodes and having electrical connection areas arranged relative to inner region between transistors of different types and associated methods |
| US7763534B2 (en) | 2007-10-26 | 2010-07-27 | Tela Innovations, Inc. | Methods, structures and designs for self-aligning local interconnects used in integrated circuits |
| US9563733B2 (en) | 2009-05-06 | 2017-02-07 | Tela Innovations, Inc. | Cell circuit and layout with linear finfet structures |
| US8839175B2 (en) | 2006-03-09 | 2014-09-16 | Tela Innovations, Inc. | Scalable meta-data objects |
| US8658542B2 (en) | 2006-03-09 | 2014-02-25 | Tela Innovations, Inc. | Coarse grid design methods and structures |
| US9009641B2 (en) | 2006-03-09 | 2015-04-14 | Tela Innovations, Inc. | Circuits with linear finfet structures |
| US8448102B2 (en) | 2006-03-09 | 2013-05-21 | Tela Innovations, Inc. | Optimizing layout of irregular structures in regular layout context |
| US8541879B2 (en) | 2007-12-13 | 2013-09-24 | Tela Innovations, Inc. | Super-self-aligned contacts and method for making the same |
| US7446352B2 (en) | 2006-03-09 | 2008-11-04 | Tela Innovations, Inc. | Dynamic array architecture |
| US8653857B2 (en) | 2006-03-09 | 2014-02-18 | Tela Innovations, Inc. | Circuitry and layouts for XOR and XNOR logic |
| US9230910B2 (en) | 2006-03-09 | 2016-01-05 | Tela Innovations, Inc. | Oversized contacts and vias in layout defined by linearly constrained topology |
| US7956421B2 (en) | 2008-03-13 | 2011-06-07 | Tela Innovations, Inc. | Cross-coupled transistor layouts in restricted gate level layout architecture |
| US20080121982A1 (en) * | 2006-08-17 | 2008-05-29 | Hocine Boubekeur | Semiconductor structure, semiconductor memory device and method of manufacturing the same |
| JP2008130670A (ja) * | 2006-11-17 | 2008-06-05 | Seiko Epson Corp | 半導体装置、論理回路および電子機器 |
| US7888705B2 (en) | 2007-08-02 | 2011-02-15 | Tela Innovations, Inc. | Methods for defining dynamic array section with manufacturing assurance halo and apparatus implementing the same |
| US8667443B2 (en) | 2007-03-05 | 2014-03-04 | Tela Innovations, Inc. | Integrated circuit cell library for multiple patterning |
| US7791109B2 (en) * | 2007-03-29 | 2010-09-07 | International Business Machines Corporation | Metal silicide alloy local interconnect |
| US8188550B2 (en) * | 2007-12-27 | 2012-05-29 | Globalfoundries Singapore Pte. Ltd. | Integrated circuit structure with electrical strap and its method of forming |
| US8453094B2 (en) | 2008-01-31 | 2013-05-28 | Tela Innovations, Inc. | Enforcement of semiconductor structure regularity for localized transistors and interconnect |
| JP5292878B2 (ja) * | 2008-03-26 | 2013-09-18 | 富士通セミコンダクター株式会社 | 半導体装置の製造方法 |
| US7939443B2 (en) | 2008-03-27 | 2011-05-10 | Tela Innovations, Inc. | Methods for multi-wire routing and apparatus implementing same |
| US20100006912A1 (en) * | 2008-07-14 | 2010-01-14 | Honeywell International Inc. | Planar Metal-Insulator-Metal Circuit Element and Method for Planar Integration of Same |
| MY167970A (en) | 2008-07-16 | 2018-10-09 | Tela Innovations Inc | Methods for cell phasing and placement in dynamic array architecture and implementation of the same |
| US9122832B2 (en) | 2008-08-01 | 2015-09-01 | Tela Innovations, Inc. | Methods for controlling microloading variation in semiconductor wafer layout and fabrication |
| JP2010093637A (ja) * | 2008-10-09 | 2010-04-22 | Nec Electronics Corp | 遅延回路 |
| US20100193904A1 (en) * | 2009-01-30 | 2010-08-05 | Watt Jeffrey T | Integrated circuit inductor with doped substrate |
| US8227783B2 (en) | 2009-07-13 | 2012-07-24 | Seagate Technology Llc | Non-volatile resistive sense memory with praseodymium calcium manganese oxide |
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| US9159627B2 (en) | 2010-11-12 | 2015-10-13 | Tela Innovations, Inc. | Methods for linewidth modification and apparatus implementing the same |
| US9490241B2 (en) * | 2011-07-08 | 2016-11-08 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device comprising a first inverter and a second inverter |
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| US8587068B2 (en) * | 2012-01-26 | 2013-11-19 | International Business Machines Corporation | SRAM with hybrid FinFET and planar transistors |
| JP5938277B2 (ja) * | 2012-06-08 | 2016-06-22 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
| US9318174B1 (en) | 2013-03-15 | 2016-04-19 | Gsi Technology, Inc. | Memory systems and methods involving high speed local address circuitry |
| US9953986B2 (en) * | 2013-12-20 | 2018-04-24 | Intel Corporation | Method and apparatus for improving read margin for an SRAM bit-cell |
| US9646681B1 (en) * | 2016-04-25 | 2017-05-09 | Qualcomm Incorporated | Memory cell with improved write margin |
| JP6832776B2 (ja) * | 2017-03-30 | 2021-02-24 | 東京エレクトロン株式会社 | 選択成長方法 |
| RU2668716C2 (ru) * | 2017-10-23 | 2018-10-02 | Общество с ограниченной ответственностью "МЭМС-РЕЗЕРВ" | Сегнетоэлектрический элемент памяти и сумматор |
| US10714486B2 (en) * | 2018-09-13 | 2020-07-14 | Sandisk Technologies Llc | Static random access memory cell employing n-doped PFET gate electrodes and methods of manufacturing the same |
| US11342421B1 (en) | 2021-02-03 | 2022-05-24 | Nanya Technology Corporation | Recessed access device and manufacturing method thereof |
Family Cites Families (37)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS52117063A (en) | 1976-03-29 | 1977-10-01 | Hitachi Ltd | Preparation of ohmic ontact layer in semiconductor device |
| JPS59121868A (ja) | 1982-12-28 | 1984-07-14 | Toshiba Corp | 相補型misスタテイツクメモリセル |
| JPS59121868U (ja) | 1983-02-02 | 1984-08-16 | 株式会社山武 | 電極パタ−ンの連結構造 |
| US5121186A (en) | 1984-06-15 | 1992-06-09 | Hewlett-Packard Company | Integrated circuit device having improved junction connections |
| US4873204A (en) | 1984-06-15 | 1989-10-10 | Hewlett-Packard Company | Method for making silicide interconnection structures for integrated circuit devices |
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| JPS61117794A (ja) * | 1984-11-13 | 1986-06-05 | Fujitsu Ltd | 不揮発性半導体記憶装置 |
| JPS61292951A (ja) * | 1985-06-21 | 1986-12-23 | Hitachi Ltd | 半導体集積回路装置の製法 |
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| JPS6311416A (ja) | 1986-07-03 | 1988-01-18 | Nifco Inc | 自動車の窓ガラス用周縁モ−ル |
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| JPS63114160A (ja) | 1986-10-30 | 1988-05-19 | Nec Corp | 相補型misfet集積回路 |
| JPS63114172U (enExample) | 1987-01-20 | 1988-07-22 | ||
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| FR2650296B1 (fr) | 1989-07-26 | 1991-10-11 | Michelin & Cie | Procede et dispositif pour traiter thermiquement au moins un fil metallique avec des plaques de transfert thermique |
| KR100199258B1 (ko) * | 1990-02-09 | 1999-06-15 | 가나이 쓰도무 | 반도체집적회로장치 |
| FR2658951B1 (fr) | 1990-02-23 | 1992-05-07 | Bonis Maurice | Procede de fabrication d'un circuit integre pour filiere analogique rapide utilisant des lignes d'interconnexions locales en siliciure. |
| JPH04277624A (ja) | 1991-03-06 | 1992-10-02 | Nec Corp | 半導体装置 |
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-
1995
- 1995-04-14 TW TW084103673A patent/TW297158B/zh not_active IP Right Cessation
- 1995-05-25 KR KR1019950013149A patent/KR100344488B1/ko not_active Expired - Lifetime
- 1995-05-25 US US08/451,117 patent/US5754467A/en not_active Expired - Lifetime
-
1997
- 1997-06-23 US US08/880,736 patent/US5946565A/en not_active Expired - Lifetime
-
1999
- 1999-06-16 US US09/334,266 patent/US6211004B1/en not_active Expired - Lifetime
-
2000
- 2000-05-24 KR KR1020000027994A patent/KR100357335B1/ko not_active Expired - Lifetime
-
2001
- 2001-01-08 US US09/755,184 patent/US6548885B2/en not_active Expired - Lifetime
-
2002
- 2002-06-07 KR KR1020020031826A patent/KR100357336B1/ko not_active Expired - Lifetime
- 2002-11-26 US US10/304,045 patent/US6809399B2/en not_active Expired - Fee Related
-
2004
- 2004-06-15 US US10/866,874 patent/US7023071B2/en not_active Expired - Fee Related
- 2004-10-12 US US10/961,090 patent/US7022568B2/en not_active Expired - Fee Related
- 2004-10-25 US US10/971,073 patent/US7049680B2/en not_active Expired - Fee Related
-
2005
- 2005-12-09 US US11/297,500 patent/US7253051B2/en not_active Expired - Fee Related
-
2007
- 2007-06-19 US US11/765,265 patent/US7397123B2/en not_active Expired - Fee Related
- 2007-07-16 US US11/826,491 patent/US7456486B2/en not_active Expired - Fee Related
- 2007-08-06 US US11/834,095 patent/US7511377B2/en not_active Expired - Fee Related
-
2008
- 2008-12-15 US US12/335,302 patent/US7834420B2/en not_active Expired - Fee Related
-
2010
- 2010-09-30 US US12/895,357 patent/US7910427B1/en not_active Expired - Fee Related
-
2011
- 2011-03-09 US US13/044,260 patent/US8093681B2/en not_active Expired - Fee Related
- 2011-03-10 US US13/044,652 patent/US8133780B2/en not_active Expired - Fee Related
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