TW201606954A - 埋設電子零件的樹脂構造體及其製造方法 - Google Patents

埋設電子零件的樹脂構造體及其製造方法 Download PDF

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TW201606954A
TW201606954A TW104111188A TW104111188A TW201606954A TW 201606954 A TW201606954 A TW 201606954A TW 104111188 A TW104111188 A TW 104111188A TW 104111188 A TW104111188 A TW 104111188A TW 201606954 A TW201606954 A TW 201606954A
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exposed
resin
molded body
electrode
electronic component
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TW104111188A
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TWI630686B (zh
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川井若浩
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歐姆龍股份有限公司
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    • H01L23/538Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5389Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates the chips being integrally enclosed by the interconnect and support structures
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    • H05K3/0014Shaping of the substrate, e.g. by moulding
    • BPERFORMING OPERATIONS; TRANSPORTING
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    • H05K2201/09Shape and layout
    • H05K2201/09009Substrate related
    • H05K2201/09118Moulded substrate
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/14Related to the order of processing steps
    • H05K2203/1461Applying or finishing the circuit pattern after another process, e.g. after filling of vias with conductive paste, after making printed resistors
    • H05K2203/1469Circuit made after mounting or encapsulation of the components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/10Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/12Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using thick film techniques, e.g. printing techniques to apply the conductive material or similar techniques for applying conductive paste or ink patterns
    • H05K3/1241Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using thick film techniques, e.g. printing techniques to apply the conductive material or similar techniques for applying conductive paste or ink patterns by ink-jet printing or drawing by dispensing

Abstract

於具備樹脂成形體(5)、及埋設於樹脂成形體(5)內之複數個電子零件(2)的樹脂構造體(1)中,樹脂成形體(5)具有供電子零件(2)之電極(3)露出的複數個露出面,且於樹脂成形體(5)形成有凹部(7),凹部(7)之底面(13)係複數個露出面之至少一個。

Description

埋設電子零件的樹脂構造體及其製造方法
本發明係關於埋設電子零件的樹脂構造體及其製造方法。
近來,於行動電話等之移動用電子機器或者以電子體溫計、血壓計所代表的健康器材等的民生用電子機器中,要求廉價地提供薄型、輕量、小型及高耐水性之穿戴式的產品。
一般而言,上述電子機器係藉由於印刷電路基板上組裝各種電子零件而構成。其中,各種電子零件係指電阻或電容器等之被動元件、LSI(Large Scale Integrated Circuit:大型積體電路)或IC(Integrated Circuit:半導體積體電路)等的主動元件、電池等的電源裝置、LED(Light Emitting Diode:發光二極體)等之顯示裝置、及感測器或開關等。
上述印刷電路基板一般係藉由於利用玻璃纖維強化之環氧樹脂性的板(環氧玻璃)、或聚醯亞胺製的基板(可撓性基板)的片材上層積銅箔,再對層積之銅箔 進行蝕刻加工而形成配線電路。然後於該配線電路上,使用銲料、導電性黏著劑或金屬線等組裝其他的電子零件,而組裝成電子機器。
然而,對銅箔蝕刻加工而形成電路之印刷電路基板,由於材料費及加工費等費用增高,而且使用銲料、導電性黏著劑或金屬線等之電子零件的安裝,其材料費及加工費等費用也提高,因而有變得高價的問題。並且,還存在有藉由蝕刻加工而排出之廢液對環境造成之負擔也大的問題。
此外,為了於印刷電路基板上安裝電子零件,需要於各零件之間設置一定程度以上之空間,因而又有產品之厚度增加的問題、及產品之小型化的極限之問題。
因此,為了產品之薄型化、小型化及低成本化,有提出一種不使用印刷電路基板之電子零件的安裝方法。
例如,專利文獻1揭示有以電極面露出之方式將電子零件、電路元件等埋設於成形樹脂內之電子電路封裝體。上述電子電路封裝體,首先利用熱硬化樹脂將電子零件、電路元件等暫時固定,然後藉由射出成型將該電子零件、電路元件等埋設於成形樹脂內。此後,將暫時固定樹脂溶解除去而使電極面露出。藉由於露出之電極面形成導體層,且利用曝光、蝕刻形成配線圖案,而製造電子電路封裝體。
此外,專利文獻2揭示有使用埋入電子零件之樹脂作為外封構件的方法。專利文獻2中,藉由於露出電極之狀態下將電子零件埋入於樹脂之內側面,且印刷銀膏等之方法而形成電路。因此,外封構件發揮基板之作用,變得不再需要用以形成電路之基板,從而可達到產品之薄形化。
此外,專利文獻3揭示有將電子零件埋入樹脂成型品內之電子零件安裝裝置。上述安裝裝置係於露出電子零件之電極的狀態下將電子零件埋入樹脂成型品內。因此,藉由電性連接露出之電極,不需要於定位之狀態下用以固定電子零件的構件(基板),而且也不需要將電子零件組裝於筐體上之作業。
先前技術文獻 專利文獻
專利文獻1 日本國公開專利公報「特開平7-66570號公報(1995年3月10日公開)
專利文獻2 日本國公開專利公報「特開2004-111502號公報(2004年4月8日公開)
專利文獻3 日本國公開專利公報「特開2010-272756號公報(2010年12月2日公開)
然而,上述專利文獻1~3揭示之發明中所記載之方法中,可形成用以連接各電子零件等之電路的面被限於使電極露出之一面。
因此,存在有所能安裝之電子零件的數量及種類受限制之問題、或配線電路之長度受限制之問題,而電路設計之自由度低。
本發明係鑑於上述問題而完成,其目的在於,於將電子零件埋設於樹脂成形體內且使該電子零件之電極自樹脂中露出樹脂構造體中,提高用以安裝電子零件之電路設計的自由度。
於具備本發明之樹脂成形體、及埋設於上述樹脂成形體內之複數個電子零件的樹脂構造體中,上述樹脂成形體具有供上述電子零件之電極露出的複數個露出面,且於上述樹脂成形體形成有凹部,上述凹部之底面係上述複數個露出面之至少一個。
根據上述構成,樹脂構造體具備複數個露出電極之露出面。因此,可於複數個面形成電路,從而可提高安裝電子零件之電路設計的自由度。因此,於能安裝之零件數增加,並且形成電路之面為一面的情況下,也可解決連接各電子零件之電路長度受限制之問題。
本發明係於將電子零件埋設於樹脂成形體內之樹脂構造體中,可提高安裝電子零件之電路設計的自由度。
1、30‧‧‧樹脂構造體
2‧‧‧電子零件
3‧‧‧電極
4‧‧‧導電性構件
5‧‧‧樹脂成形體
6‧‧‧配線
7‧‧‧凹部
13‧‧‧凹部底面
20‧‧‧片材
23‧‧‧成形模具
25‧‧‧凸部
50‧‧‧封裝體
第1圖為本發明之實施形態1的樹脂構造體之構成概略圖。
第2圖為本發明之實施形態1的樹脂構造體之製造步驟圖。
第3圖為本發明之實施形態2的樹脂構造體之構成概略圖。
下面,參照圖式對本發明之一實施形態進行說明。
[實施形態1] (樹脂構造體之構成概略)
第1圖為顯示本發明之樹脂構造體的一例之構成概略圖。第1(a)圖為自上方觀察本實施形態之樹脂構造體1的構成概略圖,第1(b)圖為沿第1(a)圖中之A-A’線的箭頭方向之剖視圖,第1(c)圖為自下方觀察本實施形態之樹脂構造體1的構成概略圖。
本實施形態之樹脂構造體1具備電子零件2、導電性構件4、樹脂成形體5、及配線6。
複數個電子零件2(2a~2h)係電阻或電容器等之被動元件、LSI或IC等的主動元件、電池等之電源裝置、LED等的顯示裝置、及感測器或開關等。再者,以下之說明中,於不區別複數個電子零件之各者時,標示為符號2,於區別時標示為符號2a~2h之任一者。
各電子零件2分別具備電極3(3a-1~3h-2)。電子零件2a具有電極3a-1,3a-2,電子零件2b具有電極3b-1,3b-2,電子零件2c具有電極3c-1,3c-2,電子零件2d具有電極3d-1,3d-2,電子零件2e具有電極3e-1,3e-2, 電子零件2f具有電極3f-1,3f-2,電子零件2g具有電極3g-1,3g-2,電子零件2h具有電極3h-1,3h-2。以下之說明中,於不區別電極的各者時,標示為符號3,於區別時標示為符號3a-1~3h-2之任一者。
導電性構件4(4a,4b)係由導電性金屬(例如銅)構成的構件,作為用以容易連接電子零件2之間的端子座發揮作用。再者,以下之說明中,於不區別導電性構件的各者時,標示為符號4,於區別時標示為符號4a,4b之任一者。
樹脂成形體5係呈大致板狀,於其內部埋設有電子零件2及導電性構件4。不過,樹脂成形體5具有使電子零件2之電極3及導電性構件4露出的複數個露出面。以下,露出面係指露出1個以上之電極的面。本實施形態中,平坦之樹脂成形體5之上面(以下,稱為樹脂成形體上面)11整體為露出面中之一個。此外,樹脂成形體5於其下面(以下,稱為樹脂成形體下面)12形成有凹部7。凹部7係以使電極3或導電性構件4露出之深度而形成。因此,凹部7之平坦的底面(以下,稱為凹部底面)13為使電極3及導電性構件4露出之露出面。
此外,樹脂成形體5係支撐電子零件2,使得電子零件2之電極3中的一部分(第1圖中,電極3a-2、電極3c-2、電極3d-1及電極3f-2)成為於樹脂成形體上面11及凹部底面13之兩者露出的二面露出電極。同樣地,樹脂成形體5係支撐導電性構件4,使得導電性構件4於樹脂成形體上面11及凹部底面13之兩者露出。
配線6係用於電路連接電極3之間、電極3與導電性構件4之間、或導電性構件4之間的構件,且由導電性材料構成。配線6係形成於使電子零件2之電極3及/或導電性構件4露出之複數個露出面的各個面內,且於該露出面上連接露出的電極3之間、電極3與導電性構件4之間、或導電性構件4之間。
如上述,樹脂構造體1具有使電極3及/或導電性構件4露出之複數個露出面。因此,與僅於1個露出面內進行配線之情況比較,可提高電路設計之自由度。
例如,如第1圖所示,由於在樹脂成形體上面11設置有連接導電性構件4a與電極3h-2之配線6,因而於樹脂成形體上面11上無法設置連接電極3f-2與電極3d-1的配線6。這是因為連接電極3f-2及電極3d-1之配線6,與導電性構件4a及電極3h-2之間的原有之配線6有交叉。然而,本實施形態中,由於樹脂構造體1除樹脂成形體上面11外,還具有供電極3f-2及電極3d-2露出之凹部底面13,因而可於凹部底面13設置連接電極3f-2與電極3d-1之配線6以形成電路。
此外,二面露出電極(第1圖中,電極3a-2、電極3c-2、電極3d-1及電極3f-2)(複數面露出電極),係於樹脂構造體1中,相對於樹脂成形體上面11及凹部底面13的兩者而露出。因此,可將二面露出電極作為連接形成於樹脂成形體上面11之電路及形成於凹部底面13的電路之配線6之一部分使用。
例如,電極3f-2係相對於樹脂成形體上面11及凹部底面13之2個露出面而露出的二面露出電極。電極3f-2係於樹脂成形體上面11上與電極3h-1之間具有配線6,於凹部底面13上與電極3d-1及導電性構件4a之間具有配線。藉此,不用通過電子零件2f而可使形成於樹脂成形體上面11之、電極3h-1與電極3f-2之間的配線6,及形成於凹部底面13之、電極3d-1及導電性構件4a與電極3f-2之間的配線6導通。藉此,可將電極3f-2作為配線6之一部分使用。
此外,由於導電性構件4也露出於樹脂成形體上面11及凹部底面13之兩者,因而也可使用導電性構件4作為連接形成於樹脂成形體上面11之電路及形成於凹部底面13的電路之配線6之一部分。
例如,導電性構件4a係於樹脂成形體上面11上與電極3h-2及電極3g-1之間具有配線6,於凹部底面13上與電極3d-1及電極3f-2之間具有配線6。亦即,只要將相對於兩者之露出面而露出的導電性構件4埋入樹脂構造體1,則藉由於各露出面上且導電性構件4與電極3之間形成配線6,就可連接形成於樹脂成形體上面11之電路與形成於凹部底面13的電路。因此,即使於能形成電路之面為一面之情況下形成電路有困難的電子零件配置中也能形成電路,進而可提高電路設計之自由度。
再者,本實施形態中,導電性構件4係相對於樹脂成形體上面11及凹部底面13之兩者而露出,但 不限於此。只要導電性構件4相對於樹脂成形體上面11及凹部底面13之至少任意一者露出,便可作為電路連接各電子零件2彼此之端子座使用。
根據以上說明,本實施形態中,可於樹脂成形體上面11及凹部底面13之兩者的面形成電路,即使為於先前技術中對形成配線有困難之電子零件配置,仍可形成配線。藉此,可提高電子零件之配置的自由度。
(樹脂構造體之製造方法)
其次,參照第2(a)~(d)圖對本實施形態之樹脂構造體1的製造方法進行說明。
首先,作為第1步驟,以電極3接觸於片材20之方式將電子零件2及導電性構件4(第2圖中未圖示)貼附固定於片材20上(第2(a)圖)。
作為片材20之材料,較佳為可供紫外線穿透且具有柔軟性之材料,例如可使用PET(聚對苯二甲酸乙二酯)、PEN(聚萘二甲酸乙二酯)、PPS(聚苯硫)等。
在此,於片材20上將黏著劑塗布於面22,且於決定了電子零件2之位置關係的狀態下,將電子零件2固定於片材20之面22上。作為黏著劑,較佳為硬化時間短者,例如可使用紫外線硬化型之黏著劑。紫外線硬化型之黏著劑,當照射紫外線時就會硬化,從而將片材20與電子零件2黏著。因此,於自塗布有黏著劑之面22照射紫外線之情況,電子零件2本身成為阻礙紫外線照射於黏著劑之屏障,有可能造成硬化(黏著)不足。因此,使片材20採用能使紫外線穿透之材料,藉由自片 材20之未塗布有黏著劑的面21照射紫外線,使黏著劑充分硬化,可於短時間內確實地將電子零件2固定於片材上。
具體而言,作為紫外線硬化型黏著材,使用Gluelabo有限公司製GL-3005H,於50μm之PET製的片材上,以2~3μm之厚度塗布黏著劑。然後,決定電子零件2之位置,藉由自片材之未塗布有黏著劑的面21照射3000mJ/cm2之紫外線,使黏著劑硬化,可將電子零件2固定。
接著,如第2(b)圖所示,於成形模具23之內側配置固定電子零件2的片材20(第2步驟),以將電子零件2埋設於樹脂成形體5內之方式成形呈大致板狀之樹脂成形體5(第3步驟)。
成形模具23具備第1成形模具23a及第2成形模具23b。上述第1步驟中製作之片材20,係配置於由第1成形模具23a及第2成形模具23b所包圍之空間的內部。第1成形模具23a之內面為大致平面,第2成形模具23b係於內面具有凸部25。片材20係以面21整面密接於第1成形模具23a之內面的方式配置。此外,片材20係使至少一部分之電子零件2抵接於第2成形模具23b的凸部25,抵接以外之部分係與第2成形模具23b分離配置。然後藉由射出成形形成樹脂成形體5。
在此,凸部25其上面為平坦面,且形成於供自凹部底面13露出之、抵接於電子零件2的電極3及/或導電性構件4之位置。藉此,於自成形模具23取出樹 脂成形體5時,與凸部25及電子零件2抵接之部分(抵接部26)自樹脂成形體5露出。亦即,凸部25與樹脂成形體5之凹部7對應,凸部25之上面與作為樹脂成形體5之露出面的凹部底面13對應。如此,藉由於第2成形模具23b設置凸部25而成形樹脂成形體5,於成形後不需要設置用以形成凹部7之加工步驟。因此,可減少製造步驟及謀求生產成本之削減。
此時,與第2成形模具23b之凸部25抵接的電子零件2之抵接部26,較佳可為包含電子零件2之電極3的一部分。這是為了藉由抵接部26為包含電子零件2之電極3的一部分,以使該電極3自樹脂成形體5之凹部底面13露出,但卻不使電子零件2中之抵接部26以外的部分自樹脂成形體5露出。藉此,能於樹脂成形體5內確實地進行電子零件2之固定。
作為成形之具體條件,可使用ABS樹脂等之樹脂作為樹脂成形體5,且以成形模具溫度80℃、射出樹脂溫度180℃、射出壓力20kgf/cm2進行射出成型。
接著,作為第4步驟,自成形模具23中取出樹脂成形體5,將片材20剝離(第2(c)圖)。
藉此,電極3自與片材20之面22對應的樹脂成形體上面11露出,樹脂成形體上面(第1露出面)11成為露出面。
此時,於上述第1步驟中,若使用具有以上述第3步驟之成形溫度能軟化的性質者作為黏著劑,使用具有適合剝離之柔軟性者作為片材20,就能容易地剝離片材20。
此外,樹脂成形體5係於與成形模具23所具有之凸部25對應的位置形成有凹部7,且形成供電極3及/或導電性構件4露出之凹部底面(第2露出面)13作為露出面。
最後,作為第5步驟,於複數個露出面之各個形成連接露出於該露出面內之電極3彼此、電極3與導電性構件4之間、或導電性構件4彼此的配線6(第2(d)圖)。
作為形成配線6之方法,較佳為使用導電材料(例如,銀墨水等),且以噴射噴墨式印刷等之導電材料進行印刷的方法來形成配線6。上述第4步驟中形成之各露出面(樹脂成形體上面11及凹部底面13)為平面。因此,由於噴射導電材料,能容易形成連接可靠度高之配線6,從而可電性連接電子零件2。
此外,於將電子零件2埋設於樹脂成形體5內之樹脂構造體1中,於樹脂成形體5之成形時,具有因樹脂的擠壓壓力而造成電子零件2之位置偏移之問題。本實施形態中,藉由使用上述方法作為形成配線之方法,即使於電子零件2自規定位置偏移且埋設於樹脂成形體5內被成形,仍可於配線6之印刷時,使用圖像處理等之方法檢測電極3之位置,與偏差對應來印刷配線6。因此,可充分地確保與電極3與配線6之接地面積,可形成可靠度高之電路。
(變形例1)
其次,對本實施形態之樹脂構造體1之變形例進行說明。
第1圖所示之構成的樹脂構造體1,係將導電性構件4被埋設於樹脂成形體5。然而,也可於樹脂構造體1中不埋設導電性構件4。例如,於電子零件2之數量較少之電路、或不是以導電性構件4而是如上述可使用二面露出電極連接形成於樹脂成形體上面11及凹部底面13之電路的電路之情況,可省略導電性構件4。
[實施形態2]
接著,顯示將本發明之樹脂構造體應用於電子體溫計時之實施形態。再者,為方便說明,對具有與上述實施形態同樣之功能的構件賦予與上述實施形態相同之符號,並省略說明。
第3圖為本實施形態之樹脂構造體30之概略圖,第3(a)圖為自上方觀察本實施形態之樹脂構造體30的構成概略圖,第3(b)圖為沿第3(a)圖中的A-A’線箭頭方向之剖面圖,第3(c)圖為自下方觀察本實施形態之樹脂構造體30的構成概略圖。
本實施形態之樹脂構造體30,係於樹脂成形體5內埋設有作為電子零件2之、電阻或電容器等之被動元件、IC或LSI等的主動元件、測溫體即熱阻器(thermistor)2k及電池2m等。自樹脂構造體30露出之電極3,藉由配線6而電路連接。其中,電極3還包含熱阻器2k之電極3k-1及3k-2、電池2m的電極3m-1及3m-2。
本實施形態之樹脂構造體30也與上述實施形態1記載之樹脂構造體1同樣,於樹脂成形體下面32具有凹部7。此外,凹部底面13及樹脂成形體上面31為電子零件2之電極3的露出面。其中,熱阻器2k之電極3k-1及3k-2,係相對於樹脂成形體上面31及凹部底面13之兩者的面露出之二面露出電極。因此,可於樹脂成形體上面31及凹部底面13之兩者的面形成電路。
具體而言,如第3圖所示,熱阻器2k之一個電極3k-1,係於樹脂成形體上面31上藉由配線6而與電子零件2i連接。此外,熱阻器2k之另一個電極3k-2,係於凹部底面13藉由配線6而與電子零件2j連接。如此,藉由電子零件2j之電極3j-1及熱阻器2k的電極3k-2之兩者相對於形成在凹部底面13之露出面露出,即使對於在樹脂成形體上面11不容易形成配線6之電極3之間,仍可於另外之露出面即凹部底面13形成配線6。
此外,於熱阻器2k之電極3k-1的厚度與電子零件2j的厚度有差異之情況下,為了使熱阻器2k之電極3k-1及電子零件2j的電極3j-1相對於樹脂成形體上面31及凹部底面13的兩者之面露出,於凹部底面13設置傾斜面40。藉此,即使於熱阻器2k之電極3k-1與電子零件2j的厚度不同之情況,也可印刷配線6而形成電路,進而可提高電路設計之自由度。再者,傾斜面40係僅相對於樹脂成形體下面32傾斜,相對於樹脂成形體下面32不垂直。因此,即使為噴射噴墨式印刷等之導電材料而進行印刷的方法,也可於傾斜面40上形成連接可靠度高之配線。
此外,埋入樹脂構造體30之電池2m的電極3m-1及3m-2,也與上述熱阻器2k之電極3k-1及3k-2同樣,作為於樹脂成形體上面31及凹部底面13之兩者的露出面露出的二面露出電極被埋設於樹脂構造體30內。因此,可於兩者的露出面形成配線6,並可作為使形成於樹脂成形體上面31及凹部底面13之各個的電路導通的配線6之一部分使用,以提高電路設計之自由度。
然後,以於上述樹脂構造體30之上面側組裝封裝體50,且以黏著劑、超音波焊接、或者於成形模具內灌入樹脂等之方法進行封裝,製造電子體溫計。藉此,露出之電子零件2、電極3及配線6等被與外部環境隔絕,從而可保護樹脂構造體30內部不受水分、濕氣等侵擾。此外,凹部底面13可以同樣的方法進行封裝,也可於維持上述電池2m之電極3m-1及3m-2自樹脂構造體30露出的狀態下,作為進行充電等時之電極使用。該情況下,於作為供電極3m-1及3m-2露出之露出面即凹部底面13不形成配線6。
如此,藉由將樹脂構造體30作為溫度計等之電子裝置的外封構件使用,變得不需要用以固定基板等之電子零件的固定構件,可消除伴隨基板等之固定構件的配置而帶來之外封構件的限制。因此,藉由將樹脂構造體作為電子機器之外封構件使用,可減小電子零件之配置對外觀的影響。
本發明不限於上述各實施形態,可於請求項所示之範圍內實施各種的變更,對適宜地組合分別揭示 於不同實施形態之技術手段而能獲得的實施形態,也包含於本發明之技術範疇內。
[歸結]
如上述,於具備本發明之樹脂成形體、及埋設於上述樹脂成形體內的複數個電子零件之樹脂構造體中,上述樹脂成形體具有供上述電子零件之電極露出的複數個露出面,且於上述樹脂成形體形成有凹部,上述凹部之底面係上述複數個露出面的至少1個。
根據上述構成,樹脂構造體具備複數個供電極露出之露出面。因此,可於複數個面形成電路,從而可提高安裝電子零件之電路設計的自由度。因此,於能安裝之零件的數量增加,並且形成電路之面為一個面的情況下,也可解決連接各電子零件之電路長度受限制之問題。
並且,於本發明之樹脂構造體中,也可於上述露出面內具有連接自該露出面露出之上述電極間的配線。
根據上述構成,於相同之面內形成配線。亦即,不會形成例如類似相互正交之跨設於2面的配線(立體配線)。因此,於樹脂成形體受到膨脹、收縮、彎曲等之變形力的情況下,相對於立體配線(一般為90度彎曲部)容易因變形力而斷線,只要如本發明之樹脂構造體那樣於相同之面內進行配線,則配線不容易斷線,可形成可靠度高之電路。
並且,於本發明之樹脂構造體中,上述電極中的至少1個係至少相對於不同之2個露出面而露出的複數面露出電極,於供上述複數面露出電極露出之至少2個露出面的各個,具有與上述複數面露出電極連接之配線。
根據上述構成,可將上述複數面露出電極視作連接各露出面的配線而形成電路,從而可提高電路設計之自由度。
並且,於本發明之樹脂構造體中,供上述複數面露出電極露出之複數個露出面中的至少1個,也可為上述凹部底面。
根據上述構成,若於凹部之底面形成複數面露出電極的露出面,則也可於凹部底面形成電路,並可將複數面露出電極視作連接凹部底面與其他露出面之配線的一部分而形成電路。
並且,於本發明之樹脂構造體中,上述電子零件也可於上述凹部之底面僅露出一部分。
根據上述構成,於樹脂成形體之凹部中,由於只要僅使電子零件之一部分露出,則殘餘之部分會被樹脂構造體覆蓋,因而可於樹脂成形體內確實地進行電子零件之固定。
再者,於本發明之樹脂構造體中,也可為上述樹脂成形體係呈大致板狀,一個面為平面,上述平面全部為上述露出面,且於另一面形成有上述凹部。
並且,於本發明之樹脂構造體中,也可具備:埋設於上述樹脂成形體內,且自上述複數個露出面之至少1個露出的導電性構件;及於供上述導電性構件露出之露出面上連接露出於該露出面之電子零件的電極與上述導電性構件之配線。
根據上述構成,只要導電性構件自露出面露出,便可利用其作為連接各電極間的端子座。
並且,於本發明之樹脂構造體中,也可具備:埋設於上述樹脂成形體內,且自上述複數個露出面的至少2個露出之導電性構件;及於供上述導電性構件露出之露出面的各個中,與上述導電性構件連接之配線。
根據上述構成,只要導電性構件自至少2個露出面露出,可將該導電性構件視作連接2個露出面的配線的一部分而形成電路,從而可提高電路配置之自由度。
並且,於本發明之樹脂構造體中,上述樹脂構造體也可具有封裝上述露出面之封裝體。
根據上述構成,露出之電子零件、電極及配線等與外部環境隔絕,從而可保護樹脂構造體內部不受水分、濕氣等侵擾。
本發明之樹脂構造體的製造方法,係於樹脂成形體內埋設有複數個電子零件之樹脂構造體的製造方法中,其包括:第1步驟,以電極抵接於片材之方式將片材貼附於電子零件;第2步驟,以上述電極中的至少1個於上述片材的貼附有上述電子零件之面與成形模具 之內面之間形成有空間的方式,將上述片材配置於成形模具;第3步驟,藉由於上述空間內填充樹脂,成形埋設有上述電子零件的樹脂成形體;及第4步驟,藉由自上述成形模具取出埋設有上述電子零件的樹脂成形體,且將上述片材自上述樹脂成形體剝離,於上述樹脂成形體形成供抵接於上述片材之電極露出的第1露出面,上述成形模具係於內面具有凸部,上述第2步驟中,藉由以上述凸部抵接於上述電極之方式於上述成形模具配置上述片材,於上述第4步驟中形成供抵接於上述凸部之電極露出的第2露出面。
根據上述構成,可製造作為供電子零件之電極露出的露出面而具有第1露出面(剝離了片材之面)、及第2露出面(供成形模具之凸部抵接的面)之樹脂成形體。藉此,可製造電路設計之自由度高的樹脂構造體。
並且,本發明之樹脂構造體的製造方法,具有第5步驟,其於上述第1露出面及第2露出面之各個,藉由噴射導電材料而進行印刷,形成呈露出之上述電極間的配線。
根據上述構成,於第1露出面及第2露出面之各相同之面內,可使用噴射噴墨式等之導電材料而進行印刷的簡單方法來形成電路。藉此,與使用蝕刻等形成配線之方法相比,可廉價地抑制材料費及加工費。此外,噴射導電材料進行印刷之方法,一般容易進行印刷位置之調整。因此,即使電子零件之埋設位置自規定的位置偏移而被埋設,也可形成與偏移對應之配線。
並且,於本發明之樹脂構造體的製造方法中,也可具有第6步驟,其對自上述樹脂成形體露出之上述電極進行封裝。
根據上述構成,可製造能保護樹脂構造體內部不受水分、濕氣等侵擾之樹脂構造體。
(產業上的可利用性)
本發明可利用於將樹脂構造體使用於外封構件的電子裝置。
1‧‧‧樹脂構造體
2a、2b、2c、2d、2e、2f、2g、2h‧‧‧電子零件
3a-1、3a-2‧‧‧電極
3b-1、3b-2‧‧‧電極
3c-1、3c-2‧‧‧電極
3d-1、3d-2‧‧‧電極
3e-1、3e-2‧‧‧電極
3f-1、3f-2‧‧‧電極
3g-1、3g-2‧‧‧電極
3h-1、3h-2‧‧‧電極
4a、4b‧‧‧導電性構件
5‧‧‧樹脂成形體
6‧‧‧配線
7‧‧‧凹部
11‧‧‧樹脂成形體上面
12‧‧‧樹脂成形體下面
13‧‧‧凹部之底面

Claims (12)

  1. 一種樹脂構造體,具備樹脂成形體、及埋設於上述樹脂成形體內之複數個電子零件,該樹脂構造體之特徵在於:上述樹脂成形體具有供上述電子零件之電極露出的複數個露出面,於上述樹脂成形體形成有凹部,上述凹部之底面係上述複數個露出面之至少一個。
  2. 如請求項1之樹脂構造體,其中於上述露出面內具有連接自該露出面露出之上述電極之間的配線。
  3. 如請求項1或2之樹脂構造體,其中上述電極中的至少1個係至少相對於不同之2個露出面而露出的複數面露出電極,於供上述複數面露出電極露出之至少2個露出面的各個中,具有與上述複數面露出電極連接之配線。
  4. 如請求項3之樹脂構造體,其中供上述複數面露出電極露出之複數個露出面中的至少1個,係上述凹部之底面。
  5. 如請求項1或2之樹脂構造體,其中上述電子零件係於上述凹部之底面僅露出一部分。
  6. 如請求項1或2之樹脂構造體,其中上述樹脂成形體係呈大致板狀,一個面係平面,上述平面的全部係上述露出面,於另一個面形成有上述凹部。
  7. 如請求項1或2之樹脂構造體,其中具備:埋設於上述樹脂成形體內,且自上述複數個露出面的至少1個露出之導電性構件;及於供上述導電性構件露出之露出面上連接露出於該露出面之電子零件的電極與上述導電性構件的配線。
  8. 如請求項1或2之樹脂構造體,其中具備:埋設於上述樹脂成形體內,且自上述複數個露出面的至少2個露出之導電性構件;及於供上述導電性構件露出之露出面的各個中,與上述導電性構件連接之配線。
  9. 如請求項1或2之樹脂構造體,其中具有對上述露出面進行封裝之封裝體。
  10. 一種樹脂構造體之製造方法,係於樹脂成形體內埋設有複數個電子零件之樹脂構造體的製造方法中,其包括:第1步驟,以電極抵接於片材之方式將片材貼附於電子零件;第2步驟,以上述電極中的至少1個於上述片材之貼附有上述電子零件的面與成形模具之內面之間形成有空間的方式,將上述片材配置於成形模具;第3步驟,藉由於上述空間內填充樹脂,成形埋設有上述電子零件的樹脂成形體;及第4步驟,藉由自上述成形模具取出埋設有上述電子零件的樹脂成形體,且將上述片材自上述樹脂成 形體剝離,於上述樹脂成形體形成供抵接於上述片材之電極露出的第1露出面,上述成形模具係於內面具有凸部,上述第2步驟中,藉由以上述凸部抵接於上述電極之方式於上述成形模具配置上述片材,於上述第4步驟中形成供抵接於上述凸部之電極露出的第2露出面。
  11. 如請求項10之樹脂構造體之製造方法,其中具有第5步驟,其於上述第1露出面及第2露出面之各個,藉由噴射導電材料而進行印刷,形成露出之上述電極之間的配線。
  12. 如請求項11之樹脂構造體之製造方法,其中具有第6步驟,其對自上述樹脂成形體露出的上述電極進行封裝。
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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI659510B (zh) * 2016-10-14 2019-05-11 日商歐姆龍股份有限公司 電子裝置及其製造方法
TWI660650B (zh) * 2016-11-21 2019-05-21 日商歐姆龍股份有限公司 電子裝置及其製造方法

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102015218959A1 (de) * 2015-09-30 2017-03-30 Zf Friedrichshafen Ag Diagnose eines Steuergeräts
JP6406235B2 (ja) * 2015-12-16 2018-10-17 オムロン株式会社 電子装置及びその製造方法
JP6645213B2 (ja) * 2016-01-27 2020-02-14 オムロン株式会社 発光装置、および発光装置の製造方法
JP2017135253A (ja) * 2016-01-27 2017-08-03 オムロン株式会社 発光装置、および発光装置の製造方法
JP6648626B2 (ja) * 2016-04-27 2020-02-14 オムロン株式会社 電子装置およびその製造方法
JP6805540B2 (ja) * 2016-05-02 2020-12-23 オムロン株式会社 板バネの固定構造及び電気接点構造の製造方法
JP6677183B2 (ja) * 2017-01-25 2020-04-08 オムロン株式会社 制御装置
JP6693441B2 (ja) * 2017-02-27 2020-05-13 オムロン株式会社 電子装置およびその製造方法
JP6380626B1 (ja) * 2017-07-19 2018-08-29 オムロン株式会社 樹脂構造体の製造方法および樹脂構造体
JP7003478B2 (ja) * 2017-08-02 2022-01-20 オムロン株式会社 電子装置およびその製造方法
JP6480989B2 (ja) * 2017-08-03 2019-03-13 Nissha株式会社 成形品、電気製品及び成形品の製造方法
US10181449B1 (en) * 2017-09-28 2019-01-15 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor structure
JP6812951B2 (ja) * 2017-11-15 2021-01-13 オムロン株式会社 電子装置およびその製造方法
JP6798472B2 (ja) * 2017-11-15 2020-12-09 オムロン株式会社 電子装置およびその製造方法
JP6879241B2 (ja) * 2018-03-19 2021-06-02 オムロン株式会社 メダル選別装置および遊技機
JP7339517B2 (ja) 2019-09-12 2023-09-06 日亜化学工業株式会社 発光装置の製造方法および発光装置

Family Cites Families (49)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0555715A (ja) * 1991-08-26 1993-03-05 Wacom Co Ltd 回路付成形品およびその製造方法
US6084309A (en) * 1992-10-20 2000-07-04 Fujitsu Limited Semiconductor device and semiconductor device mounting structure
US6165819A (en) * 1992-10-20 2000-12-26 Fujitsu Limited Semiconductor device, method of producing semiconductor device and semiconductor device mounting structure
JP2794262B2 (ja) 1993-08-30 1998-09-03 国際電気株式会社 電子回路パッケージ
FR2722915B1 (fr) * 1994-07-21 1997-01-24 Sgs Thomson Microelectronics Boitier bga a moulage par injection
US6048483A (en) * 1996-07-23 2000-04-11 Apic Yamada Corporation Resin sealing method for chip-size packages
JP3726985B2 (ja) * 1996-12-09 2005-12-14 ソニー株式会社 電子部品の製造方法
JPH113953A (ja) * 1997-06-10 1999-01-06 Fujitsu Ltd 半導体装置の製造方法及び半導体装置
JPH1187385A (ja) * 1997-09-10 1999-03-30 Omron Corp 樹脂モールド型電子部品の製造方法、成形金型、リードフレーム
JP3455685B2 (ja) * 1998-11-05 2003-10-14 新光電気工業株式会社 半導体装置の製造方法
TW393744B (en) * 1998-11-10 2000-06-11 Siliconware Precision Industries Co Ltd A semicondutor packaging
JP3297387B2 (ja) * 1998-11-20 2002-07-02 沖電気工業株式会社 半導体装置の製造方法
US6310390B1 (en) * 1999-04-08 2001-10-30 Micron Technology, Inc. BGA package and method of fabrication
WO2001006558A1 (fr) 1999-07-16 2001-01-25 Matsushita Electric Industrial Co., Ltd. Emballage de dispositifs a semi-conducteurs et leur procede de fabrication
JP3436253B2 (ja) * 2001-03-01 2003-08-11 松下電器産業株式会社 樹脂封止型半導体装置およびその製造方法
US6843421B2 (en) * 2001-08-13 2005-01-18 Matrix Semiconductor, Inc. Molded memory module and method of making the module absent a substrate support
US7176055B2 (en) 2001-11-02 2007-02-13 Matsushita Electric Industrial Co., Ltd. Method and apparatus for manufacturing electronic component-mounted component, and electronic component-mounted component
US6731011B2 (en) * 2002-02-19 2004-05-04 Matrix Semiconductor, Inc. Memory module having interconnected and stacked integrated circuits
TW582100B (en) * 2002-05-30 2004-04-01 Fujitsu Ltd Semiconductor device having a heat spreader exposed from a seal resin
JP2004111502A (ja) 2002-09-17 2004-04-08 Matsushita Electric Ind Co Ltd 外装部品および携帯型電子機器
JP4222147B2 (ja) * 2002-10-23 2009-02-12 セイコーエプソン株式会社 圧電発振器及び圧電発振器を利用した携帯電話装置および圧電発振器を利用した電子機器
JP2004152982A (ja) 2002-10-30 2004-05-27 Matsushita Electric Ind Co Ltd 電子部品実装済部品の製造方法、及び該電子部品実装済部品を備えた電子部品実装済完成品の製造方法、並びに電子部品実装済完成品
JP3900093B2 (ja) * 2003-03-11 2007-04-04 日立電線株式会社 モールド金型及びそれを用いた半導体装置の製造方法
JP4020853B2 (ja) * 2003-11-04 2007-12-12 沖電気工業株式会社 アンテナ内蔵半導体装置
KR20060000106A (ko) * 2004-06-28 2006-01-06 삼성전자주식회사 최외곽 수지층의 접착성을 향상시킨 인쇄 회로 기판과 그제조방법, 그 인쇄 회로 기판을 포함하는 반도체 패키지및 그 제조방법
JP2006049070A (ja) * 2004-08-04 2006-02-16 Denso Corp コネクタ部材
JP4494175B2 (ja) * 2004-11-30 2010-06-30 新光電気工業株式会社 半導体装置
JP2006179760A (ja) * 2004-12-24 2006-07-06 Yamaha Corp 半導体パッケージ、および、これに使用するリードフレーム
JP4290134B2 (ja) * 2005-03-14 2009-07-01 パナソニック株式会社 固体撮像装置と固体撮像装置の製造方法
EP1795496A2 (en) * 2005-12-08 2007-06-13 Yamaha Corporation Semiconductor device for detecting pressure variations
KR101058986B1 (ko) * 2006-06-22 2011-08-23 다이니폰 인사츠 가부시키가이샤 수지 밀봉형 반도체 장치와 그 제조 방법, 반도체 장치용 기재 및 적층형 수지 밀봉형 반도체 장치
CN101543152A (zh) 2007-06-19 2009-09-23 株式会社村田制作所 元器件内置基板的制造方法及元器件内置基板
US7781877B2 (en) 2007-08-07 2010-08-24 Micron Technology, Inc. Packaged integrated circuit devices with through-body conductive vias, and methods of making same
JP2009099593A (ja) * 2007-10-12 2009-05-07 Sanyo Electric Co Ltd 回路基板、該回路基板の製造方法、及び該回路基板を備える電池パック
JP4634498B2 (ja) * 2008-11-28 2011-02-16 三菱電機株式会社 電力用半導体モジュール
JP5147677B2 (ja) * 2008-12-24 2013-02-20 新光電気工業株式会社 樹脂封止パッケージの製造方法
JP5149854B2 (ja) * 2009-03-31 2013-02-20 ルネサスエレクトロニクス株式会社 半導体装置
JP5359550B2 (ja) * 2009-05-22 2013-12-04 オムロン株式会社 電子部品実装装置の製造方法
JP5443837B2 (ja) * 2009-06-05 2014-03-19 ルネサスエレクトロニクス株式会社 半導体装置
JP5345017B2 (ja) * 2009-08-27 2013-11-20 三菱電機株式会社 電力用半導体装置とその製造方法
JP5271861B2 (ja) * 2009-10-07 2013-08-21 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
US8535961B1 (en) 2010-12-09 2013-09-17 Amkor Technology, Inc. Light emitting diode (LED) package and method
JP2012146963A (ja) * 2010-12-20 2012-08-02 Shinko Electric Ind Co Ltd 半導体パッケージの製造方法及び半導体パッケージ
WO2012100720A1 (zh) * 2011-01-30 2012-08-02 南通富士通微电子股份有限公司 封装方法
EP2677539B1 (en) * 2011-02-15 2017-07-05 Panasonic Intellectual Property Management Co., Ltd. Process for manufacture of a semiconductor device
JP5754173B2 (ja) * 2011-03-01 2015-07-29 ソニー株式会社 発光ユニットおよび表示装置
JP5672370B2 (ja) * 2011-03-16 2015-02-18 富士電機株式会社 半導体モジュールおよびその製造方法
US20130292852A1 (en) * 2012-05-03 2013-11-07 Infineon Technologies Ag Chip embedded packages and methods for forming a chip embedded package
JP5740372B2 (ja) * 2012-09-12 2015-06-24 株式会社東芝 半導体メモリカード

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI659510B (zh) * 2016-10-14 2019-05-11 日商歐姆龍股份有限公司 電子裝置及其製造方法
TWI660650B (zh) * 2016-11-21 2019-05-21 日商歐姆龍股份有限公司 電子裝置及其製造方法
US11004699B2 (en) 2016-11-21 2021-05-11 Omron Corporation Electronic device and method for manufacturing the same

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