KR950007160A - 반도체 장치 및 그 제조 방법 - Google Patents

반도체 장치 및 그 제조 방법 Download PDF

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KR950007160A
KR950007160A KR1019940019557A KR19940019557A KR950007160A KR 950007160 A KR950007160 A KR 950007160A KR 1019940019557 A KR1019940019557 A KR 1019940019557A KR 19940019557 A KR19940019557 A KR 19940019557A KR 950007160 A KR950007160 A KR 950007160A
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silicon film
thin film
crystalline silicon
substrate
specific angle
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후미아끼 후나다
다쯔오 모리따
히로히사 다나까
장홍용
토루 다까야마
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야마자끼 순베이
가부시끼가이샤 한도따이 에네르기 겐꾸쇼
쯔지 하루오
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    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259Multistep manufacturing methods
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    • H01L27/1274Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement using crystallisation of amorphous semiconductor or recrystallisation of crystalline semiconductor
    • H01L27/1277Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement using crystallisation of amorphous semiconductor or recrystallisation of crystalline semiconductor using a crystallisation promoting species, e.g. local introduction of Ni catalyst
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    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66742Thin film unipolar transistors
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    • H01ELECTRIC ELEMENTS
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    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
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    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
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    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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Abstract

액티브 매트릭스형의 액정표시장치에 있어서, 주변회로 부분에는 고이동도를 가지며, 높은 온 상태 전류를 흐르게 하는 TFT를 배치한다. 화소부분에는 오프 상태 전류가 적은 TFT를 배치한다. 이와같은 특성의 다른 TFT는 기판상에 평행한 방향으로 결정성장시킨 결정성 규소막을 사용하여 구성한다. 즉, 결정성장된 방향과 캐리어가 이동하는 방향의 각도가 각각 다르므로 캐리어가 이동할 때에 받는 저항을 제어하고, TFT의 특성을 결정한다.
예를들면, 결정성장 방향과 캐리어가 이동하는 방향이 합쳐지므로 캐리어는 고이동도를 가질 수 있다. 또한 결정성장 방향과 캐리어가 이동하는 방향을 수직으로 하므로서 오프 상태 전류를 낮춰서 구성되도록 할 수 있다.

Description

반도체 장치 및 그 제조 방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명의 실시예에 의한 반도체 장치의 개략도.
제2A도 내지 제2D도는 본 발명의 실시예에 의한 반도체 장치의 형성 공정을 도시한 단면도.

Claims (9)

  1. 기판상에 기판 표면에 평행하게 결정성장하는 결정성 규소막을 가지며, 상기 결정성 규소막을 사용하여 박막 트랜지스터가 다수 설치되는 반도체 장치에 있어서, 상기 다수의 박막 트랜지스터의 일부에 상기 결정성 규소막중의 캐리어가 이동하는 방향과 결정성장 방향이 제1의 특정 각도를 갖도록 구성되며, 상기 다수의 박막 트랜지스터의 다른 일부에 상기 결정성 규소막중의 캐리어가 이동하는 방향과 결정성장 방향이 제1 특정 각도와는 다른 제2 특정 각도를 갖도록 구성되는 것을 특징으로 하는 반도체 장치.
  2. 기판상에 기판 표면에 평행하게 결정성장하는 결정성 규소막을 가지며, 상기 결정성 규소막을 이용하여 박막 트랜지스터가 다수 설치되며, 상기 다수의 박막 트랜지스터의 일부는 액티브 매트릭스형 액정표시장치의 주변회로부분에 설치되며,상기 다수의 박막 트랜지스터의 일부는 액티브 매트릭스형 액정표시장치의 화소부분에 설치되는 반도체 장치에 있어서, 상기 주변회로부분에 설치된 박막 트랜지스터에 상기 결정성 규소막중의 캐리어가 이동하는 방향과 결정성장 방향이 제1의 특정의 각도를 갖도록 구성하며, 상기 화소부분에 설치된 박막 트랜지스터에 있어서, 상기 결정성 규소막중의 캐리어가 이동하는 방향과 결정성장 방향이 제1 특정각도와는 다른 제2 특정 각도를 갖도록 구성되는 것을 특징으로 하는 반도체 장치.
  3. 제1항 또는 제2항에 있어서, 제1 특정 각도가 거의 평행이며, 제2 특정 각도가 거의 수직인 것을 특징으로 하는 반도체 장치.
  4. 기판상에 실질적인 비정질 규소막이 형성되는 공정과, 상기 공정의 앞 또는 뒤에 있어서, 결정화를 조장하는 금속원소를 선택적으로 도입되는 공정과, 가열에 의해 상기 비정질 규소막을 결정화시키고 상기 금속원자를 선택적으로 도입시킨 영역의 주변 영역에 기판 표면에 대하여 거의 평행한 방향으로 결정성장이 되는 공정과, 상기 기판 표면에 대하여 거의 평행한 방향으로 결정성장이 된 영역의 결정성 규소막으로 다수의 박막 트랜지스터가 일부는 캐리어가 이동하는 방향과 결정성 규소막의 결정성장 방향이 제1의 특정 각도를 갖도록 구성되며, 상기 다수의 박막 트랜지스터의 다른 일부는 캐리어가 이동하는 방향과 결정성장 방향이 제1 특정 각도와는 다른 제2 특정 각도를 갖도록 구성되는 것을 특징으로 하는 반도체 장치.
  5. 제4항에 있어서, 상기 제1 각도는 거의 0°이며, 상기 제2 각도는 거의 90°인 것을 특징으로 하는 반도체 장치.
  6. 제4항 또는 제5항에 있어서, 상기 금속원소는 Ni, Co, Pd 및 Pt로 구성된 그룹으로부터 하나 이상이 선택되는 것을 특징으로 하는 반도체 장치 제조 방법.
  7. 기판상에 실질적인 비정질 규소막이 형성되는 공정과, 상기 공정의 앞 또는 뒤에 있어서, 결정화를 조장하는 금속 원소를 선택적으로 도입되는 공정과, 가열에 의해 상기 비정질 규소막을 결정화시켜 상기 금속원소가 선택적으로 도입되는 영역의 주변 영역에 있어서, 기판 표면에 대하여 거의 평행한 방향으로 결정성장이 되는 공정과, 상기 기판 표면에 대하여 거의 평행한 방향으로 결정성장이 된 영역의 결정성 규소막으로 다수의 박막 트랜지스터가 형성되는 공정을 구비하는 반도체 장치 제조 방법에 있어서, 상기 다수의 박막 트랜지스터의 일부는 액티브 매트릭스형 액정표시장치의 주변회로부분에 형성되며, 캐리어가 이동하는 방향과 결정성장 방향이 제1 특정의 각도를 갖도록 구성되며, 상기 다수의 박막 트랜지스터의 다른 일부는 액티브 매트릭스형 액정표시장치의 화소부분에 형성되며, 캐리어가 이동하는 방향과 결정성 방향이 제1 특정 각도와는 다른 제2 특정각도를 갖도록 구성되는 것을 특징으로 하는 반도체 장치 제조 방법.
  8. 제7항에 있어서, 상기 제1 각도는 거의 0인 것을 특징으로 하며, 상기 제2 각도는 거의 90°인 것을 특징으로 하는 반도체 장치 제조 방법.
  9. 제7항 또는 제8항에 있어서, 상기 금속원소는 Ni, Co, Pd 및 Pt로 구성된 그룹으로부터 하나 이상이 선택되는 것을 특징으로 하는 반도체 장치 제조 방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019940019557A 1993-08-10 1994-08-09 반도체장치및그제조방법 KR100310407B1 (ko)

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JP21815693A JP2975973B2 (ja) 1993-08-10 1993-08-10 半導体装置およびその作製方法
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