KR950004495A - 반도체장치, 리드프레임 및 반도체장치의 제조방법 - Google Patents
반도체장치, 리드프레임 및 반도체장치의 제조방법 Download PDFInfo
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- KR950004495A KR950004495A KR1019940017089A KR19940017089A KR950004495A KR 950004495 A KR950004495 A KR 950004495A KR 1019940017089 A KR1019940017089 A KR 1019940017089A KR 19940017089 A KR19940017089 A KR 19940017089A KR 950004495 A KR950004495 A KR 950004495A
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- lead
- frame
- chip mounting
- mold
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 13
- 238000004519 manufacturing process Methods 0.000 title claims abstract 5
- 238000000465 moulding Methods 0.000 claims abstract 6
- 238000000034 method Methods 0.000 claims abstract 3
- 239000011347 resin Substances 0.000 claims 4
- 229920005989 resin Polymers 0.000 claims 4
- 239000000470 constituent Substances 0.000 claims 1
- 238000005452 bending Methods 0.000 abstract 1
- 239000000463 material Substances 0.000 description 1
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Abstract
본 발명은, 평면적, 공간적 실장밀도를 향상시킴과 더불어 리드의 구부러짐을 방지하는 것이 가능한 반도체장치 및 그 제조방법, 리드프레임을 제공한다.
본 발명에 의하면, 외부리드(41)가 패키지(8)내에 매립되어 있다. 외부리드의 적어도 회로기판에 접속하기 위한 접촉부분이 패키지(8)로부터 노출하고 있고, 그 노출부분은 패키지 표면과 동일한 평탄한 면을 구성하고 있다. 이 패키지를 형성할 때에, 외부리드(41)는 몰드성형금형의 측벽으로 이용되기 때문에, 패키지 내부의 내부리드보다 두껍게 되어 있는 것도 특징이다.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명의 제1실시예의 반도체장치의 사시도, 제2도는 제1실시예의 반도체장치의 단면도, 제3도는 제1실시예에 이용한 리드프레임재료로 평면도 및 단면도, 제4도는 제1실시예에 이용한 리드프레임의 평면도 및 단면도.
Claims (7)
- 반도체칩(1)과, 상기 반도체칩을 피복하는 패키지(8), 상기 반도체칩과 전기적으로 접속되어, 상기 패키지에 의해 피복되어 있는 내부리드(42) 및, 상기 내부리드보다 두껍고 또한 이 내부리드와 일체로 형성되며 그 표면의 일부는 상기 패키지로부터 노출하고 있는 외부리드(41)를 구비하고, 상기 외부리드의 표면은 상기 패키지의 상면, 하면 및 측면에 노출하고 있으며, 더욱이 상기 외부리드의 표면이 상기 패키지의 상면, 하면 및 측면의 각면과 평탄한 면을 형성하는 것을 특징으로 하는 반도체장치.
- 제1항에 있어서, 상기 외부리드(41)는, 상기 내부리드(42)의 상방 및 하방으로 튀어 나오고, 또한 이 내부리드보다 두껍게 되어 있는 것을 특징으로 하는 반도체장치.
- 양측에 형성된 프레임부(22)와, 상기 양측의 프레임부 사이를 접속함과 더불어 서로 이간배치된 타이바(19), 상기 프레임부와 상기 타이 바로 둘러싸인 영역내에 배치된 칩탑재부(2), 상기 칩탑재부와 상기 프레임부를 접속하며 상기 칩탑재부를 지지하는 칩탑재부 지지체(18), 상기 타이 바로부터 상기 칩탑재부 방향으로 연재하고 있는 외부리드(41) 및, 상기 외부리드와 일단이 이어져 있으며 타단이 상기 칩탑재부와 근접하고 있는 내부리드(42)를 구비하고, 상기 칩탑재부 및 상기 내부리드는, 상기 외부리드, 상기 타이 바 및 상기 프레임부보다 얇게 형성되어 있는 것을 특징으로 하는 리드프레임(30,31,32,33).
- 제3항에 있어서, 상기 리드프레임(30,31,32,33)은, 상기 타이 바(19), 상기 프레임부(22), 상기 칩탑재부(2), 상기 칩탑재부 지지체(18), 상기 외부리드(41) 및 상기 내부리드(42)를 구비한 똑같은 두께의 주 리드프레임(31)과 그 양면에 상기 타이 바, 상기 프레임부, 상기 칩탑재부 지지체의 일부 및 상기 외부리드를 구비한 똑같은 두께의 상부 및 하부 리드프레임(32,33)을 접합형성하여 이루어진 것을 특징으로 하는 리드프레임.
- 양측에 형성된 프레임부와, 상기 양측의 프레임부 사이를 접속함과 더불어 서로 이간배치된 타이바, 상기 프레임부와 상기 타이 바로 둘러싸인 영역내에 배치된 칩탑재부, 상기 칩탑재부와 상기 프레임부를 접속하며 상기 칩탑재부를 지지하는 칩탑재부 지지체, 상기 타이 바로부터 상기 칩탑재부 방향으로 연재하고 있는 외부리드 및, 상기 외부리드와 일단이 이어져 있으며 타단이 상기 칩탑재부와 근접하고 있는 내부리드를 구비하고, 상기 칩탑재부 및 상기 내부리드가, 상기 외부리드, 상기 타이 바 및 상기 프레임부보다 얇게 형성되어 있는 리드프레임에 반도체칩을 탑재하고 나서, 몰드성형금형을 구성하는 하형과 상형의 대향하는 평탄한 면의 사이에 이 리드프레임을 삽입하고, 이 몰드성형금형의 평탄한 면과 상기 리드프레임의 프레임부, 타이 바 및 외부리드로 캐비티를 형성하는 공정, 상기 캐비티내에 몰드수지를 주입하고 경화시켜 몰드수지의 패키지를 형성하는 공정 및, 상기 몰드성형금형으로부터 상기 리드프레임을 꺼내고 나서, 상기 리드프레임의 몰드수지의 주변을 절단하여 상기 패키지의 상면, 하면 및 측면에 노출하고, 그 표면은 상기 패키지의 상면, 하면 및 측면의 각면과 평탄한 면을 형성하고 있는 외부리드를 형성하는 공정을 구비하고 있는 것을 특징으로 하는 반도체장치의 제조방법.
- 제5항에 있어서, 상기 몰드성형금형 또는 상기 리드프레임의 상기 프레임부에 상기 몰드수지를 상기 캐비티내에 공급하는 러너 및 게이트를 형성하는 공정을 더 구비하고 있는 것을 특징으로 하는 반도체장치의 제조방법.
- 제5항 또는 제6항에 있어서, 상기 몰드성형금형의 하형에는 상기 몰드성형금형의 상형에 당접하여, 상기 리드프레임의 상기 외부리드, 상기 타이 바 및 상기 프레임부와 거의 같은 두께나 그 보다도 약간 낮은 높이의 凸부를 형성하는 공정을 더 구비한 것을 특징으로 하는 반도체장치의 제조방법.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
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Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
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JPS607259A (ja) * | 1983-06-27 | 1985-01-16 | Nippon Telegr & Teleph Corp <Ntt> | 音声処理交換方式 |
JPS60138929A (ja) * | 1983-12-27 | 1985-07-23 | Toshiba Corp | 半導体装置用樹脂封止金型 |
JPS60240153A (ja) * | 1984-05-14 | 1985-11-29 | Matsushita Electric Ind Co Ltd | 電子部品体 |
US4660127A (en) * | 1985-12-17 | 1987-04-21 | North American Philips Corporation | Fail-safe lead configuration for polar SMD components |
JPH02103941A (ja) * | 1988-10-13 | 1990-04-17 | Mitsubishi Electric Corp | 半導体素子の樹脂封止方法およびこれに用いる真空式樹脂封止装置と長尺リードフレーム |
FR2659157B2 (fr) * | 1989-05-26 | 1994-09-30 | Lemaire Gerard | Procede de fabrication d'une carte dite carte a puce, et carte obtenue par ce procede. |
JPH03173167A (ja) * | 1989-12-01 | 1991-07-26 | Hitachi Ltd | 面実装パッケージ半導体装置及びその実装方法 |
JP2754875B2 (ja) * | 1990-06-20 | 1998-05-20 | 富士通株式会社 | 半導体装置 |
JP2917575B2 (ja) * | 1991-05-23 | 1999-07-12 | 株式会社日立製作所 | 樹脂封止型半導体装置 |
-
1993
- 1993-07-15 JP JP5197938A patent/JP2875139B2/ja not_active Expired - Fee Related
-
1994
- 1994-07-15 KR KR1019940017089A patent/KR0139700B1/ko not_active IP Right Cessation
-
1995
- 1995-06-07 US US08/467,533 patent/US5493151A/en not_active Expired - Lifetime
- 1995-10-19 US US08/545,179 patent/US5665651A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
KR0139700B1 (ko) | 1998-06-01 |
JP2875139B2 (ja) | 1999-03-24 |
US5493151A (en) | 1996-02-20 |
US5665651A (en) | 1997-09-09 |
JPH0730046A (ja) | 1995-01-31 |
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