KR920005304A - 반도체집적회로장치의 배선접속구조 및 그 제조방법 - Google Patents

반도체집적회로장치의 배선접속구조 및 그 제조방법 Download PDF

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KR920005304A
KR920005304A KR1019910014771A KR910014771A KR920005304A KR 920005304 A KR920005304 A KR 920005304A KR 1019910014771 A KR1019910014771 A KR 1019910014771A KR 910014771 A KR910014771 A KR 910014771A KR 920005304 A KR920005304 A KR 920005304A
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layer
aluminum wiring
connection structure
integrated circuit
hole
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KR1019910014771A
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KR950014686B1 (ko
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시게루 하라다
쥰이찌 아리마
겐쇼 후지기
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시기 모리야
미쓰비시 뎅끼 가부시끼가이샤
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204Conductive materials
    • H01L23/53209Conductive materials based on metals, e.g. alloys, metal silicides
    • H01L23/53214Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being aluminium
    • H01L23/53223Additional layers associated with aluminium layers, e.g. adhesion, barrier, cladding layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/5226Via connections in a multilevel interconnection structure
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

내용 없음

Description

반도체집적회로장치의 배선접속구조 및 그 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 이 발명의 1실시예에 의한 반도체집적회로장치의 배선접속구조를 표시하는 부분단면도,
제2A도, 제2B도, 제2C도, 제2D도, 제2E도, 제2G도는 제1도에 표시된 배선접속구조의 형성방법을 공정순으로 표시하는 부분단면도,
제3A도 및 제3B도는 제1알루미늄배선층과 제2알루미늄배선층과의 계면에 있어 작용을 설명하기 위해 그 접속 구조를 확대하여 표시하는 부분단면도.

Claims (2)

  1. 다층알루미늄배선층의 각층의 접속구멍을 통하여 접속된 반도체집적회로장치의 배선접속구조에 있어, 주표면을 가지는 반도체기관과, 상기 반도체기판의 주표면상에 형성된 제1의 알루미늄배선층과, 상기 제1의 알루미늄배선층상에 형성되어, 상기 제1의 알루미늄배선층표면에 달하는 관통구멍을 가지는 절연층과, 상기 절연층상에 형성되고, 상기 관통구멍을 통하여 상기 제1의 알루미늄배선층에 전기적으로 접속된 제2의 알루미늄배선층을 구비하고, 상기 제2의 알루미늄배선층은, 상기 관통구멍을 통하여 상기 제1의 알루미늄배선층의 표면에 접촉하도록 상기 절연층상에 형성된 치탄층과, 상기 치탄층상에 형성된 치탄화합물층과, 상기 치탄화합물층상에 형성된 알루미늄함유층을 포함하는, 반도체집적회로장치의 배선접속구조.
  2. 다층알루미늄배선층의 각층이 접속구멍을 통하여 접속된 반도체집적회로장치의 배선접속구조의 제조방법에 있어, 반도체기판의 주표면상에 제1의 알루미늄배선층을 형성하는 공정과, 상기 제1의 알루미늄배선층상에 절연층을 형성하는 공정과, 상기 절연층을 선택적으로 제거하는 것에 의해, 적어도 상기 제1의 알루미늄배선층의 표면을 노출되게 하는 관통구멍을 형성하는 공정과, 상기 관통구멍을 통하여 상기 제1의 알루미늄배선층표면에 접촉하도록 상기 절연층상에 치탄층을 형성하는 공정과, 상기 치탄층상에 치탄화합물층을 형성하는 공정과, 상기 치탄화합물층상에 알루미늄함유층을 형성하는 공정을 구비한, 반도체집적회로장치의 배선접속구조의 제조방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019910014771A 1990-08-28 1991-08-26 반도체집적회로장치의 배선접속구조 및 그 제조방법 KR950014686B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP90-227061 1990-08-28
JP2227061A JP2598335B2 (ja) 1990-08-28 1990-08-28 半導体集積回路装置の配線接続構造およびその製造方法
JP2-227061 1990-08-28

Publications (2)

Publication Number Publication Date
KR920005304A true KR920005304A (ko) 1992-03-28
KR950014686B1 KR950014686B1 (ko) 1995-12-13

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KR1019910014771A KR950014686B1 (ko) 1990-08-28 1991-08-26 반도체집적회로장치의 배선접속구조 및 그 제조방법

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US (2) US5313101A (ko)
JP (1) JP2598335B2 (ko)
KR (1) KR950014686B1 (ko)
DE (1) DE4128421C2 (ko)
IT (1) IT1251290B (ko)

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Also Published As

Publication number Publication date
US5488014A (en) 1996-01-30
JP2598335B2 (ja) 1997-04-09
DE4128421C2 (de) 1996-10-24
ITMI912260A0 (it) 1991-08-20
KR950014686B1 (ko) 1995-12-13
DE4128421A1 (de) 1992-03-05
ITMI912260A1 (it) 1992-02-29
JPH04107954A (ja) 1992-04-09
US5313101A (en) 1994-05-17
IT1251290B (it) 1995-05-08

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