KR20020019560A - 바이폴라 트랜지스터 및 그 제조방법 - Google Patents

바이폴라 트랜지스터 및 그 제조방법 Download PDF

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Publication number
KR20020019560A
KR20020019560A KR1020027000961A KR20027000961A KR20020019560A KR 20020019560 A KR20020019560 A KR 20020019560A KR 1020027000961 A KR1020027000961 A KR 1020027000961A KR 20027000961 A KR20027000961 A KR 20027000961A KR 20020019560 A KR20020019560 A KR 20020019560A
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KR
South Korea
Prior art keywords
layer
semiconductor layer
insulating film
type impurity
opening
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
KR1020027000961A
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English (en)
Korean (ko)
Inventor
아사이아키라
오니시데루히토
다카기다케시
Original Assignee
마츠시타 덴끼 산교 가부시키가이샤
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Publication of KR20020019560A publication Critical patent/KR20020019560A/ko
Withdrawn legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/60Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
    • H10D84/645Combinations of only lateral BJTs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D10/00Bipolar junction transistors [BJT]
    • H10D10/01Manufacture or treatment
    • H10D10/021Manufacture or treatment of heterojunction BJTs [HBT]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D10/00Bipolar junction transistors [BJT]
    • H10D10/80Heterojunction BJTs
    • H10D10/821Vertical heterojunction BJTs
    • H10D10/891Vertical heterojunction BJTs comprising lattice-mismatched active layers, e.g. SiGe strained-layer transistors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/17Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
    • H10D62/177Base regions of bipolar transistors, e.g. BJTs or IGBTs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/60Impurity distributions or concentrations
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/936Graded energy gap

Landscapes

  • Bipolar Transistors (AREA)
KR1020027000961A 2000-05-23 2001-05-23 바이폴라 트랜지스터 및 그 제조방법 Withdrawn KR20020019560A (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2000151044A JP2001332563A (ja) 2000-05-23 2000-05-23 バイポーラトランジスタ及びその製造方法
JPJP-P-2000-00151044 2000-05-23
PCT/JP2001/004344 WO2001091162A2 (en) 2000-05-23 2001-05-23 Bipolar transistor and method of manufacture thereof

Publications (1)

Publication Number Publication Date
KR20020019560A true KR20020019560A (ko) 2002-03-12

Family

ID=18656664

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020027000961A Withdrawn KR20020019560A (ko) 2000-05-23 2001-05-23 바이폴라 트랜지스터 및 그 제조방법

Country Status (6)

Country Link
US (2) US6828602B2 (https=)
EP (1) EP1263052A2 (https=)
JP (1) JP2001332563A (https=)
KR (1) KR20020019560A (https=)
CN (1) CN1224109C (https=)
WO (1) WO2001091162A2 (https=)

Families Citing this family (34)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10160511A1 (de) * 2001-11-30 2003-06-12 Ihp Gmbh Bipolarer Transistor
DE10164176B4 (de) * 2001-12-27 2007-12-27 Austriamicrosystems Ag Bipolartransistor
US6670654B2 (en) * 2002-01-09 2003-12-30 International Business Machines Corporation Silicon germanium heterojunction bipolar transistor with carbon incorporation
KR100460201B1 (ko) * 2002-04-08 2004-12-08 한국전자통신연구원 SiGe/Si 이종 접합 전계 효과 트랜지스터 제조용 기판의 형성 방법
JP4391069B2 (ja) * 2002-04-30 2009-12-24 富士通マイクロエレクトロニクス株式会社 ヘテロバイポーラトランジスタおよびその製造方法
US6699765B1 (en) * 2002-08-29 2004-03-02 Micrel, Inc. Method of fabricating a bipolar transistor using selective epitaxially grown SiGe base layer
JP2004111852A (ja) * 2002-09-20 2004-04-08 Fujitsu Ltd 半導体装置及びその製造方法
JP3507830B1 (ja) 2002-10-04 2004-03-15 松下電器産業株式会社 半導体装置
JP3643100B2 (ja) 2002-10-04 2005-04-27 松下電器産業株式会社 半導体装置
JP3891299B2 (ja) * 2003-05-06 2007-03-14 セイコーエプソン株式会社 半導体装置の製造方法、半導体装置、半導体デバイス、電子機器
KR100546332B1 (ko) * 2003-06-13 2006-01-26 삼성전자주식회사 바이폴라 접합 트랜지스터 및 그 제조 방법
US7038298B2 (en) * 2003-06-24 2006-05-02 International Business Machines Corporation High fT and fmax bipolar transistor and method of making same
US6960820B2 (en) 2003-07-01 2005-11-01 International Business Machines Corporation Bipolar transistor self-alignment with raised extrinsic base extension and methods of forming same
US7262484B2 (en) * 2005-05-09 2007-08-28 International Business Machines Corporation Structure and method for performance improvement in vertical bipolar transistors
US7342293B2 (en) * 2005-12-05 2008-03-11 International Business Machines Corporation Bipolar junction transistors (BJTS) with second shallow trench isolation (STI) regions, and methods for forming same
US7585740B2 (en) * 2006-03-14 2009-09-08 International Business Machines Corporation Fully silicided extrinsic base transistor
JP2007250903A (ja) 2006-03-16 2007-09-27 Matsushita Electric Ind Co Ltd ヘテロ接合バイポーラトランジスタおよびその製造方法
US7678667B2 (en) * 2007-06-20 2010-03-16 Silverbrook Research Pty Ltd Method of bonding MEMS integrated circuits
CN101459076B (zh) * 2007-12-13 2011-02-02 上海华虹Nec电子有限公司 SiGe HBT晶体管的制备方法
CN102064190B (zh) * 2009-11-18 2012-07-11 上海华虹Nec电子有限公司 SiGe BiCMOS工艺中的SiGe PNP双极晶体管
CN102087977B (zh) 2009-12-04 2012-04-18 无锡华润上华半导体有限公司 垂直npn晶体管及其制造方法
CN102097465B (zh) * 2009-12-15 2012-11-07 上海华虹Nec电子有限公司 BiCMOS工艺中的寄生垂直型PNP三极管及其制造方法
CN102110709B (zh) * 2009-12-24 2012-08-01 上海华虹Nec电子有限公司 BiCMOS工艺中的寄生垂直型PNP三极管及其制造方法
IT1401755B1 (it) 2010-08-30 2013-08-02 St Microelectronics Srl Dispositivo elettronico integrato a conduzione verticale e relativo metodo di fabbricazione.
IT1401756B1 (it) 2010-08-30 2013-08-02 St Microelectronics Srl Dispositivo elettronico integrato con struttura di terminazione di bordo e relativo metodo di fabbricazione.
IT1401754B1 (it) 2010-08-30 2013-08-02 St Microelectronics Srl Dispositivo elettronico integrato e relativo metodo di fabbricazione.
CN102403344B (zh) * 2010-09-10 2013-09-11 上海华虹Nec电子有限公司 锗硅BiCMOS工艺中的寄生PNP双极晶体管
US8492794B2 (en) * 2011-03-15 2013-07-23 International Business Machines Corporation Vertical polysilicon-germanium heterojunction bipolar transistor
DE102011108334B4 (de) * 2011-07-25 2016-05-25 Texas Instruments Deutschland Gmbh Elektronische Vorrichtung und Verfahren zum Erhöhen der Zuverlässigkeit von Bipolartransistoren unter Hochspannungsbedingungen
CN103107087B (zh) * 2011-11-09 2015-10-14 上海华虹宏力半导体制造有限公司 与锗硅异质结npn三极管集成的pnp三极管的制造方法
US8716096B2 (en) 2011-12-13 2014-05-06 International Business Machines Corporation Self-aligned emitter-base in advanced BiCMOS technology
CN102766908B (zh) * 2012-07-25 2016-02-24 苏州阿特斯阳光电力科技有限公司 晶体硅太阳能电池的硼扩散方法
US10006365B2 (en) 2015-06-30 2018-06-26 General Electric Company Air supply and conditioning system for a gas turbine
CN107887430A (zh) * 2017-11-09 2018-04-06 重庆邮电大学 衬底施加单轴应力的硅锗异质结双极晶体管及其制造方法

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4761641A (en) * 1983-01-21 1988-08-02 Vidcom Rentservice B.V. Information display system
JP2600485B2 (ja) * 1990-11-28 1997-04-16 日本電気株式会社 半導体装置
JPH05102177A (ja) * 1991-10-02 1993-04-23 Hitachi Ltd 半導体集積回路装置及びこれを用いた電子計算機
JPH05182980A (ja) 1992-01-07 1993-07-23 Toshiba Corp ヘテロ接合バイポーラトランジスタ
JP2582519B2 (ja) * 1992-07-13 1997-02-19 インターナショナル・ビジネス・マシーンズ・コーポレイション バイポーラ・トランジスタおよびその製造方法
GB9315448D0 (en) * 1993-07-26 1993-09-08 Rank Xerox Ltd Recording and retrieval of information relevant to the activities of a user
JP2551364B2 (ja) * 1993-11-26 1996-11-06 日本電気株式会社 半導体装置
JP2746225B2 (ja) 1995-10-16 1998-05-06 日本電気株式会社 半導体装置及びその製造方法
EP0818829A1 (en) * 1996-07-12 1998-01-14 Hitachi, Ltd. Bipolar transistor and method of fabricating it
JPH11102177A (ja) 1997-09-25 1999-04-13 Canon Inc 書体データ作成装置と書体データの作成方法、及び記憶媒体
JP3301390B2 (ja) 1998-08-13 2002-07-15 日本電気株式会社 ヘテロ接合バイポーラトランジスタを備えた半導体装置およびその製造方法
US6954859B1 (en) * 1999-10-08 2005-10-11 Axcess, Inc. Networked digital security system and methods
US20030058111A1 (en) * 2001-09-27 2003-03-27 Koninklijke Philips Electronics N.V. Computer vision based elderly care monitoring system
US7436887B2 (en) * 2002-02-06 2008-10-14 Playtex Products, Inc. Method and apparatus for video frame sequence-based object tracking
US20080129495A1 (en) * 2002-10-28 2008-06-05 Hitt Dale K Wireless sensor system for environmental monitoring and control
US20060018516A1 (en) * 2004-07-22 2006-01-26 Masoud Osama T Monitoring activity using video information

Also Published As

Publication number Publication date
EP1263052A2 (en) 2002-12-04
US20030006484A1 (en) 2003-01-09
CN1224109C (zh) 2005-10-19
US6828602B2 (en) 2004-12-07
WO2001091162A2 (en) 2001-11-29
CN1398432A (zh) 2003-02-19
JP2001332563A (ja) 2001-11-30
US6939772B2 (en) 2005-09-06
WO2001091162A3 (en) 2002-07-04
US20040251473A1 (en) 2004-12-16

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Date Code Title Description
PA0105 International application

Patent event date: 20020123

Patent event code: PA01051R01D

Comment text: International Patent Application

PG1501 Laying open of application
PC1203 Withdrawal of no request for examination
WITN Application deemed withdrawn, e.g. because no request for examination was filed or no examination fee was paid