KR101328862B1 - 반도체집적회로장치 및 반도체집적회로장치의 제조 방법 - Google Patents

반도체집적회로장치 및 반도체집적회로장치의 제조 방법 Download PDF

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KR101328862B1
KR101328862B1 KR1020060063325A KR20060063325A KR101328862B1 KR 101328862 B1 KR101328862 B1 KR 101328862B1 KR 1020060063325 A KR1020060063325 A KR 1020060063325A KR 20060063325 A KR20060063325 A KR 20060063325A KR 101328862 B1 KR101328862 B1 KR 101328862B1
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film
interlayer insulating
insulating film
via hole
forming
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KR20070005519A (ko
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카츠히코 홋타
쿄코 사사하라
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르네사스 일렉트로닉스 가부시키가이샤
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    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
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    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
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    • H10W20/081—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
    • H10W20/084—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts for dual-damascene structures
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    • H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
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    • H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
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    • H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
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    • H10W20/45—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their insulating parts
    • H10W20/47—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their insulating parts comprising two or more dielectric layers having different properties, e.g. different dielectric constants
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  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Physics & Mathematics (AREA)
  • Geometry (AREA)
  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Drying Of Semiconductors (AREA)
KR1020060063325A 2005-07-06 2006-07-06 반도체집적회로장치 및 반도체집적회로장치의 제조 방법 Active KR101328862B1 (ko)

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Application Number Priority Date Filing Date Title
JP2005197938A JP5096669B2 (ja) 2005-07-06 2005-07-06 半導体集積回路装置の製造方法
JPJP-P-2005-00197938 2005-07-06

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KR1020110054737A Division KR101344146B1 (ko) 2005-07-06 2011-06-07 반도체집적회로장치 및 반도체집적회로장치의 제조 방법

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KR20070005519A KR20070005519A (ko) 2007-01-10
KR101328862B1 true KR101328862B1 (ko) 2013-11-13

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KR1020110054737A Active KR101344146B1 (ko) 2005-07-06 2011-06-07 반도체집적회로장치 및 반도체집적회로장치의 제조 방법

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US (18) US7354855B2 (https=)
JP (1) JP5096669B2 (https=)
KR (2) KR101328862B1 (https=)
CN (2) CN100559565C (https=)
TW (3) TWI389254B (https=)

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