FR2748601B1 - Procede de formation d'interconnexions dans un circuit integre - Google Patents

Procede de formation d'interconnexions dans un circuit integre

Info

Publication number
FR2748601B1
FR2748601B1 FR9606018A FR9606018A FR2748601B1 FR 2748601 B1 FR2748601 B1 FR 2748601B1 FR 9606018 A FR9606018 A FR 9606018A FR 9606018 A FR9606018 A FR 9606018A FR 2748601 B1 FR2748601 B1 FR 2748601B1
Authority
FR
France
Prior art keywords
integrated circuit
forming interconnections
interconnections
forming
integrated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR9606018A
Other languages
English (en)
Other versions
FR2748601A1 (fr
Inventor
Constantin Papadas
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SA
Original Assignee
SGS Thomson Microelectronics SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SGS Thomson Microelectronics SA filed Critical SGS Thomson Microelectronics SA
Priority to FR9606018A priority Critical patent/FR2748601B1/fr
Priority to EP97410048A priority patent/EP0806799B1/fr
Priority to DE69728205T priority patent/DE69728205T2/de
Priority to US08/851,803 priority patent/US5851919A/en
Publication of FR2748601A1 publication Critical patent/FR2748601A1/fr
Priority to US09/118,291 priority patent/US6051884A/en
Application granted granted Critical
Publication of FR2748601B1 publication Critical patent/FR2748601B1/fr
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
    • H01L21/32135—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
    • H01L21/32136—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76822—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc.
    • H01L21/76823—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc. transforming an insulating layer into a conductive layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H01L21/76834—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers formation of thin insulating films on the sidewalls or on top of conductors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/5329—Insulating materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S257/00—Active solid-state devices, e.g. transistors, solid-state diodes
    • Y10S257/921—Radiation hardened semiconductor device
FR9606018A 1996-05-07 1996-05-07 Procede de formation d'interconnexions dans un circuit integre Expired - Fee Related FR2748601B1 (fr)

Priority Applications (5)

Application Number Priority Date Filing Date Title
FR9606018A FR2748601B1 (fr) 1996-05-07 1996-05-07 Procede de formation d'interconnexions dans un circuit integre
EP97410048A EP0806799B1 (fr) 1996-05-07 1997-05-02 Procédé de formation d'interconnexions dans un circuit intégré
DE69728205T DE69728205T2 (de) 1996-05-07 1997-05-02 Herstellungsverfahren von Verbindungen in einer integrierten Schaltung
US08/851,803 US5851919A (en) 1996-05-07 1997-05-06 Method for forming interconnections in an integrated circuit
US09/118,291 US6051884A (en) 1996-05-07 1998-07-17 Method of forming interconnections in an integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR9606018A FR2748601B1 (fr) 1996-05-07 1996-05-07 Procede de formation d'interconnexions dans un circuit integre

Publications (2)

Publication Number Publication Date
FR2748601A1 FR2748601A1 (fr) 1997-11-14
FR2748601B1 true FR2748601B1 (fr) 1998-07-24

Family

ID=9492137

Family Applications (1)

Application Number Title Priority Date Filing Date
FR9606018A Expired - Fee Related FR2748601B1 (fr) 1996-05-07 1996-05-07 Procede de formation d'interconnexions dans un circuit integre

Country Status (4)

Country Link
US (2) US5851919A (fr)
EP (1) EP0806799B1 (fr)
DE (1) DE69728205T2 (fr)
FR (1) FR2748601B1 (fr)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6207553B1 (en) * 1999-01-26 2001-03-27 Advanced Micro Devices, Inc. Method of forming multiple levels of patterned metallization
US7265448B2 (en) * 2004-01-26 2007-09-04 Marvell World Trade Ltd. Interconnect structure for power transistors
US7851872B2 (en) * 2003-10-22 2010-12-14 Marvell World Trade Ltd. Efficient transistor structure
US7960833B2 (en) * 2003-10-22 2011-06-14 Marvell World Trade Ltd. Integrated circuits and interconnect structure for integrated circuits
US8319307B1 (en) 2004-11-19 2012-11-27 Voxtel, Inc. Active pixel sensors with variable threshold reset
US8461628B2 (en) * 2005-03-18 2013-06-11 Kovio, Inc. MOS transistor with laser-patterned metal gate, and method for making the same
JP5096669B2 (ja) 2005-07-06 2012-12-12 ルネサスエレクトロニクス株式会社 半導体集積回路装置の製造方法
JP2009509322A (ja) 2005-09-15 2009-03-05 エヌエックスピー ビー ヴィ 半導体装置用構造およびその製造方法
US7425910B1 (en) 2006-02-27 2008-09-16 Marvell International Ltd. Transmitter digital-to-analog converter with noise shaping
WO2014036241A2 (fr) * 2012-08-30 2014-03-06 Sensevere, Llc Composants électroniques résistant à la corrosion
KR101936846B1 (ko) * 2012-10-24 2019-01-11 에스케이하이닉스 주식회사 반도체 소자 및 그 제조방법

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3553533A (en) * 1964-05-14 1971-01-05 Texas Instruments Inc Dielectric bodies with selectively formed conductive or metallic portions, composites thereof with semiconductor material and methods of making said bodies and composites
EP0072690A3 (fr) * 1981-08-17 1983-11-09 Fujitsu Limited Dispositif MIS et procédé pour sa fabrication
JPS58207699A (ja) * 1982-05-28 1983-12-03 株式会社日立製作所 配線回路基板の製造方法
US5459098A (en) * 1992-10-19 1995-10-17 Marietta Energy Systems, Inc. Maskless laser writing of microscopic metallic interconnects
US5517031A (en) * 1994-06-21 1996-05-14 General Electric Company Solid state imager with opaque layer
US5559055A (en) * 1994-12-21 1996-09-24 Advanced Micro Devices, Inc. Method of decreased interlayer dielectric constant in a multilayer interconnect structure to increase device speed performance
US5627094A (en) * 1995-12-04 1997-05-06 Chartered Semiconductor Manufacturing Pte, Ltd. Stacked container capacitor using chemical mechanical polishing

Also Published As

Publication number Publication date
US6051884A (en) 2000-04-18
DE69728205D1 (de) 2004-04-29
DE69728205T2 (de) 2005-02-17
EP0806799B1 (fr) 2004-03-24
EP0806799A1 (fr) 1997-11-12
US5851919A (en) 1998-12-22
FR2748601A1 (fr) 1997-11-14

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Legal Events

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Effective date: 20060131