KR100944886B1 - 반도체 장치의 제조 방법 - Google Patents
반도체 장치의 제조 방법 Download PDFInfo
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- KR100944886B1 KR100944886B1 KR1020020066205A KR20020066205A KR100944886B1 KR 100944886 B1 KR100944886 B1 KR 100944886B1 KR 1020020066205 A KR1020020066205 A KR 1020020066205A KR 20020066205 A KR20020066205 A KR 20020066205A KR 100944886 B1 KR100944886 B1 KR 100944886B1
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- H—ELECTRICITY
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- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
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- H01L21/76264—SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
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- H—ELECTRICITY
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
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- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
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- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1218—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition or structure of the substrate
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
- H01L27/1262—Multistep manufacturing methods with a particular formation, treatment or coating of the substrate
- H01L27/1266—Multistep manufacturing methods with a particular formation, treatment or coating of the substrate the substrate on which the devices are formed not being the final device substrate, e.g. using a temporary substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78603—Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the insulating substrate or support
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
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- H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
- H10K71/50—Forming devices by joining two substrates together, e.g. lamination techniques
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Abstract
Description
Claims (30)
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- 반도체 장치의 제조 방법에 있어서,제 1 기판 위에 반도체 소자를 포함하는 박리된 층을 형성하는 단계;상기 제 1 기판과 제 2 기판 사이에 상기 박리된 층을 개재하기 위해 제 1 접착제를 사용하여 상기 박리된 층에 상기 제 2 기판을 접착시키는 단계;상기 박리된 층으로부터 상기 제 1 기판을 분리하는 단계;상기 제 2 기판과 제 3 기판 사이에 상기 박리된 층을 개재하기 위해 제 2 접착제를 사용하여 상기 박리된 층에 상기 제 3 기판을 접착시키는 단계; 및상기 제 2 접착제를 지지체로서 사용하는 상기 박리된 층을 형성하기 위해, 상기 박리된 층으로부터 상기 제 2 기판을 분리하고, 상기 제 2 접착제로부터 상기 제 3 기판을 분리하는 단계를 포함하는, 반도체 장치의 제조 방법.
- 반도체 장치의 제조 방법에 있어서,제 1 기판 위에 반도체 소자를 포함하는 박리된 층을 형성하는 단계;상기 제 1 기판과 제 2 기판 사이에 상기 박리된 층을 개재하기 위해 제 1 접착제를 사용하여 상기 박리된 층에 상기 제 2 기판을 접착시키는 단계;상기 박리된 층으로부터 상기 제 1 기판을 분리하는 단계;상기 제 2 기판과 제 3 기판 사이에 상기 박리된 층을 개재하기 위해 제 2 접착제를 사용하여 상기 박리된 층에 상기 제 3 기판을 접착시키는 단계; 및상기 제 1 및 제 2 접착제들을 지지체로서 사용하는 상기 박리된 층을 형성하기 위해, 상기 박리된 층으로부터 상기 제 3 기판을 분리하고, 상기 박리된 층으로부터 상기 제 2 기판을 분리하는 단계를 포함하는, 반도체 장치의 제조 방법.
- 반도체 장치의 제조 방법에 있어서,제 1 기판 위에 반도체 소자를 포함하는 박리된 층을 형성하는 단계;상기 제 1 기판과 제 2 기판 사이에 상기 박리된 층을 개재하기 위해 제 1 접착제를 사용하여 상기 박리된 층에 상기 제 2 기판을 접착시키는 단계;상기 박리된 층으로부터 상기 제 1 기판을 분리하는 단계;상기 제 2 기판과 제 3 기판 사이에 상기 박리된 층을 개재하기 위해 제 2 접착제를 사용하여 상기 박리된 층에 상기 제 3 기판을 접착시키는 단계; 및상기 제 2 접착제 및 상기 제 3 기판을 지지체로서 사용하는 상기 박리된 층을 형성하기 위해 상기 박리된 층으로부터 상기 제 2 기판을 분리하는 단계를 포함하는, 반도체 장치의 제조 방법.
- 반도체 장치의 제조 방법에 있어서,제 1 기판 위에 반도체 소자를 포함하는 박리된 층을 형성하는 단계;상기 제 1 기판과 제 2 기판 사이에 상기 박리된 층을 개재하기 위해 제 1 접착제를 사용하여 상기 박리된 층에 상기 제 2 기판을 접착시키는 단계;상기 박리된 층으로부터 상기 제 1 기판을 분리하는 단계;상기 제 2 기판과 제 3 기판 사이에 상기 박리된 층을 개재하기 위해 제 2 접착제를 사용하여 상기 박리된 층에 보호막이 형성되는 상기 제 3 기판을 접착시키는 단계; 및상기 제 2 접착제 및 상기 보호막을 지지체로서 사용하는 상기 박리된 층을 형성하기 위해, 상기 박리된 층으로부터 상기 제 2 기판을 분리하고, 상기 제 2 접착제로부터 상기 제 3 기판을 분리하는 단계를 포함하는, 반도체 장치의 제조 방법.
- 제 8 항 내지 제 11 항 중 어느 한 항에 있어서,상기 제 2 기판은 용매에 상기 제 1 접착제를 용해시킴으로써 상기 박리된 층으로부터 분리되는, 반도체 장치의 제조 방법.
- 제 8 항 내지 제 10 항 중 어느 한 항에 있어서,상기 제 2 접착제는 상기 제 3 기판에 대한 접착력보다 강한 접착력으로 상기 박리된 층에 접착되는, 반도체 장치의 제조 방법.
- 제 8 항 내지 제 11 항 중 어느 한 항에 있어서,상기 제 1 접착제는 감광성 접착제이고, 상기 제 2 기판은 상기 제 1 접착제에 광을 조사함으로써 상기 박리된 층으로부터 분리되는, 반도체 장치의 제조 방법.
- 제 8 항, 제 9 항, 또는 제 11 항 중 어느 한 항에 있어서,상기 제 2 접착제는 감광성 접착제이고, 상기 제 3 기판은 상기 제 2 접착제에 광을 조사함으로써 상기 제 2 접착제로부터 분리되는, 반도체 장치의 제조 방법.
- 제 8 항 내지 제 11 항 중 어느 한 항에 있어서,상기 제 2 기판은 유리 기판, 석영 기판, 및 금속 기판 중 하나이고, 상기 제 3 기판은 플라스틱 기판인, 반도체 장치의 제조 방법.
- 제 8 항 내지 제 11 항 중 어느 한 항에 있어서,상기 제 3 기판은 표면 상에 질화 산화 알루미늄 막이 형성된 플라스틱 막인, 반도체 장치의 제조 방법.
- 제 9 항에 있어서,상기 제 1 접착제는 상기 제 2 기판에 대한 접착력보다 강한 접착력으로 상기 박리된 층에 접착되는, 반도체 장치의 제조 방법.
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- 제 8 항 내지 제 11 항 중 어느 한 항에 있어서,상기 제 1 기판은 유리 기판, 석영 기판, 및 금속 기판 중 하나인, 반도체 장치의 제조 방법.
- 제 9 항에 있어서,상기 제 2 기판은 표면 상에 질화 산화 알루미늄 막이 형성된 플라스틱 막인, 반도체 장치의 제조 방법.
- 제 10 항에 있어서,상기 제 1 기판 및 상기 제 2 기판의 각각의 재료는 상기 제 3 기판의 강도보다 높은 강도를 갖는, 반도체 장치의 제조 방법.
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- 제 11 항에 있어서,상기 보호막은 실리콘 질화물 막 또는 실리콘 산화질화물 막인, 반도체 장치의 제조 방법.
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CN1288710C (zh) | 2006-12-06 |
KR20090094203A (ko) | 2009-09-04 |
US20170207114A1 (en) | 2017-07-20 |
TW594947B (en) | 2004-06-21 |
US8980700B2 (en) | 2015-03-17 |
US7332381B2 (en) | 2008-02-19 |
JP2004153021A (ja) | 2004-05-27 |
CN1945856B (zh) | 2013-06-19 |
CN1417841A (zh) | 2003-05-14 |
US10607883B2 (en) | 2020-03-31 |
TW200300281A (en) | 2003-05-16 |
US7648862B2 (en) | 2010-01-19 |
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US20070212853A1 (en) | 2007-09-13 |
JP4015003B2 (ja) | 2007-11-28 |
KR100985012B1 (ko) | 2010-10-04 |
US7994506B2 (en) | 2011-08-09 |
KR20030036005A (ko) | 2003-05-09 |
US20110284858A1 (en) | 2011-11-24 |
JP2003204049A (ja) | 2003-07-18 |
US9620408B2 (en) | 2017-04-11 |
US20030082889A1 (en) | 2003-05-01 |
JP4015002B2 (ja) | 2007-11-28 |
CN1945856A (zh) | 2007-04-11 |
US20200294848A1 (en) | 2020-09-17 |
US20100148179A1 (en) | 2010-06-17 |
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