KR100875068B1 - 반도체 장치 및 그 제조 방법 - Google Patents

반도체 장치 및 그 제조 방법 Download PDF

Info

Publication number
KR100875068B1
KR100875068B1 KR1020020018443A KR20020018443A KR100875068B1 KR 100875068 B1 KR100875068 B1 KR 100875068B1 KR 1020020018443 A KR1020020018443 A KR 1020020018443A KR 20020018443 A KR20020018443 A KR 20020018443A KR 100875068 B1 KR100875068 B1 KR 100875068B1
Authority
KR
South Korea
Prior art keywords
film
conductive
contact
insulating film
contact hole
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
KR1020020018443A
Other languages
English (en)
Korean (ko)
Other versions
KR20030039991A (ko
Inventor
사시다나오야
Original Assignee
후지쯔 마이크로일렉트로닉스 가부시키가이샤
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 후지쯔 마이크로일렉트로닉스 가부시키가이샤 filed Critical 후지쯔 마이크로일렉트로닉스 가부시키가이샤
Publication of KR20030039991A publication Critical patent/KR20030039991A/ko
Application granted granted Critical
Publication of KR100875068B1 publication Critical patent/KR100875068B1/ko
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841—Barrier, adhesion or liner layers
    • H01L21/7687—Thin films associated with contacts of capacitors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B53/00—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B53/00—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors
    • H10B53/30—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors characterised by the memory core region
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D1/00—Resistors, capacitors or inductors
    • H10D1/60—Capacitors
    • H10D1/68—Capacitors having no potential barriers
    • H10D1/682—Capacitors having no potential barriers having dielectrics comprising perovskite structures
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D1/00—Resistors, capacitors or inductors
    • H10D1/60—Capacitors
    • H10D1/68—Capacitors having no potential barriers
    • H10D1/692—Electrodes

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Semiconductor Memories (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
KR1020020018443A 2001-11-15 2002-04-04 반도체 장치 및 그 제조 방법 Expired - Fee Related KR100875068B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JPJP-P-2001-00350323 2001-11-15
JP2001350323A JP2003152165A (ja) 2001-11-15 2001-11-15 半導体装置およびその製造方法

Publications (2)

Publication Number Publication Date
KR20030039991A KR20030039991A (ko) 2003-05-22
KR100875068B1 true KR100875068B1 (ko) 2008-12-18

Family

ID=19162850

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020020018443A Expired - Fee Related KR100875068B1 (ko) 2001-11-15 2002-04-04 반도체 장치 및 그 제조 방법

Country Status (5)

Country Link
US (2) US7456454B2 (enExample)
EP (1) EP1313141B1 (enExample)
JP (1) JP2003152165A (enExample)
KR (1) KR100875068B1 (enExample)
TW (1) TWI304259B (enExample)

Families Citing this family (36)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3910907B2 (ja) * 2002-10-29 2007-04-25 新光電気工業株式会社 キャパシタ素子及びこの製造方法、半導体装置用基板、並びに半導体装置
US7727588B2 (en) * 2003-09-05 2010-06-01 Yield Engineering Systems, Inc. Apparatus for the efficient coating of substrates
JP4522088B2 (ja) * 2003-12-22 2010-08-11 富士通セミコンダクター株式会社 半導体装置の製造方法
JP2005229001A (ja) * 2004-02-16 2005-08-25 Toshiba Corp 半導体装置及び半導体装置の製造方法
WO2005081317A1 (ja) * 2004-02-19 2005-09-01 Fujitsu Limited 半導体装置の製造方法
JP4800627B2 (ja) * 2004-03-24 2011-10-26 セイコーエプソン株式会社 強誘電体メモリ素子
JP4049119B2 (ja) * 2004-03-26 2008-02-20 セイコーエプソン株式会社 強誘電体メモリ素子の製造方法
JP4284228B2 (ja) * 2004-04-19 2009-06-24 株式会社東芝 半導体装置の製造方法
JP4904671B2 (ja) * 2004-06-24 2012-03-28 日本電気株式会社 半導体装置、その製造方法及び電子機器
CN100431155C (zh) * 2004-06-28 2008-11-05 富士通株式会社 半导体器件及其制造方法
JP4803995B2 (ja) * 2004-06-28 2011-10-26 富士通セミコンダクター株式会社 半導体装置及びその製造方法
WO2006011196A1 (ja) * 2004-07-27 2006-02-02 Fujitsu Limited 半導体装置とその製造方法
JP4785030B2 (ja) * 2005-01-18 2011-10-05 富士通セミコンダクター株式会社 半導体装置とその製造方法
JP2006261443A (ja) * 2005-03-17 2006-09-28 Fujitsu Ltd 半導体装置及びその製造方法
CN101203957B (zh) 2005-06-17 2011-03-30 富士通半导体股份有限公司 半导体装置的制造方法
US7579623B2 (en) * 2005-07-22 2009-08-25 Translucent, Inc. Stacked transistors and process
JP2007067066A (ja) * 2005-08-30 2007-03-15 Toshiba Corp 半導体装置とその製造方法
JP4935680B2 (ja) * 2005-11-25 2012-05-23 富士通セミコンダクター株式会社 半導体装置の製造方法
CN101322241A (zh) * 2005-11-29 2008-12-10 富士通株式会社 半导体器件及其制造方法
JP2007165350A (ja) 2005-12-09 2007-06-28 Fujitsu Ltd 半導体装置の製造方法
JP4838613B2 (ja) * 2006-03-28 2011-12-14 富士通セミコンダクター株式会社 半導体装置の製造方法
JP4882548B2 (ja) 2006-06-30 2012-02-22 富士通セミコンダクター株式会社 半導体装置及びその製造方法
JP2008010758A (ja) 2006-06-30 2008-01-17 Fujitsu Ltd 半導体装置及びその製造方法
KR100801202B1 (ko) * 2006-07-31 2008-02-05 후지쯔 가부시끼가이샤 반도체 장치의 제조 방법
WO2008111188A1 (ja) 2007-03-14 2008-09-18 Fujitsu Microelectronics Limited 半導体装置及びその製造方法
WO2008126197A1 (ja) * 2007-03-20 2008-10-23 Fujitsu Microelectronics Limited 半導体装置の製造方法
KR20090080751A (ko) * 2008-01-22 2009-07-27 삼성전자주식회사 저항성 메모리 소자 및 그 제조방법
EP2139054A3 (en) * 2008-06-25 2011-08-31 Samsung Electronics Co., Ltd. Memory device and method of manufacturing the same
US9536822B2 (en) * 2008-10-13 2017-01-03 Texas Instruments Incorporated Drawn dummy FeCAP, via and metal structures
CN102237309B (zh) * 2010-05-06 2013-06-12 复旦大学 氧化锰基电阻型存储器与铜互连后端工艺集成的方法
US8395196B2 (en) * 2010-11-16 2013-03-12 International Business Machines Corporation Hydrogen barrier liner for ferro-electric random access memory (FRAM) chip
KR101742817B1 (ko) * 2011-08-23 2017-06-02 삼성전자 주식회사 반도체 소자 및 그 제조 방법
JP2015072998A (ja) * 2013-10-02 2015-04-16 富士通株式会社 強誘電体メモリ及びその製造方法
JP6725109B2 (ja) * 2016-08-30 2020-07-15 住友電工デバイス・イノベーション株式会社 半導体装置
US10861929B2 (en) * 2018-06-27 2020-12-08 Taiwan Semiconductor Manufacturing Co., Ltd. Electronic device including a capacitor
CN116093068A (zh) * 2021-11-08 2023-05-09 联华电子股份有限公司 单次可编程存储器电容结构及其制作方法

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11135736A (ja) 1997-10-31 1999-05-21 Nec Corp 半導体装置及びその製造方法
JP2001040477A (ja) 1999-06-11 2001-02-13 Applied Materials Inc 窒化チタンの厚膜を堆積する方法
US20010018237A1 (en) 2000-01-13 2001-08-30 Walter Hartner Method for fabricating a nonvolatile dram memory cell

Family Cites Families (50)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4884123A (en) * 1987-02-19 1989-11-28 Advanced Micro Devices, Inc. Contact plug and interconnect employing a barrier lining and a backfilled conductor material
JP3185220B2 (ja) * 1990-09-28 2001-07-09 セイコーエプソン株式会社 半導体装置
KR960005248B1 (ko) * 1991-10-24 1996-04-23 마쯔시다덴기산교 가부시기가이샤 반도체기억장치 및 그 제조방법
US5354712A (en) * 1992-11-12 1994-10-11 Northern Telecom Limited Method for forming interconnect structures for integrated circuits
EP0738014B1 (en) * 1993-08-05 2003-10-15 Matsushita Electric Industrial Co., Ltd. Manufacturing method of semiconductor device having high dielectric constant capacitor
US5340370A (en) * 1993-11-03 1994-08-23 Intel Corporation Slurries for chemical mechanical polishing
KR100281723B1 (ko) * 1995-05-30 2001-10-22 코트게리 연마방법및그장치
JP3417167B2 (ja) * 1995-09-29 2003-06-16 ソニー株式会社 半導体メモリ素子のキャパシタ構造及びその形成方法
US5716875A (en) * 1996-03-01 1998-02-10 Motorola, Inc. Method for making a ferroelectric device
JPH09260600A (ja) * 1996-03-19 1997-10-03 Sharp Corp 半導体メモリ素子の製造方法
KR100200704B1 (ko) * 1996-06-07 1999-06-15 윤종용 강유전체 메모리 장치 및 그 제조 방법
EP0837504A3 (en) * 1996-08-20 1999-01-07 Ramtron International Corporation Partially or completely encapsulated ferroelectric device
JP3587004B2 (ja) * 1996-11-05 2004-11-10 ソニー株式会社 半導体メモリセルのキャパシタ構造及びその作製方法
JP3157734B2 (ja) * 1997-02-03 2001-04-16 松下電子工業株式会社 強誘電体メモリ装置及びその製造方法
JP3019021B2 (ja) * 1997-03-31 2000-03-13 日本電気株式会社 半導体装置及びその製造方法
US5933758A (en) * 1997-05-12 1999-08-03 Motorola, Inc. Method for preventing electroplating of copper on an exposed surface at the edge exclusion of a semiconductor wafer
SG74643A1 (en) * 1997-07-24 2000-08-22 Matsushita Electronics Corp Semiconductor device and method for fabricating the same
KR100261017B1 (ko) * 1997-08-19 2000-08-01 윤종용 반도체 장치의 금속 배선층을 형성하는 방법
JPH1187633A (ja) 1997-09-02 1999-03-30 Fujitsu Ltd 半導体装置の製造方法
TW367585B (en) * 1997-12-19 1999-08-21 Promos Technologies Inc Method for completely removing the titanium nitride residuals outside the integrated circuit contacts
JPH11204742A (ja) * 1998-01-20 1999-07-30 Sony Corp メモリ及び情報機器
KR100279297B1 (ko) 1998-06-20 2001-02-01 윤종용 반도체 장치 및 그의 제조 방법
JP2000156470A (ja) 1998-06-26 2000-06-06 Nec Corp 強誘電体記憶素子、記憶装置およびそれらの製造方法
JP3267555B2 (ja) * 1998-06-26 2002-03-18 株式会社東芝 強誘電体キャパシタ、強誘電体メモリ、及び、強誘電体キャパシタの製造方法
KR100292819B1 (ko) * 1998-07-07 2001-09-17 윤종용 커패시터및그의제조방법
JP2000036568A (ja) * 1998-07-17 2000-02-02 Toshiba Corp 半導体記憶装置及びその製造方法
KR100331545B1 (ko) * 1998-07-22 2002-04-06 윤종용 다단계 화학 기상 증착 방법에 의한 다층 질화티타늄막 형성방법및 이를 이용한 반도체 소자의 제조방법
US6586790B2 (en) * 1998-07-24 2003-07-01 Kabushiki Kaisha Toshiba Semiconductor device and method for manufacturing the same
US6004188A (en) * 1998-09-10 1999-12-21 Chartered Semiconductor Manufacturing Ltd. Method for forming copper damascene structures by using a dual CMP barrier layer
US6249014B1 (en) * 1998-10-01 2001-06-19 Ramtron International Corporation Hydrogen barrier encapsulation techniques for the control of hydrogen induced degradation of ferroelectric capacitors in conjunction with multilevel metal processing for non-volatile integrated circuit memory devices
US6010962A (en) * 1999-02-12 2000-01-04 Taiwan Semiconductor Manufacturing Company Copper chemical-mechanical-polishing (CMP) dishing
US6242299B1 (en) * 1999-04-01 2001-06-05 Ramtron International Corporation Barrier layer to protect a ferroelectric capacitor after contact has been made to the capacitor electrode
TW472384B (en) 1999-06-17 2002-01-11 Fujitsu Ltd Semiconductor device and method of manufacturing the same
JP3260737B2 (ja) 1999-06-17 2002-02-25 富士通株式会社 半導体装置の製造方法
US6429088B1 (en) * 1999-12-20 2002-08-06 Chartered Semiconductor Manufacturing Ltd. Method of fabricating improved capacitors with pinhole repair consideration when oxide conductors are used
US6485988B2 (en) * 1999-12-22 2002-11-26 Texas Instruments Incorporated Hydrogen-free contact etch for ferroelectric capacitor formation
US6534809B2 (en) * 1999-12-22 2003-03-18 Agilent Technologies, Inc. Hardmask designs for dry etching FeRAM capacitor stacks
KR100353804B1 (ko) * 1999-12-28 2002-09-26 주식회사 하이닉스반도체 반도체 소자의 강유전체 캐패시터 형성방법
KR100357224B1 (ko) * 2000-02-08 2002-10-19 주식회사 하이닉스반도체 컨택 플러그 제조 방법
DE10065976A1 (de) * 2000-02-25 2002-02-21 Infineon Technologies Ag Verfahren zur Herstellung eines Halbleiterbauelements
JP3907921B2 (ja) 2000-06-19 2007-04-18 富士通株式会社 半導体装置の製造方法
US6329234B1 (en) * 2000-07-24 2001-12-11 Taiwan Semiconductor Manufactuirng Company Copper process compatible CMOS metal-insulator-metal capacitor structure and its process flow
JP2002057123A (ja) * 2000-08-10 2002-02-22 Mitsubishi Electric Corp 半導体装置およびその製造方法
EP1323189A2 (en) * 2000-09-13 2003-07-02 Shipley Company LLC Electronic device manufacture
JP2002100740A (ja) * 2000-09-21 2002-04-05 Oki Electric Ind Co Ltd 半導体記憶素子及びその製造方法
JP3581114B2 (ja) * 2001-06-27 2004-10-27 シャープ株式会社 拡散防止膜およびその製造方法および半導体記憶素子およびその製造方法
US7170176B2 (en) * 2003-11-04 2007-01-30 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
JP4308691B2 (ja) * 2004-03-19 2009-08-05 富士通マイクロエレクトロニクス株式会社 半導体基板および半導体基板の製造方法
US7170174B2 (en) * 2004-08-24 2007-01-30 Micron Technology, Inc. Contact structure and contact liner process
KR101184013B1 (ko) * 2006-09-27 2012-09-18 후지쯔 세미컨덕터 가부시키가이샤 커패시터를 갖는 반도체 장치 및 그 제조 방법

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11135736A (ja) 1997-10-31 1999-05-21 Nec Corp 半導体装置及びその製造方法
JP2001040477A (ja) 1999-06-11 2001-02-13 Applied Materials Inc 窒化チタンの厚膜を堆積する方法
US20010018237A1 (en) 2000-01-13 2001-08-30 Walter Hartner Method for fabricating a nonvolatile dram memory cell

Also Published As

Publication number Publication date
EP1313141A2 (en) 2003-05-21
US7456454B2 (en) 2008-11-25
TWI304259B (en) 2008-12-11
US7745232B2 (en) 2010-06-29
EP1313141B1 (en) 2014-05-14
JP2003152165A (ja) 2003-05-23
US20090068764A1 (en) 2009-03-12
US20030089954A1 (en) 2003-05-15
EP1313141A3 (en) 2005-05-04
KR20030039991A (ko) 2003-05-22

Similar Documents

Publication Publication Date Title
KR100875068B1 (ko) 반도체 장치 및 그 제조 방법
JP4308691B2 (ja) 半導体基板および半導体基板の製造方法
JP4025829B2 (ja) 半導体装置及びその製造方法
US6664578B2 (en) Ferroelectric memory device and method of forming the same
US8349679B2 (en) Semiconductor device and method of manufacturing the same
US7910968B2 (en) Semiconductor device and method for manufacturing the same
KR100725451B1 (ko) 강유전체 캐패시터의 제조 방법 및 이를 이용한 반도체장치의 제조 방법
KR20030091663A (ko) 반도체 장치 및 그 제조 방법
JP4846570B2 (ja) 半導体基板および半導体装置の製造方法
KR20010083237A (ko) 반도체기억장치
JP5024046B2 (ja) 半導体装置とその製造方法
JP4567026B2 (ja) 半導体装置の製造方法
KR100958606B1 (ko) 반도체 기판 및 그 제조 방법
KR100321690B1 (ko) 에프램 소자의 캐패시터 제조 방법
JP4282842B2 (ja) 半導体装置の製造方法
KR100490651B1 (ko) 강유전체 메모리 소자 및 그 제조방법
KR20020002613A (ko) 접촉 저항 증가 및 막의 들림을 효과적으로 방지할 수있는 반도체 메모리 소자 및 그 제조 방법
JP2004023079A (ja) 容量素子の製造方法
JP2007035947A (ja) 半導体装置及びその製造方法
KR20080102092A (ko) 강유전체 커패시터의 제조 방법

Legal Events

Date Code Title Description
PA0109 Patent application

St.27 status event code: A-0-1-A10-A12-nap-PA0109

PG1501 Laying open of application

St.27 status event code: A-1-1-Q10-Q12-nap-PG1501

A201 Request for examination
E13-X000 Pre-grant limitation requested

St.27 status event code: A-2-3-E10-E13-lim-X000

P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

PA0201 Request for examination

St.27 status event code: A-1-2-D10-D11-exm-PA0201

D13-X000 Search requested

St.27 status event code: A-1-2-D10-D13-srh-X000

D14-X000 Search report completed

St.27 status event code: A-1-2-D10-D14-srh-X000

E902 Notification of reason for refusal
PE0902 Notice of grounds for rejection

St.27 status event code: A-1-2-D10-D21-exm-PE0902

T11-X000 Administrative time limit extension requested

St.27 status event code: U-3-3-T10-T11-oth-X000

T11-X000 Administrative time limit extension requested

St.27 status event code: U-3-3-T10-T11-oth-X000

P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

E902 Notification of reason for refusal
PE0902 Notice of grounds for rejection

St.27 status event code: A-1-2-D10-D21-exm-PE0902

T11-X000 Administrative time limit extension requested

St.27 status event code: U-3-3-T10-T11-oth-X000

N231 Notification of change of applicant
P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

PN2301 Change of applicant

St.27 status event code: A-3-3-R10-R13-asn-PN2301

St.27 status event code: A-3-3-R10-R11-asn-PN2301

E701 Decision to grant or registration of patent right
PE0701 Decision of registration

St.27 status event code: A-1-2-D10-D22-exm-PE0701

GRNT Written decision to grant
PR0701 Registration of establishment

St.27 status event code: A-2-4-F10-F11-exm-PR0701

PR1002 Payment of registration fee

St.27 status event code: A-2-2-U10-U11-oth-PR1002

Fee payment year number: 1

PG1601 Publication of registration

St.27 status event code: A-4-4-Q10-Q13-nap-PG1601

R17-X000 Change to representative recorded

St.27 status event code: A-5-5-R10-R17-oth-X000

R18-X000 Changes to party contact information recorded

St.27 status event code: A-5-5-R10-R18-oth-X000

PN2301 Change of applicant

St.27 status event code: A-5-5-R10-R13-asn-PN2301

St.27 status event code: A-5-5-R10-R11-asn-PN2301

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 4

FPAY Annual fee payment

Payment date: 20121121

Year of fee payment: 5

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 5

FPAY Annual fee payment

Payment date: 20131118

Year of fee payment: 6

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 6

FPAY Annual fee payment

Payment date: 20141120

Year of fee payment: 7

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 7

R18-X000 Changes to party contact information recorded

St.27 status event code: A-5-5-R10-R18-oth-X000

FPAY Annual fee payment

Payment date: 20151118

Year of fee payment: 8

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 8

FPAY Annual fee payment

Payment date: 20161123

Year of fee payment: 9

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 9

FPAY Annual fee payment

Payment date: 20171117

Year of fee payment: 10

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 10

LAPS Lapse due to unpaid annual fee
PC1903 Unpaid annual fee

St.27 status event code: A-4-4-U10-U13-oth-PC1903

Not in force date: 20181213

Payment event data comment text: Termination Category : DEFAULT_OF_REGISTRATION_FEE

PC1903 Unpaid annual fee

St.27 status event code: N-4-6-H10-H13-oth-PC1903

Ip right cessation event data comment text: Termination Category : DEFAULT_OF_REGISTRATION_FEE

Not in force date: 20181213

P22-X000 Classification modified

St.27 status event code: A-4-4-P10-P22-nap-X000

P22-X000 Classification modified

St.27 status event code: A-4-4-P10-P22-nap-X000