JP6710032B2 - Aldにより形成される窒化シリコン膜の表面形状内ウェットエッチング速度を均一に低下させるための方法及び装置 - Google Patents
Aldにより形成される窒化シリコン膜の表面形状内ウェットエッチング速度を均一に低下させるための方法及び装置 Download PDFInfo
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- JP6710032B2 JP6710032B2 JP2015184688A JP2015184688A JP6710032B2 JP 6710032 B2 JP6710032 B2 JP 6710032B2 JP 2015184688 A JP2015184688 A JP 2015184688A JP 2015184688 A JP2015184688 A JP 2015184688A JP 6710032 B2 JP6710032 B2 JP 6710032B2
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- 229910052581 Si3N4 Inorganic materials 0.000 title claims description 172
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- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- 238000005240 physical vapour deposition Methods 0.000 description 1
- 238000001020 plasma etching Methods 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 229920000642 polymer Polymers 0.000 description 1
- DNAJDTIOMGISDS-UHFFFAOYSA-N prop-2-enylsilane Chemical compound [SiH3]CC=C DNAJDTIOMGISDS-UHFFFAOYSA-N 0.000 description 1
- YYVGYULIMDRZMJ-UHFFFAOYSA-N propan-2-ylsilane Chemical compound CC(C)[SiH3] YYVGYULIMDRZMJ-UHFFFAOYSA-N 0.000 description 1
- 125000001436 propyl group Chemical group [H]C([*])([H])C([H])([H])C([H])([H])[H] 0.000 description 1
- UMJSCPRVCHMLSP-UHFFFAOYSA-N pyridine Natural products COC1=CC=CN=C1 UMJSCPRVCHMLSP-UHFFFAOYSA-N 0.000 description 1
- 230000004044 response Effects 0.000 description 1
- 230000000717 retained effect Effects 0.000 description 1
- 239000000523 sample Substances 0.000 description 1
- 229920006395 saturated elastomer Polymers 0.000 description 1
- BHRZNVHARXXAHW-UHFFFAOYSA-N sec-butylamine Chemical compound CCC(C)N BHRZNVHARXXAHW-UHFFFAOYSA-N 0.000 description 1
- VUEONHALRNZYJM-UHFFFAOYSA-N silanetetramine Chemical compound N[Si](N)(N)N VUEONHALRNZYJM-UHFFFAOYSA-N 0.000 description 1
- 150000003377 silicon compounds Chemical class 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- 239000007921 spray Substances 0.000 description 1
- 238000005507 spraying Methods 0.000 description 1
- 230000006641 stabilisation Effects 0.000 description 1
- 238000011105 stabilization Methods 0.000 description 1
- 230000003068 static effect Effects 0.000 description 1
- 125000001424 substituent group Chemical group 0.000 description 1
- 230000001629 suppression Effects 0.000 description 1
- LFKDJXLFVYVEFG-UHFFFAOYSA-N tert-butyl carbamate Chemical compound CC(C)(C)OC(N)=O LFKDJXLFVYVEFG-UHFFFAOYSA-N 0.000 description 1
- BCNZYOJHNLTNEZ-UHFFFAOYSA-N tert-butyldimethylsilyl chloride Chemical compound CC(C)(C)[Si](C)(C)Cl BCNZYOJHNLTNEZ-UHFFFAOYSA-N 0.000 description 1
- CZDYPVPMEAXLPK-UHFFFAOYSA-N tetramethylsilane Chemical compound C[Si](C)(C)C CZDYPVPMEAXLPK-UHFFFAOYSA-N 0.000 description 1
- 238000002207 thermal evaporation Methods 0.000 description 1
- 230000009466 transformation Effects 0.000 description 1
- IBOKZQNMFSHYNQ-UHFFFAOYSA-N tribromosilane Chemical compound Br[SiH](Br)Br IBOKZQNMFSHYNQ-UHFFFAOYSA-N 0.000 description 1
- ZDHXKXAHOVTTAH-UHFFFAOYSA-N trichlorosilane Chemical compound Cl[SiH](Cl)Cl ZDHXKXAHOVTTAH-UHFFFAOYSA-N 0.000 description 1
- 239000005052 trichlorosilane Substances 0.000 description 1
- WDIWAJVQNKHNGJ-UHFFFAOYSA-N trimethyl(propan-2-yl)silane Chemical compound CC(C)[Si](C)(C)C WDIWAJVQNKHNGJ-UHFFFAOYSA-N 0.000 description 1
- PQDJYEQOELDLCP-UHFFFAOYSA-N trimethylsilane Chemical compound C[SiH](C)C PQDJYEQOELDLCP-UHFFFAOYSA-N 0.000 description 1
- GIRKRMUMWJFNRI-UHFFFAOYSA-N tris(dimethylamino)silicon Chemical compound CN(C)[Si](N(C)C)N(C)C GIRKRMUMWJFNRI-UHFFFAOYSA-N 0.000 description 1
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Description
手短に言えば、基板の上でSiN膜の単一の層を形成するための基本的な「ALDサイクル」は、以下のステップを含んでもよい:(i)膜前駆体ドーズ/吸着、(ii)非吸着前駆体のポストドーズ除去、(iii)吸着した前駆体のプラズマ活性化反応/変換、及び任意に、(iv)脱着前駆体及び/又は反応副産物のポスト反応除去。したがって、操作(i)〜(iii)、−ある実施形態では(iv)も−、は基板上に膜の追加の層を堆積することを1回以上その後繰り返して、それによって要望通り相当程度の厚さの膜をビルドアップする、ALDの単一のサイクルを構成する。
上記に示されるように、基本的なALDサイクルシーケンスへの様々な改変は、ALD生成SiN膜の耐エッチング性を増大する試みに求められる。1つの技術では、プラズマ活性化反応/変換ステップ(上のステップ(iii))において、パルス状のプラズマモード(パルス状のRF電界を用いてプラズマを支持する)を用いて、堆積されたSiN膜の高密度化を実現し、そのウェットエッチング速度を下げる。(高密度化及びどのようにウェットエッチング速度に関連するかは、下記に詳細に記載されるが、要するに、密度の高いSiN膜は耐エッチング性が高い傾向がある。)このパルス状のプラズマモードは、2013年12月30日に出願の米国特許出願番号第14/144,107号(米国特許公開第2014/0113457号)、発明の名称「パルス状のプラズマ曝露を伴うプラズマ励起原子層堆積」”Plasma enhanced atomic layer deposition with pulsed plasma exposure,”に詳細に記載され、これは全ての目的のために、その全体が参照事項としてここに包含される。
図4A及び4Bは、様々なALD型膜形成技術を用いて堆積される実施例SiN膜の第1のセットの結果を示す。具体的に、図4Aでは、異なるALDプロセスを用いて堆積した実施例SiN膜ごとに、半導体基板上の高アスペクト比表面形状の最上部及び側壁にそれぞれ対応して、ウェットエッチング速度(WER)をプロットし、図では、(1)〜(7)でラベリングした。23℃及び760トールでモル比100:1のHF溶液に曝露された後、各領域(最上部及び側壁)上でエッチング除去されるSiN膜の量を測定することにより、WERは決定される。溶液又は基板の撹拌は、曝露中に用いなかった(すなわち、基板に対してHF溶液は実質的に静止し/不動であった)(一部の撹拌メカニズムは、WERをわずかに強化する傾向が明らかである)。エッチング除去されたSiN膜の量は、透過電顕観察(TEM)によって測定され、堆積されたままの及びエッチング後の高アスペクト比表面形状のTEM画像が、プロセス(1)及び(3)〜(7)に対して、図4Bに示される。
上記のように、デバイスサイズが縮小し、ICは三次元トランジスタ及びその他の三次元構造を用いることへ移行するに従い、共形膜SiN又は他の誘電体の膜を正確な量(厚さ)で堆積する能力が、ますます重要になりつつある。述べられたように、原子層堆積(ALD)は、共形膜蒸着を達成するための1つの技術であり、それは、所望の膜厚を達成するための複数の堆積サイクルを、一般的に含む。
SiN膜の堆積は、様々な化合物から選択できる1つ以上のシリコン含有膜前駆体を利用してもよい。適切な前駆体は、所望の組成物特性、及び一部の場合で物理的又は電子特性、を提供するように選択及び供給される有機ケイ素反応物を含んでいてもよい。シリコン含有反応物/膜前駆体の例は、特に、シラン、アルキルシラン、シロキサン、アルコキシシラン、ハロゲノシラン及びアミノシランを含んでもよい。
ここに記載される方法は、あらゆる適切な半導体基板処理装置で実行することができる。適切な装置は、プロセス操作を達成するためのハードウェア及び様々なSiN膜形成ALD方法論及びここに開示される高密度化技術に従った制御プロセス操作のために命令を有するシステムコントローラーを有している。ある実施形態では、ハードウェアは、マルチステーション基板処理ツールに含まれる1つ以上のプロセスステーション、及び、ここに開示される膜形成技術に従って制御プロセス操作のために機械可読な命令を有する(又はこれにアクセスする)コントローラを、含んでいてもよい。
また、図6は、プロセス条件並びにプロセスツール600及びそのプロセスステーションのハードウェア状態を制御するために用いられるシステムコントローラー650の実施形態を示す。システムコントローラー650は、1つ以上の記憶装置656、1つ以上の質量記憶機器654、及び、1つ以上のプロセッサー652を含んでもよい。プロセッサー652は、1つ以上のCPU、ASIC、汎用コンピュータ及び/又は具体的目的のコンピュータ、1つ以上のアナログ及び/又はデジタル入出力接続部、1つ以上のステッパーモーターコントローラボード、等、を含んでもよい。
膜のリソグラフィパターニングは、典型的に、多数の利用可能なツールで実施可能な、以下の操作の一部もしくは全部を含む:(1)基板、例えば、その上に形成される窒化シリコン膜を有している基板へ、スピンオン法又はスプレーオンツールを用いたフォトレジストを塗布すること、(2)ホットプレート若しくは炉又はその他の適切な硬化ツールを用いて、フォトレジストを硬化させること、(3)ウエハステッパー等ツールを用いて、可視光又はUV光又はX線光にフォトレジストを曝露すること、(4)ウェットベンチ又はスプレーディベロッパー等のツールを用い、選択的にレジストを除去するようにレジストを現像し、それによりパターン化すること、(5)ドライエッチングツール又はプラズマ補助エッチングツールを用いて下にある膜又は基板にレジストパターンを転写すること、及び(6)RF又はマイクロ波プラズマレジストストリッパー等のツールを用いて、レジストを除去すること。ある実施形態では、フォトレジストの塗布の前に、アッシング可能なハードマスク層(例えばアモルファス炭素層)及び他の適切なハードマスク(例えば反射防止層)を堆積してよい。
開示された前述の技術、操作、プロセス、方法、システム、装置、ツール、膜、化学、及び組成物が、明快さを促進及び理解する目的で、特定の実施形態の文脈の範囲内で、詳細に記載されたが、この開示の精神及び範囲内で、前記の実施形態を実行する多くの別な方法が存在することが、当業者にとっては明らかである。従って、ここに記載される実施形態は、限定目的ではなく、開示された発明の概念の実例となると考慮されるべきであり、結局この開示の構成要件に管理されるあらゆる請求項の範囲を過度に制限するために容認できない基準として、用いられるべきではない。
[適用例1]
処理チャンバ内の半導体基板上に、低いウェットエッチング速度を有するSiN膜を堆積する方法であって、
(a)処理チャンバ内で、Siを備える膜前駆体が基板上に吸着制限層を形成するように、半導体基板上に膜前駆体を吸着すること、
(b)吸着膜前駆体を包囲する体積から非吸着膜前駆体の少なくとも一部を除去すること、
(c)(b)で非吸着膜前駆体を除去した後に、吸着した膜前駆体を、N含有イオン及び/又はラジカルを備えるプラズマに曝露することにより、反応を生じて、基板上にSiN塗膜層を形成すること、
(e)基板表面に対して約0.035〜2.2W/cm 2 の電力密度を有する、Heを含むプラズマを、0.5〜15秒間、SiN膜層に曝露することにより、SiN膜層の密度を高めること、及び
(g)前記(a)、(b)、(c)及び(e)を反復して、基板上に他の高密度化SiN膜層を形成すること、
を有する方法。
[適用例2]
(d)前記(c)の反応の後、及び、前記(e)で密度を高める前に、N含有イオン、N含有ラジカル、脱離膜前駆体及び/又は反応副産物の少なくとも一部を、SiN膜層を包囲する体積から除去すること、を更に含み、前記(g)は、(d)を反復することを更に含む、適用例1に記載の方法。
[適用例3]
(f)前記(e)で密度を高めた後に、SiN膜層を包囲する体積から、少なくともHeの一部を除去することを更に含み、前記(g)は、(f)を反復することを更に含む、適用例2に記載の方法。
[適用例4]
膜前駆体が、1つ以上のハロゲンを更に含む、適用例1から適用例3のいずれか一項に記載の方法。
[適用例5]
膜前駆体が、2つ以上のハロゲンを更に含む、適用例1から適用例3のいずれか一項に記載の方法。
[適用例6]
膜前駆体が、二塩化シラン、ヘキサクロロジシラン、テトラクロロシラン及びアミノシランから選択される、適用例1から適用例3のいずれか一項に記載の方法。
[適用例7]
前記(c)で吸着膜前駆体が曝露される、N含有イオン及び/又はラジカルを含むプラズマが、NH 3 、N 2 及びアミンから選択されるN含有プラズマ前駆体に、RFEM放射を印加することによって、生成する、適用例1から適用例3のいずれか一項に記載の方法。
[適用例8]
N含有プラズマ前駆体が、NH 3 及びtブチルアミンから選択され、適用例7に記載の方法。
[適用例9]
前記(c)で吸着膜前駆体が曝露される、N含有イオン及び/又はラジカルを含むプラズマが、約0.035〜2.2W/cm 2 の電力密度を有し、前記(c)で、吸着膜前駆体は、前記プラズマに約0.1〜6秒間曝露されることにより、反応する、適用例1から適用例3のいずれか一項に記載の方法。
[適用例10]
Heを含むプラズマの前記(e)での電力密度の、N含有イオン及び/又はラジカルを含むプラズマの前記(c)での電力密度に対する比が、1未満である、適用例9に記載の方法。
[適用例11]
前記(e)のプラズマ曝露時間の、前記(c)のプラズマ曝露時間との比が、1よりも大きい、適用例10に記載の方法。
[適用例12]
前記(e)でSiN層が曝露される、Heを含むプラズマが、約0.070〜0.28W/cm 2 の電力密度を有し、SiN層は、前記プラズマに約4〜8秒間曝露されることにより、前記(e)で高密度化される、適用例1から適用例3のいずれか一項に記載の方法。
[適用例13]
前記(e)の間、基板を包囲する体積のHeの分圧が、約2〜6トールである、適用例1から適用例3のいずれか一項に記載の方法。
[適用例14]
前記(a)、(b)、(c)及び(e)の間の処理チャンバの温度が、約500℃以下である、適用例1から適用例3のいずれか一項に記載の方法。
[適用例15]
23℃及び760トールでモル比100:1のHF溶液に曝露されたとき、堆積SiN膜は、約50オングストローム/分以下のウェットエッチング速度を有する、適用例1から適用例3のいずれか一項に記載の方法。
[適用例16]
半導体基板が、上部領域及び側壁を有する表面形状を表面形状内に有し、SiN膜は、表面形状内の上部領域上、及び、側壁上に、堆積され、堆積SiN膜は、23℃及び760トールでモル比100:1のHF溶液に曝露されたとき、表面形状内の上部領域上、及び、側壁上で、約50オングストローム/分以下のウェットエッチング速度を有する、適用例15に記載の方法。
[適用例17]
低いウェットエッチング速度を有するSiN膜を半導体基板上に堆積するための装置であって、
処理チャンバ、
処理チャンバ内の基板ホルダ、
処理チャンバへガスを流すための1つ以上のガス流入口、
処理チャンバからガスを除去するための真空源、
処理チャンバ内にプラズマを発生させるためのプラズマ発生器、
1つ以上のガス流入口、真空源、を動作するために機械可読な命令を含む1つ以上のコントローラ、
及び
基板上にSiN膜層を堆積するプラズマ発生器、
を備え、
1つ以上のコントローラの命令は、
(a)Siを備える膜前駆体を処理チャンバに流動させて、この膜前駆体を、基板ホルダに保持される半導体基板上に吸着させることにより、膜前駆体が基板上に吸着制限層を形成するように、1つ以上のガス流入口を動作するための命令、
(b)吸着した膜前駆体を包囲する体積から非吸着膜前駆体の少なくとも一部を除去するように、真空源を動作するための命令、
(c)前記(b)で非吸着膜前駆体を除去した後に実行され、N含有イオン及び/又はラジカルを含むプラズマを生成するようにプラズマ発生器を動作するための、及び、基板上にSiN膜層を形成するために前記プラズマに曝露することにより吸着した膜前駆体を反応させるための、命令、
(e)前記(c)で吸着した前駆体を反応させた後に実行され、基板表面に対して約0.035〜2.2W/cm 2 の電力密度を有する、Heを含むプラズマを生成するように、プラズマ発生器を動作するため、及び0.5〜15秒間前記プラズマにそれを曝露することにより、SiN膜層の密度を高めるための、命令、及び、
(g)前記(a)、(b)、(c)及び(e)を反復して、基板上に他の高密度化SiN膜層を形成する命令、
を有する、装置。
[適用例18]
1つ以上のコントローラの命令は、前記(c)の反応の後、及び、前記(e)で密度を高める前に行われる、少なくとも一部のN含有イオン、N含有ラジカル、脱離膜前駆体、及び/又は反応副産物を、SiN膜層を包囲する体積からを除去するように真空源を動作させるための命令、を更に有し、前記(g)は、前記(d)を反復することを更に含む、適用例17に記載の装置。
[適用例19]
1つ以上のコントローラの命令は、
(f)少なくとも、前記(e)で密度を高めた後に、SiN膜層を包囲する体積からHeの一部を除去するために、真空源を動作させる命令、
を更に有し、前記(g)は、前記(f)を反復することを更に含む、適用例18に記載の装置。
[適用例20]
前記(e)でSiN層が曝露される、Heを含むプラズマが、約0.070〜0.28W/cm 2 の電力密度を有するように、プラズマ発生器は動作され、SiN層は、前記プラズマに約4〜8秒間曝露されることにより、前記(e)で高密度化される、適用例17から適用例19のいずれか一項に記載の装置。
[適用例21]
前記(e)の間に基板を包囲する体積のHeの分圧が約2〜6トールとなるように、1つ以上のガス流入口及び真空源が動作される、適用例17から適用例19のいずれか一項に記載の装置。
Claims (19)
- 処理チャンバ内の半導体基板上に、窒化シリコン膜を堆積する方法であって、
(a)処理チャンバ内で、シリコンを備える膜前駆体が半導体基板上に吸着制限層を形成するように、前記基板上に膜前駆体を吸着すること、
(b)吸着した前記膜前駆体を包囲する体積から非吸着膜前駆体の少なくとも一部を除去すること、
(c)(b)で非吸着膜前駆体を除去した後に、吸着した前記膜前駆体を、N含有イオン及び/又はラジカルを備えるプラズマに曝露することにより、反応を生じて、前記基板上に窒化シリコン膜層を形成すること、
(e)前記基板の表面に対して0.035〜2.2W/cm2の電力密度を有する、ヘリウムを含むプラズマを、0.5〜15秒間のプラズマ暴露時間、前記窒化シリコン膜層に曝露することにより、前記窒化シリコン膜層の密度を高めること、及び
(g)前記(a)、(b)、(c)及び(e)を反復して、前記基板上に他の高密度化窒化シリコン膜層を形成すること、
を有し、
前記(c)で吸着した前記膜前駆体が曝露される、N含有イオン及び/又はラジカルを含む前記プラズマが、0.035〜2.2W/cm 2 の電力密度を有し、前記(c)で吸着した前記膜前駆体は、前記プラズマに0.1〜6秒間曝露されることにより、反応し、
ヘリウムを含む前記プラズマの前記(e)での電力密度の、N含有イオン及び/又はラジカルを含む前記プラズマの前記(c)での電力密度に対する比が、1未満であり、
前記(e)のプラズマ曝露時間の、前記(c)のプラズマ曝露時間との比が、1よりも大きい、方法。 - (d)前記(c)の反応の後、及び、前記(e)で密度を高める前に、N含有イオン、N含有ラジカル、脱離膜前駆体及び/又は反応副産物の少なくとも一部を、前記窒化シリコン膜層を包囲する体積から除去すること、を更に含み、前記(g)は、(d)を反復することを更に含む、請求項1に記載の方法。
- (f)前記(e)で密度を高めた後に、前記窒化シリコン膜層を包囲する体積から、少なくともヘリウムの一部を除去することを更に含み、前記(g)は、(f)を反復することを更に含む、請求項2に記載の方法。
- 前記膜前駆体が、1つ以上のハロゲンを更に含む、請求項1から請求項3のいずれか一項に記載の方法。
- 前記膜前駆体が、2つ以上のハロゲンを更に含む、請求項1から請求項3のいずれか一項に記載の方法。
- 前記膜前駆体が、二塩化シラン、ヘキサクロロジシラン、テトラクロロシラン及びアミノシランから選択される、請求項1から請求項3のいずれか一項に記載の方法。
- 前記(c)で吸着した前記膜前駆体が曝露される、N含有イオン及び/又はラジカルを含む前記プラズマが、アンモニア、窒素及びアミンから選択されるN含有プラズマ前駆体に、RF EM放射を印加することによって、生成する、請求項1から請求項3のいずれか一項に記載の方法。
- 前記N含有プラズマ前駆体が、アンモニア及びtブチルアミンから選択された、請求項7に記載の方法。
- 前記(e)で前記窒化シリコン膜層が曝露される、ヘリウムを含む前記プラズマが、0.070〜0.28W/cm2の電力密度を有し、前記窒化シリコン膜層は、前記プラズマに4〜8秒間曝露されることにより、前記(e)で高密度化される、請求項1から請求項3のいずれか一項に記載の方法。
- 前記(e)の間、前記基板を包囲する体積のヘリウムの分圧が、2〜6トールである、請求項1から請求項3のいずれか一項に記載の方法。
- 前記(a)、(b)、(c)及び(e)の間の前記処理チャンバの温度が、500℃以下である、請求項1から請求項3のいずれか一項に記載の方法。
- 23℃及び760トールでモル比100:1のHF溶液に曝露されたとき、堆積した前記窒化シリコン膜は、50オングストローム/分以下のウェットエッチング速度を有する、請求項1から請求項3のいずれか一項に記載の方法。
- 処理チャンバ内の半導体基板上に、窒化シリコン膜を堆積する方法であって、
(a)処理チャンバ内で、シリコンを備える膜前駆体が半導体基板上に吸着制限層を形成するように、前記基板上に膜前駆体を吸着すること、
(b)吸着した前記膜前駆体を包囲する体積から非吸着膜前駆体の少なくとも一部を除去すること、
(c)(b)で非吸着膜前駆体を除去した後に、吸着した前記膜前駆体を、N含有イオン及び/又はラジカルを備えるプラズマに曝露することにより、反応を生じて、前記基板上に窒化シリコン膜層を形成すること、
(e)前記基板の表面に対して0.035〜2.2W/cm 2 の電力密度を有する、ヘリウムを含むプラズマを、0.5〜15秒間、前記窒化シリコン膜層に曝露することにより、前記窒化シリコン膜層の密度を高めること、及び
(g)前記(a)、(b)、(c)及び(e)を反復して、前記基板上に他の高密度化窒化シリコン膜層を形成すること、
を有し、
23℃及び760トールでモル比100:1のHF溶液に曝露されたとき、堆積した前記窒化シリコン膜は、50オングストローム/分以下のウェットエッチング速度を有し、
前記半導体基板が、上部領域及び側壁を有する表面形状を表面形状内に有し、前記窒化シリコン膜は、前記表面形状内の前記上部領域上、及び、前記側壁上に、堆積され、堆積された前記窒化シリコン膜は、23℃及び760トールでモル比100:1のHF溶液に曝露されたとき、前記表面形状内の前記上部領域上、及び、前記側壁上で、50オングストローム/分以下のウェットエッチング速度を有する、方法。 - 窒化シリコン膜を半導体基板上に堆積するための装置であって、
処理チャンバ、
前記処理チャンバ内の基板ホルダ、
前記処理チャンバへガスを流すための1つ以上のガス流入口、
前記処理チャンバからガスを除去するための真空源、
前記処理チャンバ内にプラズマを発生させるためのプラズマ発生器、
基板上に窒化シリコン膜層を堆積させるために、前記1つ以上のガス流入口、前記真空源、および、前記プラズマ発生器を動作させるための機械可読な命令を含む1つ以上のコントローラ、
を備え、
前記1つ以上のコントローラの命令は、
(a)シリコンを備える膜前駆体を前記処理チャンバに流動させて、前記膜前駆体を、前記基板ホルダに保持される半導体基板上に吸着させることにより、前記膜前駆体が前記基板上に、吸着した膜前駆体を有する吸着制限層を形成するように、前記1つ以上のガス流入口を動作させるための命令、
(b)吸着した前記膜前駆体を包囲する体積から非吸着膜前駆体の少なくとも一部を除去するように、前記真空源を動作させるための命令、
(c)前記(b)で非吸着膜前駆体を除去した後に実行され、N含有イオン及び/又はラジカルを含むプラズマを生成するように前記プラズマ発生器を動作させるための、及び、前記基板上に窒化シリコン膜層を形成するために前記プラズマに曝露することにより、吸着した前記膜前駆体を反応させるための、命令、
(e)前記(c)で吸着した前記膜前駆体を反応させた後に実行され、前記基板の表面に対して0.035〜2.2W/cm2の電力密度を有する、ヘリウムを含むプラズマを生成するように、前記プラズマ発生器を動作させるため、及び0.5〜15秒間のプラズマ暴露時間、前記プラズマに前記窒化シリコン膜層を曝露することにより、前記窒化シリコン膜層の密度を高めるための、命令、及び、
(g)前記(a)、(b)、(c)及び(e)を反復させて、前記基板上に他の高密度化窒化シリコン膜層を形成する命令、
を有し、
前記(c)で吸着した前記膜前駆体が曝露される、N含有イオン及び/又はラジカルを含む前記プラズマが、0.035〜2.2W/cm 2 の電力密度を有し、前記(c)で吸着した前記膜前駆体は、前記プラズマに0.1〜6秒間曝露されることにより、反応し、
ヘリウムを含む前記プラズマの前記(e)での電力密度の、N含有イオン及び/又はラジカルを含む前記プラズマの前記(c)での電力密度に対する比が、1未満であり、
前記(e)のプラズマ曝露時間の、前記(c)のプラズマ曝露時間との比が、1よりも大きい、装置。 - 前記1つ以上のコントローラの命令は、
(d)前記(c)の反応の後、及び、前記(e)で密度を高める前に行われる、少なくとも一部のN含有イオン、N含有ラジカル、脱離膜前駆体、及び/又は反応副産物を、前記窒化シリコン膜層を包囲する体積からを除去するように前記真空源を動作させるための命令、を更に有し、
前記(g)は、前記(d)を反復することを更に含む、請求項14に記載の装置。 - 前記1つ以上のコントローラの命令は、
(f)少なくとも、前記(e)で密度を高めた後に、前記窒化シリコン膜層を包囲する体積からヘリウムの一部を除去するために、前記真空源を動作させる命令、
を更に有し、前記(g)は、前記(f)を反復することを更に含む、請求項15に記載の装置。 - 前記(e)で前記窒化シリコン膜層が曝露される、ヘリウムを含む前記プラズマが、0.070〜0.28W/cm2の電力密度を有するように、前記プラズマ発生器は動作され、前記窒化シリコン膜層は、前記プラズマに4〜8秒間曝露されることにより、前記(e)で高密度化される、請求項14から請求項16のいずれか一項に記載の装置。
- 前記(e)の間に前記基板を包囲する体積のヘリウムの分圧が2〜6トールとなるように、前記1つ以上のガス流入口及び前記真空源が動作される、請求項14から請求項16のいずれか一項に記載の装置。
- 処理チャンバ内の半導体基板上に、窒化シリコン膜を堆積する方法であって、
(a)処理チャンバ内で、シリコンを備える膜前駆体が半導体基板上に吸着制限層を形成するように、前記半導体基板上に前記膜前駆体を吸着すること、
(b)前記吸着制限層を包囲する体積から非吸着膜前駆体の少なくとも一部を除去すること、
(c)(b)で前記非吸着膜前駆体を除去した後に、前記吸着制限層を窒素含有イオン及び/又はラジカルを備える第1のプラズマに曝露することにより、前記吸着制限層を反応させて、前記半導体基板上に窒化シリコン膜層を形成すること、
(e)前記窒化シリコン膜層の表面に対して0.035〜2.2W/cm2の電力密度を有する、ヘリウムを含む第2のプラズマを、0.5〜15秒間、前記窒化シリコン膜層に曝露することにより、前記窒化シリコン膜層の密度を高めること、及び
(g)前記(a)、(b)、(c)及び(e)を反復して、前記半導体基板上に他の高密度化窒化シリコン膜層を形成すること、を有し、
前記第1のプラズマが、0.035〜2.2W/cm2の電力密度を有し、
前記吸着制限層が、前記第1のプラズマに0.1〜6秒間のプラズマ曝露時間曝露され、
前記第2のプラズマの前記電力密度の前記第1のプラズマの前記電力密度に対する比が、1未満であり、
前記第2のプラズマのプラズマ暴露時間の、前記第1のプラズマのプラズマ暴露時間との比が、1よりも大きい、方法。
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