JP6339672B2 - 金属ソースを含むメモリセルストリングを有する方法及び装置 - Google Patents
金属ソースを含むメモリセルストリングを有する方法及び装置 Download PDFInfo
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- 229910052751 metal Inorganic materials 0.000 title claims description 30
- 239000002184 metal Substances 0.000 title claims description 30
- 238000000034 method Methods 0.000 title claims description 28
- 239000000463 material Substances 0.000 claims description 126
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 29
- 229920005591 polysilicon Polymers 0.000 claims description 29
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 claims description 27
- 229910021332 silicide Inorganic materials 0.000 claims description 26
- 239000004065 semiconductor Substances 0.000 claims description 12
- 239000011810 insulating material Substances 0.000 claims description 9
- 239000000758 substrate Substances 0.000 claims description 9
- 239000004020 conductor Substances 0.000 claims description 5
- 239000003989 dielectric material Substances 0.000 claims description 4
- 238000009792 diffusion process Methods 0.000 claims description 4
- 238000005530 etching Methods 0.000 claims description 4
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 claims description 3
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 claims description 3
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 claims description 3
- 229910052785 arsenic Inorganic materials 0.000 claims description 3
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 claims description 3
- 229910052796 boron Inorganic materials 0.000 claims description 3
- 229910052733 gallium Inorganic materials 0.000 claims description 3
- 229910052698 phosphorus Inorganic materials 0.000 claims description 3
- 239000011574 phosphorus Substances 0.000 claims description 3
- WQJQOUPTWCFRMM-UHFFFAOYSA-N tungsten disilicide Chemical compound [Si]#[W]#[Si] WQJQOUPTWCFRMM-UHFFFAOYSA-N 0.000 claims description 3
- 229910021342 tungsten silicide Inorganic materials 0.000 claims description 3
- YXTPWUNVHCYOSP-UHFFFAOYSA-N bis($l^{2}-silanylidene)molybdenum Chemical compound [Si]=[Mo]=[Si] YXTPWUNVHCYOSP-UHFFFAOYSA-N 0.000 claims description 2
- 229910021344 molybdenum silicide Inorganic materials 0.000 claims description 2
- 150000004767 nitrides Chemical class 0.000 claims description 2
- 229910052715 tantalum Inorganic materials 0.000 claims description 2
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 claims description 2
- 238000004519 manufacturing process Methods 0.000 description 17
- 230000008569 process Effects 0.000 description 8
- 230000006870 function Effects 0.000 description 6
- 238000010586 diagram Methods 0.000 description 3
- 239000007769 metal material Substances 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 229910052814 silicon oxide Inorganic materials 0.000 description 2
- 229910018072 Al 2 O 3 Inorganic materials 0.000 description 1
- 229910016006 MoSi Inorganic materials 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 238000002513 implantation Methods 0.000 description 1
- 239000012774 insulation material Substances 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 239000010410 layer Substances 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 1
- 239000003566 sealing material Substances 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
- 230000001360 synchronised effect Effects 0.000 description 1
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- H—ELECTRICITY
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- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/20—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels
- H10B41/23—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels
- H10B41/27—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels the channels comprising vertical portions, e.g. U-shaped channels
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/528—Geometry or layout of the interconnection structure
- H01L23/5283—Cross-sectional geometry
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/45—Ohmic electrodes
- H01L29/456—Ohmic electrodes on silicon
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66825—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a floating gate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/792—Field effect transistors with field effect produced by an insulated gate with charge trapping gate insulator, e.g. MNOS-memory transistors
- H01L29/7926—Vertical transistors, i.e. transistors having source and drain not in the same horizontal plane
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/20—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
- H10B41/35—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region with a cell select transistor, e.g. NAND
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
- H01L2924/143—Digital devices
- H01L2924/1434—Memory
- H01L2924/1435—Random access memory [RAM]
- H01L2924/1438—Flash memory
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- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Geometry (AREA)
- Semiconductor Memories (AREA)
- Non-Volatile Memory (AREA)
Description
本出願は、2013年11月1日に出願された米国特許出願第14/069,553号に対する優先権の利益を主張し、その全体が参照により本明細書に組み込まれる。
1つまたは複数の実施形態が、ドープされた金属シリサイドソースを提供し得る。ドープされた金属シリサイドソースは、ポリシリコンソースよりもシート抵抗が低く、また適度なゲート誘起ドレイン漏洩性能を提供し得る。垂直型メモリセルストリングが、ドープされた金属シリサイドソースの上に形成され、半導体材が、垂直型メモリセルストリングに垂直に隣接して形成され得る。メモリセルストリングのチャネルとして機能する、半導体材に対しソースから拡散が起こり得るように、半導体材はドープされた金属シリサイドソースと接触した状態にあり得る。
Claims (22)
- 金属を含むソース材を形成することと、
前記ソース材の上に、選択ゲート材を形成することと、
前記選択ゲート材の上に、エッチング停止材を形成することと、
前記エッチング停止材の上に制御ゲート材と絶縁材を交互に形成することと、
前記交互する制御ゲート材及び絶縁材と、前記エッチング停止材を貫通して第1のトレンチを形成することと、
続いて、前記第1のトレンチの側壁に、誘電材及びフローティングゲート材を形成することと、
続いて、前記第1のトレンチの底に存在する前記選択ゲート材と、キャッピング材とを貫通して第2のトレンチを形成することと、
前記第1及び第2のトレンチ内に、前記ソース材の上に前記ソース材と接触するチャネル材を形成する方法。 - 前記ソース材にキャッピング材を介してドープすること、
をさらに含む請求項1に記載の方法。 - 前記第1のトレンチの前記制御ゲート材の側壁上に凹所を形成することと、
前記凹所と、前記第1のトレンチの絶縁材の側壁に前記誘電材を形成することと、
前記凹所内に前記フローティングゲート材を形成することと、
前記フローティングゲート材の表面にトンネル誘電材を形成することと、
を含む、請求項2に記載の方法。 - 基板の上に前記ソース材を形成することを含む、請求項1に記載の方法。
- 前記基板と前記ソース材との間に酸化物を形成することをさらに含む請求項4に記載の方法。
- 前記基板と前記ソース材との間にポリシリコン材を形成することをさらに含む請求項4に記載の方法。
- 前記ソース材は金属シリサイドである、請求項1に記載の方法。
- 前記金属シリサイドは、タングステンシリサイド(WSiX)、タンタルシリサイド(TaSiX)、またはモリブデンシリサイド(MoSiX)のうちの1つである、請求項7に記載の方法。
- 前記制御ゲート材及び絶縁材の上に窒化ハードマスクを形成することをさらに含む請求項1に記載の方法。
- 前記誘電材は酸化物―窒化物―酸化物(ONO)材を含む、請求項1に記載の方法。
- 前記絶縁材は酸化物材を含む、請求項1に記載の方法。
- 前記キャッピング材は酸化物材またはポリシリコン材のうちの1つを含む、請求項2に記載の方法。
- 前記選択ゲート材と、前記制御ゲート材と、前記フローティングゲート材と、前記チャネル材は、ポリシリコンを含む、請求項1に記載の方法。
- 基板の上に金属シリサイドソース材を形成することと、
前記金属シリサイドソース材の上にキャッピング材を形成することと、
前記金属シリサイドソース材をドープすることと、
前記キャッピング材の上にポリシリコン選択ゲート材を形成することと、
前記ポリシリコン選択ゲート材の上に制御ゲート材及び酸化物材が交差するように形成することと、
前記制御ゲート材、酸化物材及びエッチング停止材を貫通して第1トレンチを形成することと、
続いて、前記第1トレンチの側壁に沿って、ONO材、続いてポリシリコンを形成することと、
続いて、前記第1のトレンチの前記側壁に沿った前記ポリシリコンの一部を取り除くことと、
続いて、前記第1トレンチの底に存在する前記選択ゲート材と前記キャッピング材とを貫通して第2トレンチを形成することと、
前記第1及び第2のトレンチ内に前記ソース材に接触するチャネル材を含むメモリセルストリングを形成することと
を含む方法。 - 前記金属シリサイドソース材をドープすることは、ヒ素、ホウ素、リン、またはガリウムのうちの1つで前記金属シリサイドソース材をドープすることを含む、請求項14に記載の方法。
- 前記金属シリサイドソース材をドープすることは、n型導電材を作るためにヒ素またはリンで前記金属シリサイドソース材をドープすること、またはp型導電材を作るためにホウ素またはガリウムで前記金属シリサイドソース材をドープすることのうちの1つを含む、請求項14に記載の方法。
- 前記第1トレンチの前記側壁に沿った前記ポリシリコンを取り除くことは、前記第2トレンチを形成する間に行われる、請求項14に記載の方法。
- 基板上に金属シリサイドを形成する工程と、
前記金属シリサイドの上にキャッピング材を形成する工程と、
前記キャッピング材の上に選択ゲート材を形成する工程と、
前記選択ゲート材の上に制御ゲート材及び絶縁材を交互に形成する工程と、
前記制御ゲート材及び絶縁材を貫通するものの前記選択ゲート材を貫通しない第1のトレンチを形成する工程と、
前記第1のトレンチを介して前記制御ゲート材の夫々の一部を選択的に除去して、凹部を前記制御ゲートの夫々に形成する工程と、
前記凹部に電化蓄積部を形成する工程と、
前記電化蓄積部を形成した後に、前記選択ゲート材及びキャッピング材を貫通させて前記金属シリサイドを露出する第2のトレンチを形成する工程と、
前記第1及び第2のトレンチの面に沿ってトンネル誘電体を形成する工程と、
半導体材を前記トンネル誘電体の表面を覆うように前記第1及び第2のトレンチ内を充填する工程と
を含む方法。 - 前記金属シリサイドは前記半導体材との間にオーミック接触を形成する請求項18に記載の方法。
- 前記金属シリサイドをドープする工程と、
前記金属シリサイドから前記半導体材に前記オーミック接触により拡散が発生する請求項19記載の方法。 - 前記選択ゲート材を形成する工程と、前記制御ゲート材及び絶縁材を交互に形成する工程の間にエッチング停止材を形成する工程を更に有する請求項18に記載の方法。
- 前記電化蓄積部は、フローティングゲートである請求項18に記載の方法。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US14/069,553 | 2013-11-01 | ||
US14/069,553 US9437604B2 (en) | 2013-11-01 | 2013-11-01 | Methods and apparatuses having strings of memory cells including a metal source |
PCT/US2014/063377 WO2015066447A1 (en) | 2013-11-01 | 2014-10-31 | Methods and apparatuses having strings of memory cells including a metal source |
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JP2016535444A JP2016535444A (ja) | 2016-11-10 |
JP6339672B2 true JP6339672B2 (ja) | 2018-06-06 |
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Country Status (6)
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US (2) | US9437604B2 (ja) |
EP (1) | EP3063787B1 (ja) |
JP (1) | JP6339672B2 (ja) |
KR (1) | KR101896379B1 (ja) |
CN (2) | CN105745749A (ja) |
WO (1) | WO2015066447A1 (ja) |
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US9437604B2 (en) | 2013-11-01 | 2016-09-06 | Micron Technology, Inc. | Methods and apparatuses having strings of memory cells including a metal source |
US9431410B2 (en) | 2013-11-01 | 2016-08-30 | Micron Technology, Inc. | Methods and apparatuses having memory cells including a monolithic semiconductor channel |
US9548313B2 (en) * | 2014-05-30 | 2017-01-17 | Sandisk Technologies Llc | Method of making a monolithic three dimensional NAND string using a select gate etch stop layer |
US10283520B2 (en) | 2016-07-12 | 2019-05-07 | Micron Technology, Inc. | Elevationally-extending string of memory cells individually comprising a programmable charge storage transistor and method of forming an elevationally-extending string of memory cells individually comprising a programmable charge storage transistor |
US10090318B2 (en) | 2016-08-05 | 2018-10-02 | Micron Technology, Inc. | Vertical string of memory cells individually comprising a programmable charge storage transistor comprising a control gate and a charge storage structure and method of forming a vertical string of memory cells individually comprising a programmable charge storage transistor comprising a control gate and a charge storage structure |
US10038002B2 (en) | 2016-10-18 | 2018-07-31 | Micron Technology, Inc. | Semiconductor devices and methods of fabrication |
US10707121B2 (en) * | 2016-12-31 | 2020-07-07 | Intel Corporatino | Solid state memory device, and manufacturing method thereof |
US10608012B2 (en) | 2017-08-29 | 2020-03-31 | Micron Technology, Inc. | Memory devices including memory cells and related methods |
KR102463483B1 (ko) | 2017-08-29 | 2022-11-04 | 마이크론 테크놀로지, 인크 | 고 밴드 갭 재료를 포함하는 스트링 드라이버들을 갖는 디바이스들 및 시스템들, 및 형성 방법들 |
KR102414294B1 (ko) | 2017-09-08 | 2022-06-28 | 삼성전자주식회사 | 비휘발성 메모리 장치 및 그 제조 방법 |
CN108565265B (zh) * | 2018-04-17 | 2019-05-24 | 长江存储科技有限责任公司 | 一种三维存储器及其数据操作方法 |
US10923493B2 (en) | 2018-09-06 | 2021-02-16 | Micron Technology, Inc. | Microelectronic devices, electronic systems, and related methods |
CN111326522B (zh) * | 2020-03-10 | 2021-11-05 | 长江存储科技有限责任公司 | 三维存储器制造方法及三维存储器 |
CN112885838B (zh) * | 2020-03-16 | 2023-02-03 | 长江存储科技有限责任公司 | 存储器件以及形成存储器件的方法 |
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JP2755613B2 (ja) | 1988-09-26 | 1998-05-20 | 株式会社東芝 | 半導体装置 |
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US9437604B2 (en) | 2016-09-06 |
US20160372479A1 (en) | 2016-12-22 |
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