JP5478852B2 - 表示装置の作製方法 - Google Patents
表示装置の作製方法 Download PDFInfo
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- JP5478852B2 JP5478852B2 JP2008188700A JP2008188700A JP5478852B2 JP 5478852 B2 JP5478852 B2 JP 5478852B2 JP 2008188700 A JP2008188700 A JP 2008188700A JP 2008188700 A JP2008188700 A JP 2008188700A JP 5478852 B2 JP5478852 B2 JP 5478852B2
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- semiconductor film
- film
- electrode
- thin film
- light
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Images
Classifications
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
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Description
本実施の形態では、液晶表示装置に用いられる薄膜トランジスタの作製工程について、図1乃至図4を用いて説明する。図1乃至図3は、薄膜トランジスタの作製工程を示す断面図であり、図4は、一画素における薄膜トランジスタ及び画素電極の接続領域の上面図である。
本実施の形態は、実施の形態1と一部異なる工程を以下に説明する。実施の形態1とは一部異なるだけであるため、図5において図1と同じ箇所には同じ符号を用い、同じ工程の詳細な説明は省略する。
本実施の形態は、実施の形態1と一部異なる工程を以下に説明する。実施の形態1とは一部異なるだけであるため、図6において図1と同じ箇所には同じ符号を用い、同じ工程の詳細な説明は省略する。
本実施の形態は、実施の形態1と一部異なる工程を以下に説明する。実施の形態1とは一部異なるだけであるため、図7において図1と同じ箇所には同じ符号を用い、同じ工程の詳細な説明は省略する。
実施の形態1とは異なる薄膜トランジスタの作製方法について、図8乃至図12を用いて説明する。ここでは、上記実施の形態1よりフォトマスク数を削減することが可能なプロセスを用いて薄膜トランジスタを作製する工程について示す。
本実施の形態では、表示装置の一形態として、実施の形態1で示す薄膜トランジスタを有する液晶表示装置について、以下に示す。
本実施の形態では、表示装置の一形態である発光装置について、図9乃至図11、図27、及び図28を用いて説明する。発光装置としては、ここではエレクトロルミネッセンスを利用する発光素子を用いて示す。エレクトロルミネッセンスを利用する発光素子は、発光材料が有機化合物であるか、無機化合物であるかによって区別され、一般的に、前者は有機EL素子、後者は無機EL素子と呼ばれている。
本発明の表示装置の一形態である表示パネルの構成について、以下に示す。
本発明の表示装置の一形態に相当する液晶表示パネルの外観及び断面について、図36を用いて説明する。図36(A)は、第1の基板4001上に形成されたLPSAS膜を有する薄膜トランジスタ4010及び液晶素子4013を、第2の基板4006との間にシール材4005によって封止した、パネルの上面図であり、図36(B)は、図36(A)のA−A’における断面図相当する。
次に、本発明の表示装置の一形態に相当する発光表示パネルの外観及び断面について、図37(A)を用いて説明する。図37は、第1の基板上に形成されたLPSAS膜を用いた薄膜トランジスタ及び発光素子を、第2の基板との間にシール材によって封止した、パネルの上面図であり、図37(B)は、図37(A)のA−A’における断面図に相当する。
本発明により得られる表示装置等によって、アクティブマトリクス型表示装置モジュールに用いることができる。即ち、それらを表示部に組み込んだ電子機器全てに本発明を実施できる。
23b:ボロンを含む微結晶半導体膜
33a:LPSAS膜
33b:ボロンを含む微結晶半導体膜
43:微結晶半導体膜
50:基板
51:ゲート電極
52a、52b、52c:ゲート絶縁膜
53:LPSAS膜
54:バッファ層
55:一導電型を付与する不純物が添加された半導体膜
56:レジストマスク
59:多階調マスク
61:LPSAS膜
62:バッファ層
63:一導電型を付与する不純物が添加された半導体膜
65a、65b、65c:導電膜
66:レジストマスク
71a、71b、71c:ソース電極及びドレイン電極
72:ソース領域及びドレイン領域
73:バッファ層
74:薄膜トランジスタ
76:絶縁膜
77:画素電極
80:レジスト
81:レジストマスク
83:薄膜トランジスタ
85a〜85c:導電膜
87:バッファ層
86:レジストマスク
88:ソース領域及びドレイン領域
90:LPSAS膜
92a、92b、92c:ソース電極及びドレイン電極
111:平坦化膜
Claims (6)
- 基板上にゲート電極を形成し、
前記ゲート電極上に絶縁膜を形成し、
前記絶縁膜上に前記ゲート電極と重なる第1の半導体膜を2nm乃至10nm未満の膜厚で形成し、
前記第1の半導体膜にp型不純物元素またはn型不純物元素を添加して第2の半導体膜を形成し、
前記第2の半導体膜にレーザ光を照射して第3の半導体膜を形成し、
前記第3の半導体膜上にバッファ層を形成し、前記バッファ層上にn型不純物元素を含む第4の半導体膜を形成し、前記第4の半導体膜上にソース電極またはドレイン電極を形成する表示装置の作製方法であって、
前記第1の半導体膜は微結晶半導体膜であり、前記第3の半導体膜は、前記第1の半導体膜よりも結晶性が高い微結晶半導体膜であり、
前記バッファ層は非晶質半導体膜であることを特徴とする表示装置の作製方法。 - 基板上にゲート電極を形成し、
前記ゲート電極上に絶縁膜を形成し、
前記絶縁膜上に前記ゲート電極と重なる第1の半導体膜を2nm乃至10nm未満の膜厚で形成し、
前記第1の半導体膜にp型不純物元素またはn型不純物元素を添加して第2の半導体膜を形成し、
前記第2の半導体膜にレーザ光を照射して第3の半導体膜を形成し、
前記第3の半導体膜上にバッファ層を形成し、前記バッファ層上にn型不純物元素を含む第4の半導体膜を形成し、前記第4の半導体膜上にソース電極またはドレイン電極を形成する表示装置の作製方法であって、
前記第1の半導体膜は微結晶半導体膜であり、前記第3の半導体膜は、前記第1の半導体膜よりも結晶性が高い微結晶半導体膜であり、
前記バッファ層は、窒素を含む非晶質半導体膜で形成することを特徴とする表示装置の作製方法。 - 基板上にゲート電極を形成し、
前記ゲート電極上に絶縁膜を形成し、
前記絶縁膜上に前記ゲート電極と重なる第1の半導体膜を2nm乃至10nm未満の膜厚で形成し、
前記第1の半導体膜にp型不純物元素またはn型不純物元素を添加して第2の半導体膜を形成し、
前記第2の半導体膜にレーザ光を照射して第3の半導体膜を形成し、
前記第3の半導体膜上にバッファ層を形成し、前記バッファ層上にn型不純物元素を含む第4の半導体膜を形成し、前記第4の半導体膜上にソース電極またはドレイン電極を形成する表示装置の作製方法であって、
前記第1の半導体膜は微結晶半導体膜であり、前記第3の半導体膜は、前記第1の半導体膜よりも結晶性が高い微結晶半導体膜であり、
前記バッファ層は、水素を含む非晶質半導体膜で形成することを特徴とする表示装置の作製方法。 - 基板上にゲート電極を形成し、
前記ゲート電極上に絶縁膜を形成し、
前記絶縁膜上に前記ゲート電極と重なる第1の半導体膜を2nm乃至10nm未満の膜厚で形成し、
前記第1の半導体膜にp型不純物元素またはn型不純物元素を添加して第2の半導体膜を形成し、
前記第2の半導体膜にレーザ光を照射して第3の半導体膜を形成し、
前記第3の半導体膜上にバッファ層を形成し、前記バッファ層上にn型不純物元素を含む第4の半導体膜を形成し、前記第4の半導体膜上にソース電極またはドレイン電極を形成する表示装置の作製方法であって、
前記第1の半導体膜は微結晶半導体膜であり、前記第3の半導体膜は、前記第1の半導体膜よりも結晶性が高い微結晶半導体膜であり、
前記バッファ層は、フッ素、塩素、臭素、またはヨウ素を含む非晶質半導体膜で形成することを特徴とする表示装置の作製方法。 - 請求項1乃至4のいずれか一項において、
前記表示装置は液晶表示装置であることを特徴とする表示装置の作製方法。 - 請求項1乃至4のいずれか一項において、
前記表示装置は発光装置であることを特徴とする表示装置の作製方法。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2008188700A JP5478852B2 (ja) | 2007-07-27 | 2008-07-22 | 表示装置の作製方法 |
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JP2007059560A (ja) * | 2005-08-24 | 2007-03-08 | Sharp Corp | 薄膜半導体装置、薄膜半導体装置の製造方法、及び液晶表示装置 |
JP5057731B2 (ja) * | 2005-09-16 | 2012-10-24 | 株式会社半導体エネルギー研究所 | 表示装置、モジュール、及び電子機器 |
JP4537929B2 (ja) * | 2005-10-04 | 2010-09-08 | エルジー ディスプレイ カンパニー リミテッド | 液晶表示装置および液晶表示装置の製造方法 |
JP2007101992A (ja) * | 2005-10-06 | 2007-04-19 | Toppan Printing Co Ltd | 液晶表示装置用カラーフィルタ及びその製造方法 |
CN101326462B (zh) * | 2005-12-09 | 2012-05-02 | 夏普株式会社 | 滤色器基板和包括这种滤色器基板的液晶显示装置 |
EP2926389B1 (en) | 2012-11-30 | 2021-03-17 | 3M Innovative Properties Company | Emissive display with reflective polarizer |
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CN101355037A (zh) | 2009-01-28 |
JP5957567B2 (ja) | 2016-07-27 |
JP2016192563A (ja) | 2016-11-10 |
TW200908341A (en) | 2009-02-16 |
JP7230252B2 (ja) | 2023-02-28 |
JP7289021B1 (ja) | 2023-06-08 |
US20090026453A1 (en) | 2009-01-29 |
JP2017175148A (ja) | 2017-09-28 |
JP2023113750A (ja) | 2023-08-16 |
JP6398024B2 (ja) | 2018-09-26 |
JP2023162335A (ja) | 2023-11-08 |
JP6279658B2 (ja) | 2018-02-14 |
JP2023084131A (ja) | 2023-06-16 |
KR101495548B1 (ko) | 2015-02-25 |
JP2018201044A (ja) | 2018-12-20 |
JP2014142643A (ja) | 2014-08-07 |
CN101355037B (zh) | 2013-06-19 |
JP6405409B2 (ja) | 2018-10-17 |
TWI476928B (zh) | 2015-03-11 |
KR20090012155A (ko) | 2009-02-02 |
US8786793B2 (en) | 2014-07-22 |
JP2009055011A (ja) | 2009-03-12 |
JP2020144371A (ja) | 2020-09-10 |
JP7340718B2 (ja) | 2023-09-07 |
JP2022075695A (ja) | 2022-05-18 |
JP2018082216A (ja) | 2018-05-24 |
JP7499925B2 (ja) | 2024-06-14 |
JP2015144310A (ja) | 2015-08-06 |
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