JP4666860B2 - 高電圧バスおよび低電圧バス用の出力バッファ - Google Patents
高電圧バスおよび低電圧バス用の出力バッファ Download PDFInfo
- Publication number
- JP4666860B2 JP4666860B2 JP2001522671A JP2001522671A JP4666860B2 JP 4666860 B2 JP4666860 B2 JP 4666860B2 JP 2001522671 A JP2001522671 A JP 2001522671A JP 2001522671 A JP2001522671 A JP 2001522671A JP 4666860 B2 JP4666860 B2 JP 4666860B2
- Authority
- JP
- Japan
- Prior art keywords
- transistor
- transistors
- pull
- voltage level
- coupled
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0175—Coupling arrangements; Interface arrangements
- H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0175—Coupling arrangements; Interface arrangements
- H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
- H03K19/018585—Coupling arrangements; Interface arrangements using field effect transistors only programmable
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Logic Circuits (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US09/393,134 | 1999-09-10 | ||
| US09/393,134 US6512401B2 (en) | 1999-09-10 | 1999-09-10 | Output buffer for high and low voltage bus |
| PCT/US2000/022794 WO2001018967A1 (en) | 1999-09-10 | 2000-08-18 | Output buffer for high and low voltage bus |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2003515259A JP2003515259A (ja) | 2003-04-22 |
| JP2003515259A5 JP2003515259A5 (enExample) | 2007-09-06 |
| JP4666860B2 true JP4666860B2 (ja) | 2011-04-06 |
Family
ID=23553415
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2001522671A Expired - Fee Related JP4666860B2 (ja) | 1999-09-10 | 2000-08-18 | 高電圧バスおよび低電圧バス用の出力バッファ |
Country Status (7)
| Country | Link |
|---|---|
| US (2) | US6512401B2 (enExample) |
| JP (1) | JP4666860B2 (enExample) |
| KR (1) | KR100475986B1 (enExample) |
| CN (1) | CN1241328C (enExample) |
| AU (1) | AU6919000A (enExample) |
| TW (1) | TW478250B (enExample) |
| WO (1) | WO2001018967A1 (enExample) |
Families Citing this family (66)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4740518B2 (ja) * | 2000-07-17 | 2011-08-03 | ボード・オブ・リージエンツ,ザ・ユニバーシテイ・オブ・テキサス・システム | 転写リソグラフィ・プロセスのための自動液体ディスペンス方法およびシステム |
| US20060005657A1 (en) * | 2004-06-01 | 2006-01-12 | Molecular Imprints, Inc. | Method and system to control movement of a body for nano-scale manufacturing |
| US6952112B2 (en) * | 2000-11-30 | 2005-10-04 | Renesas Technology Corporation | Output buffer circuit with control circuit for modifying supply voltage and transistor size |
| US6515516B2 (en) | 2001-01-22 | 2003-02-04 | Micron Technology, Inc. | System and method for improving signal propagation |
| KR100465599B1 (ko) * | 2001-12-07 | 2005-01-13 | 주식회사 하이닉스반도체 | 데이타 출력 버퍼 |
| US7019819B2 (en) * | 2002-11-13 | 2006-03-28 | Molecular Imprints, Inc. | Chucking system for modulating shapes of substrates |
| KR100466540B1 (ko) * | 2002-08-28 | 2005-01-15 | 한국전자통신연구원 | 입출력 포트 회로 |
| US7641840B2 (en) * | 2002-11-13 | 2010-01-05 | Molecular Imprints, Inc. | Method for expelling gas positioned between a substrate and a mold |
| US6980035B1 (en) * | 2003-03-18 | 2005-12-27 | Xilinx, Inc. | Auto-detect level shifter for multiple output voltage standards |
| US6954100B2 (en) * | 2003-09-12 | 2005-10-11 | Freescale Semiconductor, Inc. | Level shifter |
| DE10352812B4 (de) * | 2003-11-12 | 2008-08-14 | Infineon Technologies Ag | Verfahren und Schaltungsanordnung zur Erzeugung ternärer Signale |
| US7002371B2 (en) | 2003-12-29 | 2006-02-21 | Freescale Semiconductor, Inc. | Level shifter |
| US20050174158A1 (en) * | 2004-02-06 | 2005-08-11 | Khan Qadeer A. | Bidirectional level shifter |
| EP1714286B1 (en) * | 2004-02-11 | 2008-12-10 | Nxp B.V. | High voltage driver circuit with fast reading operation |
| US7411415B2 (en) * | 2004-02-25 | 2008-08-12 | Ashfaq Shaikh | Bus termination scheme having concurrently powered-on transistors |
| KR100533383B1 (ko) * | 2004-03-12 | 2005-12-06 | 주식회사 하이닉스반도체 | 출력 드라이버 회로 |
| US20050285658A1 (en) * | 2004-06-29 | 2005-12-29 | Schulmeyer Kyle C | Level shifter with reduced duty cycle variation |
| US7798801B2 (en) * | 2005-01-31 | 2010-09-21 | Molecular Imprints, Inc. | Chucking system for nano-manufacturing |
| EP1843884A4 (en) * | 2005-01-31 | 2008-12-17 | Molecular Imprints Inc | CHUCK SYSTEM FOR NANO-MANUFACTURING |
| US7215150B2 (en) * | 2005-01-31 | 2007-05-08 | Freescale Semiconductor, Inc. | Method and circuit for maintaining I/O pad characteristics across different I/O supply voltages |
| US7635263B2 (en) * | 2005-01-31 | 2009-12-22 | Molecular Imprints, Inc. | Chucking system comprising an array of fluid chambers |
| US7636999B2 (en) | 2005-01-31 | 2009-12-29 | Molecular Imprints, Inc. | Method of retaining a substrate to a wafer chuck |
| JP2006226263A (ja) * | 2005-02-21 | 2006-08-31 | Denso Corp | 電磁駆動装置およびそれを用いた燃料噴射弁 |
| KR100670685B1 (ko) * | 2005-03-31 | 2007-01-17 | 주식회사 하이닉스반도체 | 반도체 소자의 출력 드라이버 |
| US7212463B2 (en) * | 2005-09-23 | 2007-05-01 | Sigma Tel, Inc. | Method and system of operating mode detection |
| KR100753123B1 (ko) * | 2005-09-29 | 2007-08-29 | 주식회사 하이닉스반도체 | 출력 드라이빙 장치 |
| US7670530B2 (en) | 2006-01-20 | 2010-03-02 | Molecular Imprints, Inc. | Patterning substrates employing multiple chucks |
| CN104317161A (zh) * | 2005-12-08 | 2015-01-28 | 分子制模股份有限公司 | 用于衬底双面图案形成的方法和系统 |
| US8045353B2 (en) * | 2005-12-30 | 2011-10-25 | Stmicroelectronics Pvt. Ltd. | Integrated circuit capable of operating at different supply voltages |
| US8215946B2 (en) | 2006-05-18 | 2012-07-10 | Molecular Imprints, Inc. | Imprint lithography system and method |
| JP5110247B2 (ja) * | 2006-07-31 | 2012-12-26 | ミツミ電機株式会社 | 半導体集積回路装置 |
| US7432739B2 (en) * | 2006-10-27 | 2008-10-07 | Macronix International Co., Ltd. | Low voltage complementary metal oxide semiconductor process tri-state buffer |
| TWI316715B (en) * | 2006-11-23 | 2009-11-01 | Realtek Semiconductor Corp | Memory controller and output signal driving circuit thereof |
| TWI325137B (en) * | 2006-12-15 | 2010-05-21 | Realtek Semiconductor Corp | Output signal driving circuit and method thereof |
| US7605633B2 (en) * | 2007-03-20 | 2009-10-20 | Kabushiki Kaisha Toshiba | Level shift circuit which improved the blake down voltage |
| US7804327B2 (en) * | 2007-10-12 | 2010-09-28 | Mediatek Inc. | Level shifters |
| US7605611B2 (en) * | 2007-10-24 | 2009-10-20 | Micron Technology, Inc. | Methods, devices, and systems for a high voltage tolerant buffer |
| US7675324B2 (en) * | 2007-12-13 | 2010-03-09 | Micron Technology, Inc. | Pre-driver logic |
| US8347251B2 (en) * | 2007-12-31 | 2013-01-01 | Sandisk Corporation | Integrated circuit and manufacturing process facilitating selective configuration for electromagnetic compatibility |
| EP2249227B1 (en) | 2008-02-29 | 2015-05-27 | Panasonic Corporation | Interface device for host device, interface device for slave device, host device, slave device, communication system and interace voltage switching method |
| US7683668B1 (en) | 2008-11-05 | 2010-03-23 | Freescale Semiconductor, Inc. | Level shifter |
| CN102396156A (zh) * | 2009-02-12 | 2012-03-28 | 莫塞德技术公司 | 用于片内终结的终结电路 |
| US8009481B2 (en) | 2009-02-23 | 2011-08-30 | Infineon Technologies Ag | System and method for bit-line control |
| US20100315124A1 (en) * | 2009-06-15 | 2010-12-16 | Berkeley Law & Technology Group, Llp | Low power receiver circuit |
| EP2278712A1 (fr) * | 2009-07-01 | 2011-01-26 | STMicroelectronics (Rousset) SAS | Circuit intégré comprenant un circuit tampon haute tension large bande |
| KR101332039B1 (ko) * | 2011-06-14 | 2013-11-22 | 한국과학기술원 | 전원발생회로 및 전원발생회로가 구비된 스위칭회로 |
| US8643419B2 (en) | 2011-11-04 | 2014-02-04 | Silicon Laboratories Inc. | Flexible low power slew-rate controlled output buffer |
| US8558603B2 (en) * | 2011-12-15 | 2013-10-15 | Apple Inc. | Multiplexer with level shifter |
| WO2014006454A1 (en) | 2012-07-06 | 2014-01-09 | Freescale Semiconductor, Inc. | Input/output driver circuit, integrated circuit and method therefor |
| US9042172B2 (en) * | 2013-05-02 | 2015-05-26 | Windbond Electronics Corporation | Flash memory having dual supply operation |
| US9117547B2 (en) | 2013-05-06 | 2015-08-25 | International Business Machines Corporation | Reduced stress high voltage word line driver |
| GB201314938D0 (en) * | 2013-08-21 | 2013-10-02 | Advanced Risc Mach Ltd | Communication between voltage domains |
| TWI610314B (zh) * | 2014-03-10 | 2018-01-01 | Toshiba Memory Corp | 半導體積體電路裝置 |
| US9383794B2 (en) | 2014-06-11 | 2016-07-05 | Freescale Semiconductor, Inc. | Integrated circuit with multi-voltage input/output (I/O) cells |
| CN107196643A (zh) * | 2017-05-07 | 2017-09-22 | 长沙方星腾电子科技有限公司 | 一种模拟缓冲电路 |
| US10403337B2 (en) * | 2017-08-07 | 2019-09-03 | Micron Technology, Inc. | Output driver for multi-level signaling |
| CN107819462A (zh) * | 2017-09-08 | 2018-03-20 | 灿芯创智微电子技术(北京)有限公司 | 一种新型高压与低压兼容的电路接口 |
| US11114171B2 (en) | 2017-11-08 | 2021-09-07 | Samsung Electronics Co., Ltd. | Non-volatile memory device |
| KR102491576B1 (ko) | 2017-11-08 | 2023-01-25 | 삼성전자주식회사 | 비휘발성 메모리 장치 |
| US10923164B2 (en) * | 2018-09-29 | 2021-02-16 | Intel Corporation | Dual power I/O transmitter |
| US10727833B1 (en) * | 2019-01-18 | 2020-07-28 | Qualcomm Incorporated | High-voltage and low-voltage data paths of a hybrid output driver |
| US10707876B1 (en) * | 2019-01-18 | 2020-07-07 | Qualcomm Incorporated | High-voltage and low-voltage signaling output driver |
| US10707872B1 (en) | 2019-03-20 | 2020-07-07 | Semiconductor Components Industries, Llc | Digital buffer circuit |
| US11307644B2 (en) * | 2019-07-25 | 2022-04-19 | Apple Inc. | Cross-domain power control circuit |
| WO2021189282A1 (zh) * | 2020-03-25 | 2021-09-30 | 深圳市汇顶科技股份有限公司 | 驱动电路以及相关芯片 |
| KR102702558B1 (ko) * | 2022-01-24 | 2024-09-04 | 주식회사 피델릭스 | 출력 신호의 스윙폭 조절이 용이한 출력 버퍼 회로 |
Family Cites Families (42)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5196275A (enExample) * | 1975-02-20 | 1976-08-24 | ||
| US4408135A (en) * | 1979-12-26 | 1983-10-04 | Tokyo Shibaura Denki Kabushiki Kaisha | Multi-level signal generating circuit |
| JPS5942690A (ja) * | 1982-09-03 | 1984-03-09 | Toshiba Corp | 半導体記憶装置 |
| US4731553A (en) * | 1986-09-30 | 1988-03-15 | Texas Instruments Incorporated | CMOS output buffer having improved noise characteristics |
| JPH0728214B2 (ja) | 1987-02-06 | 1995-03-29 | 株式会社日立製作所 | 半導体集積回路装置 |
| US4958321A (en) * | 1988-09-22 | 1990-09-18 | Advanced Micro Devices, Inc. | One transistor flash EPROM cell |
| JPH0777345B2 (ja) * | 1988-11-04 | 1995-08-16 | 三菱電機株式会社 | 半導体装置 |
| JPH03159313A (ja) * | 1989-11-17 | 1991-07-09 | Hitachi Ltd | 出力回路および半導体集積回路装置 |
| JP2843393B2 (ja) * | 1989-12-29 | 1999-01-06 | 沖電気工業株式会社 | 多値レベル出力回路 |
| JPH0435224A (ja) * | 1990-05-28 | 1992-02-06 | Nec Corp | 半導体装置 |
| JPH04192716A (ja) * | 1990-11-26 | 1992-07-10 | Mitsubishi Electric Corp | Mosトランジスタ出力回路 |
| JP3190086B2 (ja) * | 1992-01-10 | 2001-07-16 | 株式会社日立製作所 | 昇圧回路 |
| US5341045A (en) * | 1992-11-06 | 1994-08-23 | Intel Corporation | Programmable input buffer |
| KR960006911B1 (ko) * | 1992-12-31 | 1996-05-25 | 현대전자산업주식회사 | 데이타 출력버퍼 |
| JP3221143B2 (ja) * | 1993-03-22 | 2001-10-22 | セイコーエプソン株式会社 | 多値論理半導体装置 |
| US5399918A (en) | 1993-09-30 | 1995-03-21 | Intel Corporation | Large fan-in, dynamic, bicmos logic gate |
| JPH08223016A (ja) * | 1995-02-14 | 1996-08-30 | Sony Corp | ドライバ回路 |
| JP3369775B2 (ja) * | 1995-03-10 | 2003-01-20 | 株式会社東芝 | 論理回路 |
| JPH09200031A (ja) * | 1996-01-19 | 1997-07-31 | Canon Inc | 相補型トランジスタ出力回路 |
| US6060905A (en) | 1996-02-07 | 2000-05-09 | International Business Machines Corporation | Variable voltage, variable impedance CMOS off-chip driver and receiver interface and circuits |
| US5811997A (en) * | 1996-04-26 | 1998-09-22 | Silicon Graphics, Inc. | Multi-configurable push-pull/open-drain driver circuit |
| US5830795A (en) | 1996-06-10 | 1998-11-03 | Advanced Micro Devices, Inc. | Simplified masking process for programmable logic device manufacture |
| US5739700A (en) * | 1996-09-09 | 1998-04-14 | International Business Machines Corporation | Method and apparatus with dual circuitry for shifting the level of a signal |
| KR19980058197A (ko) * | 1996-12-30 | 1998-09-25 | 문정환 | 제어신호를 이용한 출력패드 회로 |
| US5748303A (en) | 1996-12-31 | 1998-05-05 | Intel Corporation | Light sensing device |
| US5894238A (en) * | 1997-01-28 | 1999-04-13 | Chien; Pien | Output buffer with static and transient pull-up and pull-down drivers |
| US5914618A (en) * | 1997-03-11 | 1999-06-22 | Vlsi Technology, Inc. | Optimum noise isolated I/O with minimized footprint |
| US5877632A (en) * | 1997-04-11 | 1999-03-02 | Xilinx, Inc. | FPGA with a plurality of I/O voltage levels |
| JPH10303733A (ja) * | 1997-05-01 | 1998-11-13 | Hitachi Ltd | 半導体装置 |
| US6040592A (en) | 1997-06-12 | 2000-03-21 | Intel Corporation | Well to substrate photodiode for use in a CMOS sensor on a salicide process |
| US5917348A (en) * | 1997-09-02 | 1999-06-29 | Industrial Technology Research Institute--Computer & Communication Research Labs. | CMOS bidirectional buffer for mixed voltage applications |
| US6057586A (en) | 1997-09-26 | 2000-05-02 | Intel Corporation | Method and apparatus for employing a light shield to modulate pixel color responsivity |
| US6133563A (en) | 1997-09-29 | 2000-10-17 | Intel Corporation | Sensor cell having a soft saturation circuit |
| US5859450A (en) | 1997-09-30 | 1999-01-12 | Intel Corporation | Dark current reducing guard ring |
| US5963053A (en) * | 1997-10-09 | 1999-10-05 | Pericom Semiconductor Corp. | Self-biasing CMOS PECL receiver with wide common-mode range and multi-level-transmit to binary decoder |
| US6118482A (en) | 1997-12-08 | 2000-09-12 | Intel Corporation | Method and apparatus for electrical test of CMOS pixel sensor arrays |
| US5939936A (en) | 1998-01-06 | 1999-08-17 | Intel Corporation | Switchable N-well biasing technique for improved dynamic range and speed performance of analog data bus |
| US6097237A (en) * | 1998-01-29 | 2000-08-01 | Sun Microsystems, Inc. | Overshoot/undershoot protection scheme for low voltage output buffer |
| US6110818A (en) * | 1998-07-15 | 2000-08-29 | Philips Electronics North America Corp. | Semiconductor device with gate electrodes for sub-micron applications and fabrication thereof |
| US6144330A (en) | 1998-09-03 | 2000-11-07 | Intel Corporation | Low power ramp generator for use in single slope A/D |
| US6133749A (en) * | 1999-01-04 | 2000-10-17 | International Business Machines Corporation | Variable impedance output driver circuit using analog biases to match driver output impedance to load input impedance |
| US6452423B1 (en) * | 2000-07-24 | 2002-09-17 | Sun Microsystems, Inc. | Circuit for avoiding contention in one-hot or one-cold multiplexer designs |
-
1999
- 1999-09-10 US US09/393,134 patent/US6512401B2/en not_active Expired - Fee Related
-
2000
- 2000-08-18 KR KR10-2002-7003229A patent/KR100475986B1/ko not_active Expired - Fee Related
- 2000-08-18 CN CNB008155062A patent/CN1241328C/zh not_active Expired - Fee Related
- 2000-08-18 JP JP2001522671A patent/JP4666860B2/ja not_active Expired - Fee Related
- 2000-08-18 AU AU69190/00A patent/AU6919000A/en not_active Abandoned
- 2000-08-18 WO PCT/US2000/022794 patent/WO2001018967A1/en not_active Ceased
- 2000-09-14 TW TW089118470A patent/TW478250B/zh not_active IP Right Cessation
-
2002
- 2002-11-26 US US10/305,530 patent/US6903581B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| US20010043094A1 (en) | 2001-11-22 |
| CN1241328C (zh) | 2006-02-08 |
| US6512401B2 (en) | 2003-01-28 |
| US6903581B2 (en) | 2005-06-07 |
| WO2001018967A1 (en) | 2001-03-15 |
| US20030112041A1 (en) | 2003-06-19 |
| TW478250B (en) | 2002-03-01 |
| JP2003515259A (ja) | 2003-04-22 |
| KR20020036852A (ko) | 2002-05-16 |
| KR100475986B1 (ko) | 2005-03-10 |
| AU6919000A (en) | 2001-04-10 |
| CN1390387A (zh) | 2003-01-08 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP4666860B2 (ja) | 高電圧バスおよび低電圧バス用の出力バッファ | |
| JP3573701B2 (ja) | 出力バッファ回路 | |
| US6424170B1 (en) | Apparatus and method for linear on-die termination in an open drain bus architecture system | |
| JP3487723B2 (ja) | インタフェース回路及び信号伝送方法 | |
| CN110660431B (zh) | 第四代双倍数据率内存的输入输出驱动器 | |
| JP3544819B2 (ja) | 入力回路および出力回路ならびに入出力回路 | |
| JPH1185345A (ja) | 入出力インターフェース回路及び半導体システム | |
| US6285209B1 (en) | Interface circuit and input buffer integrated circuit including the same | |
| KR20080087886A (ko) | 얇은산화물 전계 효과 트랜지스터들을 이용하는 디지털 출력 드라이버 및 입력 버퍼 | |
| JP4041461B2 (ja) | スリープ・モード中の信号状態および漏れ電流の制御 | |
| US7876129B2 (en) | Load sense and active noise reduction for I/O circuit | |
| US8183884B2 (en) | Output driving device in semiconductor device | |
| US8004314B2 (en) | Semiconductor device | |
| US7276939B2 (en) | Semiconductor integrated circuit | |
| US7570088B1 (en) | Input/output buffer for wide supply voltage range | |
| JP4731056B2 (ja) | 半導体集積回路 | |
| KR19980076176A (ko) | 데이터 출력 버퍼 회로 | |
| US7403036B2 (en) | Interface circuit | |
| US6384631B1 (en) | Voltage level shifter with high impedance tri-state output and method of operation | |
| US20040057169A1 (en) | SSTL pull-up pre-driver design using regulated power supply | |
| JP2000278112A (ja) | 出力バッファ回路 | |
| US20110102024A1 (en) | Data output circuit | |
| US20020079922A1 (en) | Dual purpose low power input circuit for a memory device interface | |
| US6777987B2 (en) | Signal buffer for high-speed signal transmission and signal line driving circuit including the same | |
| Chauhan et al. | A high performance, high voltage output buffer in a low voltage CMOS process |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20070625 |
|
| A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20070625 |
|
| A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20100723 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20100817 |
|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20101105 |
|
| TRDD | Decision of grant or rejection written | ||
| A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20101214 |
|
| A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 |
|
| A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20110111 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20140121 Year of fee payment: 3 |
|
| R150 | Certificate of patent or registration of utility model |
Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| LAPS | Cancellation because of no payment of annual fees |