JP4351941B2 - 試験装置及び試験方法 - Google Patents

試験装置及び試験方法 Download PDF

Info

Publication number
JP4351941B2
JP4351941B2 JP2004093310A JP2004093310A JP4351941B2 JP 4351941 B2 JP4351941 B2 JP 4351941B2 JP 2004093310 A JP2004093310 A JP 2004093310A JP 2004093310 A JP2004093310 A JP 2004093310A JP 4351941 B2 JP4351941 B2 JP 4351941B2
Authority
JP
Japan
Prior art keywords
clock
comparison result
device under
under test
result signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2004093310A
Other languages
English (en)
Japanese (ja)
Other versions
JP2005285160A5 (enExample
JP2005285160A (ja
Inventor
秀介 寒竹
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Advantest Corp
Original Assignee
Advantest Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority to JP2004093310A priority Critical patent/JP4351941B2/ja
Application filed by Advantest Corp filed Critical Advantest Corp
Priority to DE602005023850T priority patent/DE602005023850D1/de
Priority to KR1020067022252A priority patent/KR20070027539A/ko
Priority to CN2005800091989A priority patent/CN1934455B/zh
Priority to EP05720641A priority patent/EP1742074B1/en
Priority to PCT/JP2005/004370 priority patent/WO2005093443A1/ja
Priority to EP10075008A priority patent/EP2233936A1/en
Priority to AT05720641T priority patent/ATE483169T1/de
Priority to US11/083,114 priority patent/US7549099B2/en
Priority to TW094108755A priority patent/TWI353454B/zh
Publication of JP2005285160A publication Critical patent/JP2005285160A/ja
Publication of JP2005285160A5 publication Critical patent/JP2005285160A5/ja
Application granted granted Critical
Publication of JP4351941B2 publication Critical patent/JP4351941B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/319—Tester hardware, i.e. output processing circuits
    • G01R31/3193—Tester hardware, i.e. output processing circuits with comparison between actual response and known fault free response
    • G01R31/31932—Comparators
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/56—External testing equipment for static stores, e.g. automatic test equipment [ATE]; Interfaces therefor
    • G11C29/56012—Timing aspects, clock generation, synchronisation
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851—Testing of integrated circuits [IC]
    • G01R31/2882—Testing timing characteristics
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/56—External testing equipment for static stores, e.g. automatic test equipment [ATE]; Interfaces therefor
    • G11C2029/5602—Interface to device under test

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Tests Of Electronic Circuits (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Maintenance And Management Of Digital Transmission (AREA)
  • Application Of Or Painting With Fluid Materials (AREA)
  • Emergency Protection Circuit Devices (AREA)
  • Selective Calling Equipment (AREA)
JP2004093310A 2004-03-26 2004-03-26 試験装置及び試験方法 Expired - Fee Related JP4351941B2 (ja)

Priority Applications (10)

Application Number Priority Date Filing Date Title
JP2004093310A JP4351941B2 (ja) 2004-03-26 2004-03-26 試験装置及び試験方法
AT05720641T ATE483169T1 (de) 2004-03-26 2005-03-11 Testeinrichtung und testverfahren
CN2005800091989A CN1934455B (zh) 2004-03-26 2005-03-11 测试装置与测试方法
EP05720641A EP1742074B1 (en) 2004-03-26 2005-03-11 Test device and test method
PCT/JP2005/004370 WO2005093443A1 (ja) 2004-03-26 2005-03-11 試験装置及び試験方法
EP10075008A EP2233936A1 (en) 2004-03-26 2005-03-11 Test device and test method
DE602005023850T DE602005023850D1 (de) 2004-03-26 2005-03-11 Testeinrichtung und testverfahren
KR1020067022252A KR20070027539A (ko) 2004-03-26 2005-03-11 시험 장치 및 시험 방법
US11/083,114 US7549099B2 (en) 2004-03-26 2005-03-17 Testing apparatus and testing method
TW094108755A TWI353454B (en) 2004-03-26 2005-03-22 Testing device and testing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2004093310A JP4351941B2 (ja) 2004-03-26 2004-03-26 試験装置及び試験方法

Publications (3)

Publication Number Publication Date
JP2005285160A JP2005285160A (ja) 2005-10-13
JP2005285160A5 JP2005285160A5 (enExample) 2007-07-05
JP4351941B2 true JP4351941B2 (ja) 2009-10-28

Family

ID=35056313

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2004093310A Expired - Fee Related JP4351941B2 (ja) 2004-03-26 2004-03-26 試験装置及び試験方法

Country Status (9)

Country Link
US (1) US7549099B2 (enExample)
EP (2) EP1742074B1 (enExample)
JP (1) JP4351941B2 (enExample)
KR (1) KR20070027539A (enExample)
CN (1) CN1934455B (enExample)
AT (1) ATE483169T1 (enExample)
DE (1) DE602005023850D1 (enExample)
TW (1) TWI353454B (enExample)
WO (1) WO2005093443A1 (enExample)

Families Citing this family (42)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4895551B2 (ja) * 2005-08-10 2012-03-14 株式会社アドバンテスト 試験装置および試験方法
US7296203B2 (en) 2005-10-11 2007-11-13 Advantest Corporation Test apparatus, program and recording medium
US7490280B2 (en) * 2006-02-28 2009-02-10 International Business Machines Corporation Microcontroller for logic built-in self test (LBIST)
US7394277B2 (en) * 2006-04-20 2008-07-01 Advantest Corporation Testing apparatus, testing method, jitter filtering circuit, and jitter filtering method
JP3920318B1 (ja) 2006-05-01 2007-05-30 株式会社アドバンテスト 試験装置および試験方法
JP4944771B2 (ja) * 2006-05-01 2012-06-06 株式会社アドバンテスト 試験装置、回路および電子デバイス
JP4792340B2 (ja) * 2006-07-11 2011-10-12 株式会社アドバンテスト 試験装置および試験方法
US7574633B2 (en) 2006-07-12 2009-08-11 Advantest Corporation Test apparatus, adjustment method and recording medium
JP4806599B2 (ja) * 2006-07-20 2011-11-02 株式会社アドバンテスト 電気回路および試験装置
JP4724774B2 (ja) * 2007-03-29 2011-07-13 富士通株式会社 半導体回路装置、メモリテスト回路及び半導体回路装置の試験方法
DE112007003471T5 (de) 2007-04-25 2010-03-18 Advantest Corp. Prüfgerät
WO2009022427A1 (ja) * 2007-08-16 2009-02-19 Advantest Corporation 取得装置、試験装置および製造方法
WO2009031404A1 (ja) 2007-09-04 2009-03-12 Advantest Corporation 伝送回路、送信器、受信器、および、試験装置
JP4967942B2 (ja) * 2007-09-12 2012-07-04 横河電機株式会社 半導体試験装置
CN102057287B (zh) 2008-06-09 2013-08-21 株式会社爱德万测试 测试装置
WO2009150819A1 (ja) 2008-06-10 2009-12-17 株式会社アドバンテスト 試験モジュール、試験装置および試験方法
KR100942953B1 (ko) * 2008-06-30 2010-02-17 주식회사 하이닉스반도체 데이터 전달 회로 및 그를 포함하는 반도체 메모리 장치
WO2010004754A1 (ja) * 2008-07-09 2010-01-14 株式会社アドバンテスト 試験装置、試験方法、及び位相シフタ
WO2010004755A1 (ja) * 2008-07-09 2010-01-14 株式会社アドバンテスト 試験装置、及び試験方法
CN102099700A (zh) 2008-08-01 2011-06-15 株式会社爱德万测试 测试装置
WO2010021131A1 (ja) * 2008-08-19 2010-02-25 株式会社アドバンテスト 試験装置および試験方法
KR101214035B1 (ko) 2008-09-04 2012-12-20 가부시키가이샤 어드밴티스트 시험 장치, 송신 장치, 수신 장치, 시험 방법, 송신 방법, 및 수신 방법
US8819474B2 (en) * 2009-04-03 2014-08-26 Intel Corporation Active training of memory command timing
WO2012007986A1 (ja) * 2010-07-12 2012-01-19 株式会社アドバンテスト 測定回路および試験装置
CN102854451A (zh) * 2011-06-29 2013-01-02 鸿富锦精密工业（深圳）有限公司 印刷电路板的信号群延迟分析系统及方法
CN103116124B (zh) * 2011-11-17 2016-05-18 国民技术股份有限公司 可自校准内部晶振的芯片、晶振校准测试系统及校准方法
CN103280241B (zh) * 2013-04-22 2018-05-01 北京大学深圳研究生院 存储器的测试电路及方法
CN103235254B (zh) * 2013-04-25 2016-03-02 杭州和利时自动化有限公司 一种可编程逻辑器件的检测方法和检测系统
CN105807134A (zh) * 2014-12-31 2016-07-27 无锡华润矽科微电子有限公司 频率测试仪及频率测试系统
CN104836576B (zh) * 2015-04-30 2018-11-02 华南理工大学 一种改进高频畸变波形相位检测的锁相环
CN107703437B (zh) * 2017-09-14 2019-08-13 西安交通大学 一种基于半频静电激振的高频体模态谐振器测试方法
US10719568B2 (en) * 2017-11-28 2020-07-21 International Business Machines Corporation Fixing embedded richtext links in copied related assets
CN108614206B (zh) * 2018-04-03 2020-08-04 上海华力微电子有限公司 一种芯片测试装置、测试方法及测试板
US11102596B2 (en) * 2019-11-19 2021-08-24 Roku, Inc. In-sync digital waveform comparison to determine pass/fail results of a device under test (DUT)
KR102278648B1 (ko) * 2020-02-13 2021-07-16 포스필 주식회사 피시험 디바이스를 테스트하기 위한 방법 및 장치
CN112965910B (zh) * 2021-03-19 2024-06-21 携程旅游信息技术（上海）有限公司 自动化回归测试方法、装置、电子设备、存储介质
CN115327191B (zh) * 2021-05-11 2025-05-06 圣邦微电子（北京）股份有限公司 一种改善芯片测试设备测试精度的电路及方法
USD1037855S1 (en) 2021-06-25 2024-08-06 Diageo North America, Inc. Bottle
USD1023769S1 (en) 2021-07-01 2024-04-23 Diageo North America, Inc. Surface ornamentation for a bottle
USD1051726S1 (en) 2021-07-28 2024-11-19 Diageo North America, Inc. Bottle
JP7712138B2 (ja) * 2021-08-04 2025-07-23 株式会社アドバンテスト 装置
US12207058B2 (en) * 2021-12-29 2025-01-21 The Nielsen Co. (US) LLC Methods, systems, apparatus, and articles of manufacture to determine performance of audience measurement meters

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55164947A (en) * 1979-05-29 1980-12-23 Fujitsu Ltd Test system for logic circuit
US4958243A (en) * 1988-09-15 1990-09-18 International Business Machines Corporation Phase discrimination and data separation method and apparatus
US5057771A (en) * 1990-06-18 1991-10-15 Tetronix, Inc. Phase-locked timebase for electro-optic sampling
US5491439A (en) * 1994-08-31 1996-02-13 International Business Machines Corporation Method and apparatus for reducing jitter in a phase locked loop circuit
EP0717491B1 (en) * 1994-12-13 2003-02-26 Hughes Electronics Corporation High precision, low phase noise synthesizer with vector modulator
JP3710845B2 (ja) * 1995-06-21 2005-10-26 株式会社ルネサステクノロジ 半導体記憶装置
US6285722B1 (en) * 1997-12-05 2001-09-04 Telcordia Technologies, Inc. Method and apparatus for variable bit rate clock recovery
JP4445114B2 (ja) * 2000-01-31 2010-04-07 株式会社アドバンテスト ジッタ測定装置及びその方法
JP3698657B2 (ja) * 2001-06-12 2005-09-21 シャープ株式会社 ゲーティッドクロック生成回路及び回路修正方法
JP2003023353A (ja) * 2001-07-09 2003-01-24 Matsushita Electric Ind Co Ltd Ｐｌｌ回路
JP2003098233A (ja) * 2001-09-27 2003-04-03 Sony Corp 動作時間測定回路
JP4048903B2 (ja) * 2001-11-28 2008-02-20 ヤマハ株式会社 テスト回路
WO2003098806A1 (fr) * 2002-05-17 2003-11-27 Fujitsu Limited Dispositif d'oscillateur verrouille en phase
JP4002471B2 (ja) * 2002-05-30 2007-10-31 エルピーダメモリ株式会社 試験装置
JP4291596B2 (ja) * 2003-02-26 2009-07-08 株式会社ルネサステクノロジ 半導体集積回路の試験装置およびそれを用いた半導体集積回路の製造方法
US6794913B1 (en) * 2003-05-29 2004-09-21 Motorola, Inc. Delay locked loop with digital to phase converter compensation

Also Published As

Publication number Publication date
DE602005023850D1 (de) 2010-11-11
TW200532227A (en) 2005-10-01
EP1742074A1 (en) 2007-01-10
TWI353454B (en) 2011-12-01
US20070006031A1 (en) 2007-01-04
CN1934455B (zh) 2010-05-05
ATE483169T1 (de) 2010-10-15
JP2005285160A (ja) 2005-10-13
EP2233936A1 (en) 2010-09-29
WO2005093443A1 (ja) 2005-10-06
KR20070027539A (ko) 2007-03-09
US7549099B2 (en) 2009-06-16
EP1742074A4 (en) 2009-07-01
CN1934455A (zh) 2007-03-21
EP1742074B1 (en) 2010-09-29

Similar Documents

Publication Publication Date Title
JP4351941B2 (ja) 試験装置及び試験方法
JP6032082B2 (ja) 受信回路及び半導体集積回路
TWI392319B (zh) 通信系統，接收裝置及接收方法
KR101950320B1 (ko) 위상 검출 회로 및 이를 이용한 동기 회로
JP2004145999A (ja) タイミング調整回路及びそれを備えた半導体装置
WO2007086275A1 (ja) 試験装置および試験方法
JP4536610B2 (ja) 半導体試験装置
KR20080089092A (ko) 위상 고정 루프
JP4893052B2 (ja) レシーバ回路及びレシーバ回路試験方法
US8643412B2 (en) Test apparatus, transmission apparatus, receiving apparatus, test method, transmission method and receiving method
JP4895551B2 (ja) 試験装置および試験方法
US7773667B2 (en) Pseudo asynchronous serializer deserializer (SERDES) testing
US6646937B2 (en) Integrated clock generator, particularly for driving a semiconductor memory with a test signal
JP2019097080A (ja) 信号再生回路、光モジュール及び信号再生方法
JPWO2009069244A1 (ja) 送信方法および送信装置
JP2009014363A (ja) 半導体試験装置
JP2017046203A (ja) 半導体デバイス
KR20170027913A (ko) 집적 회로
JP2001345792A (ja) 位相制御回路
JP5423967B2 (ja) クロック・データ再生回路
CN103313099A (zh) 数据接收电路、数据接收装置及方法以及信息处理系统
JP5246608B2 (ja) 多重回路
JP2004078660A (ja) 半導体装置およびシステム
JP2005045734A (ja) フレーム位相同期回路

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20070125

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20070518

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20090707

A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20090727

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120731

Year of fee payment: 3

R150 Certificate of patent or registration of utility model

Free format text: JAPANESE INTERMEDIATE CODE: R150

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120731

Year of fee payment: 3

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130731

Year of fee payment: 4

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130731

Year of fee payment: 4

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

LAPS Cancellation because of no payment of annual fees