JP4176342B2 - 半導体装置およびそのレイアウト方法 - Google Patents

半導体装置およびそのレイアウト方法 Download PDF

Info

Publication number
JP4176342B2
JP4176342B2 JP2001330276A JP2001330276A JP4176342B2 JP 4176342 B2 JP4176342 B2 JP 4176342B2 JP 2001330276 A JP2001330276 A JP 2001330276A JP 2001330276 A JP2001330276 A JP 2001330276A JP 4176342 B2 JP4176342 B2 JP 4176342B2
Authority
JP
Japan
Prior art keywords
wiring
wiring layer
impurity diffusion
diffusion region
region
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2001330276A
Other languages
English (en)
Japanese (ja)
Other versions
JP2003133559A (ja
JP2003133559A5 (enExample
Inventor
吉孝 木村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kawasaki Microelectronics Inc
Original Assignee
Kawasaki Microelectronics Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kawasaki Microelectronics Inc filed Critical Kawasaki Microelectronics Inc
Priority to JP2001330276A priority Critical patent/JP4176342B2/ja
Priority to US10/280,022 priority patent/US6815771B2/en
Publication of JP2003133559A publication Critical patent/JP2003133559A/ja
Priority to US10/956,094 priority patent/US7160786B2/en
Priority to US10/956,049 priority patent/US20050059202A1/en
Publication of JP2003133559A5 publication Critical patent/JP2003133559A5/ja
Application granted granted Critical
Publication of JP4176342B2 publication Critical patent/JP4176342B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/201—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates the substrates comprising an insulating layer on a semiconductor body, e.g. SOI
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01—Manufacture or treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Semiconductor Integrated Circuits (AREA)
  • Thin Film Transistor (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
JP2001330276A 2001-10-29 2001-10-29 半導体装置およびそのレイアウト方法 Expired - Fee Related JP4176342B2 (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP2001330276A JP4176342B2 (ja) 2001-10-29 2001-10-29 半導体装置およびそのレイアウト方法
US10/280,022 US6815771B2 (en) 2001-10-29 2002-10-25 Silicon on insulator device and layout method of the same
US10/956,094 US7160786B2 (en) 2001-10-29 2004-10-04 Silicon on insulator device and layout method of the same
US10/956,049 US20050059202A1 (en) 2001-10-29 2004-10-04 Silicon on insulator device and layout method of the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2001330276A JP4176342B2 (ja) 2001-10-29 2001-10-29 半導体装置およびそのレイアウト方法

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2008189806A Division JP2008294463A (ja) 2008-07-23 2008-07-23 半導体装置

Publications (3)

Publication Number Publication Date
JP2003133559A JP2003133559A (ja) 2003-05-09
JP2003133559A5 JP2003133559A5 (enExample) 2005-06-30
JP4176342B2 true JP4176342B2 (ja) 2008-11-05

Family

ID=19146023

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2001330276A Expired - Fee Related JP4176342B2 (ja) 2001-10-29 2001-10-29 半導体装置およびそのレイアウト方法

Country Status (2)

Country Link
US (3) US6815771B2 (enExample)
JP (1) JP4176342B2 (enExample)

Families Citing this family (36)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100487950B1 (ko) * 2003-02-03 2005-05-06 삼성전자주식회사 활성영역과 중첩되는 게이트 전극 상에 배치된 콘택홀을갖는 반도체 소자
JP2005116623A (ja) * 2003-10-03 2005-04-28 Nec Electronics Corp 半導体装置およびその製造方法
US20050242439A1 (en) * 2004-04-28 2005-11-03 International Business Machines Corporation Method and structure for connecting ground/power networks to prevent charge damage in silicon on insulator
US7439152B2 (en) * 2004-08-27 2008-10-21 Micron Technology, Inc. Methods of forming a plurality of capacitors
JP4726462B2 (ja) * 2004-10-29 2011-07-20 ルネサスエレクトロニクス株式会社 半導体集積装置、その設計方法、設計装置、プログラム、製造方法、および製造装置
US7651897B2 (en) * 2004-12-07 2010-01-26 National Semiconductor Corporation Integrated circuit with metal heat flow path coupled to transistor and method for manufacturing such circuit
JP4507091B2 (ja) * 2004-12-13 2010-07-21 エルピーダメモリ株式会社 半導体装置の製造方法及び半導体装置
CN101111938B (zh) * 2005-01-28 2010-08-11 株式会社半导体能源研究所 半导体器件和制造它的方法
US8112326B2 (en) * 2005-02-03 2012-02-07 TimeSight Systems, Inc. Inventory management tracking control system
JP2006294719A (ja) * 2005-04-07 2006-10-26 Oki Electric Ind Co Ltd 半導体装置
US7688272B2 (en) * 2005-05-30 2010-03-30 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
JP2007103809A (ja) * 2005-10-07 2007-04-19 Oki Electric Ind Co Ltd 半導体装置及び半導体装置の製造方法
US7612399B2 (en) * 2005-11-08 2009-11-03 Samsung Electronics Co., Ltd. Semiconductor integrated circuit devices
JP4947964B2 (ja) * 2005-12-05 2012-06-06 ラピスセミコンダクタ株式会社 半導体装置及びその製造方法
JP2007299898A (ja) * 2006-04-28 2007-11-15 Matsushita Electric Ind Co Ltd 半導体装置および半導体装置のレイアウト設計方法
US20070271540A1 (en) * 2006-05-16 2007-11-22 International Business Machines Corporation Structure and method for reducing susceptibility to charging damage in soi designs
JP4996166B2 (ja) * 2006-08-09 2012-08-08 ラピスセミコンダクタ株式会社 半導体装置及び半導体装置の製造方法
US7880267B2 (en) 2006-08-28 2011-02-01 Micron Technology, Inc. Buried decoupling capacitors, devices and systems including same, and methods of fabrication
KR100817094B1 (ko) 2007-03-27 2008-03-26 삼성전자주식회사 패턴 반복성을 고려하여 플라즈마로 인한 손상을 방지하는정션 다이오드의 배치 방법
JP2008251812A (ja) 2007-03-30 2008-10-16 Toshiba Corp 半導体装置およびその製造方法
JP2010016164A (ja) * 2008-07-03 2010-01-21 Nec Electronics Corp 半導体集積回路の設計方法、製造方法、回路設計プログラム、及び半導体集積回路
JP2011175455A (ja) * 2010-02-24 2011-09-08 Renesas Electronics Corp 半導体集積回路装置、設計方法、設計装置、およびプログラム
TWI605549B (zh) * 2010-08-06 2017-11-11 半導體能源研究所股份有限公司 半導體裝置
JP5766462B2 (ja) * 2011-02-24 2015-08-19 ローム株式会社 半導体装置およびその製造方法
JP6355460B2 (ja) 2014-07-08 2018-07-11 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
WO2016079918A1 (ja) * 2014-11-19 2016-05-26 株式会社ソシオネクスト 半導体集積回路のレイアウト構造
CN106898857A (zh) * 2016-12-20 2017-06-27 西安科锐盛创新科技有限公司 Ge基频率可重构套筒偶极子天线的制备方法
CN106876872A (zh) * 2016-12-20 2017-06-20 西安科锐盛创新科技有限公司 基于AlAs/Ge/AlAs结构的Ge基可重构偶极子天线的制备方法
CN106785335A (zh) * 2016-12-20 2017-05-31 西安科锐盛创新科技有限公司 频率可重构偶极子天线的Ge基等离子pin二极管的制备工艺
CN106785332A (zh) * 2016-12-20 2017-05-31 西安科锐盛创新科技有限公司 应用于可重构环形天线的Ge基异质SPiN二极管的制备方法
CN106816685A (zh) * 2016-12-20 2017-06-09 西安科锐盛创新科技有限公司 频率可重构偶极子天线的spin二极管器件的制造工艺
CN106785333A (zh) * 2016-12-20 2017-05-31 西安科锐盛创新科技有限公司 用于多层全息天线的GaAs‑Ge‑GaAs异质结构的pin二极管制备方法
CN106847680B (zh) * 2016-12-20 2021-03-05 西安科锐盛创新科技有限公司 基于GaAs的频率可重构套筒偶极子天线的制备方法
CN106876873A (zh) * 2016-12-20 2017-06-20 西安科锐盛创新科技有限公司 频率可重构偶极子天线的GaAs基等离子pin二极管的制备方法
JP7071252B2 (ja) * 2018-09-28 2022-05-18 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
KR102496371B1 (ko) 2018-10-30 2023-02-07 삼성전자주식회사 반도체 장치

Family Cites Families (35)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4149176A (en) * 1975-07-18 1979-04-10 Tokyo Shibaura Electric Co., Ltd. Complementary MOSFET device
JP2812388B2 (ja) 1988-01-18 1998-10-22 富士通株式会社 Ｓｏｉ半導体装置の製造方法
US4965872A (en) * 1988-09-26 1990-10-23 Vasudev Prahalad K MOS-enhanced, self-aligned lateral bipolar transistor made of a semiconductor on an insulator
JP3108447B2 (ja) 1991-03-08 2000-11-13 富士通株式会社 半導体装置及びその製造方法
JPH06204467A (ja) 1992-12-28 1994-07-22 Matsushita Electric Ind Co Ltd 半導体集積回路装置及びその製造方法
EP0622850B1 (en) 1993-04-30 1999-04-21 International Business Machines Corporation Process for making an electrostatic discharge protect diode for silicon-on-insulator technology
JPH07106579A (ja) 1993-10-08 1995-04-21 Hitachi Ltd 半導体装置とその製造方法
JP3450909B2 (ja) 1994-09-27 2003-09-29 三菱電機株式会社 半導体装置
WO1996015553A1 (en) 1994-11-15 1996-05-23 Advanced Micro Devices, Inc. Transistor structure with specific gate and pad areas
US5852317A (en) 1995-03-31 1998-12-22 National Semiconductor Corporation Method to reduce gate oxide damage due to non-uniform plasmas in read only memory arrays
JP3527034B2 (ja) * 1996-09-20 2004-05-17 株式会社半導体エネルギー研究所 半導体装置
JP3105815B2 (ja) * 1997-03-28 2000-11-06 日本電気株式会社 半導体集積回路装置
US6432726B2 (en) 1997-03-31 2002-08-13 Artisan Components, Inc. Method and apparatus for reducing process-induced charge buildup
JP3331304B2 (ja) 1997-05-27 2002-10-07 シャープ株式会社 半導体装置の製造方法
JP3111947B2 (ja) * 1997-10-28 2000-11-27 日本電気株式会社 半導体装置、その製造方法
US6392277B1 (en) * 1997-11-21 2002-05-21 Hitachi, Ltd. Semiconductor device
JP4063936B2 (ja) 1997-12-19 2008-03-19 松下電器産業株式会社 半導体集積回路の製造方法
DE69839780D1 (de) * 1997-12-19 2008-09-04 Advanced Micro Devices Inc Silizium auf eine isolator-konfiguration welche mit der massen-cmos-architektur kompatibel ist
JPH11204767A (ja) 1998-01-16 1999-07-30 Mitsubishi Electric Corp 半導体装置
JP3461443B2 (ja) 1998-04-07 2003-10-27 松下電器産業株式会社 半導体装置、半導体装置の設計方法、記録媒体および半導体装置の設計支援装置
US6191020B1 (en) 1998-05-21 2001-02-20 Taiwan Semiconductor Manufacturing Company, Ltd. Conductive interconnection for semiconductor integrated circuit and method of forming the same
JP3414656B2 (ja) * 1998-11-16 2003-06-09 シャープ株式会社 半導体装置及びその製造方法
US6292927B1 (en) 1998-12-07 2001-09-18 Artisan Components, Inc. Reduction of process antenna effects in integrated circuits
JP3298528B2 (ja) 1998-12-10 2002-07-02 日本電気株式会社 回路設計方法および装置、情報記憶媒体、集積回路装置
US6188122B1 (en) * 1999-01-14 2001-02-13 International Business Machines Corporation Buried capacitor for silicon-on-insulator structure
US6150261A (en) 1999-05-25 2000-11-21 United Microelectronics Corp. Method of fabricating semiconductor device for preventing antenna effect
US6358791B1 (en) * 1999-06-04 2002-03-19 International Business Machines Corporation Method for increasing a very-large-scale-integrated (VLSI) capacitor size on bulk silicon and silicon-on-insulator (SOI) wafers and structure formed thereby
JP3885860B2 (ja) * 2000-01-14 2007-02-28 セイコーエプソン株式会社 半導体記憶装置およびその製造方法
US6475838B1 (en) * 2000-03-14 2002-11-05 International Business Machines Corporation Methods for forming decoupling capacitors
JP4776752B2 (ja) * 2000-04-19 2011-09-21 ルネサスエレクトロニクス株式会社 半導体装置
JP2002026311A (ja) * 2000-07-04 2002-01-25 Miyazaki Oki Electric Co Ltd Ｓｏｉ型ｍｏｓ素子およびその製造方法
US6303414B1 (en) 2000-07-12 2001-10-16 Chartered Semiconductor Manufacturing Ltd. Method of forming PID protection diode for SOI wafer
US6498372B2 (en) * 2001-02-16 2002-12-24 International Business Machines Corporation Conductive coupling of electrical structures to a semiconductor device located under a buried oxide layer
US6979868B2 (en) * 2001-04-18 2005-12-27 United Microelectronics Corp. Bypass circuits for reducing plasma damage
JP2003100899A (ja) * 2001-09-27 2003-04-04 Mitsubishi Electric Corp 半導体装置およびその製造方法

Also Published As

Publication number Publication date
US20050059202A1 (en) 2005-03-17
US6815771B2 (en) 2004-11-09
JP2003133559A (ja) 2003-05-09
US7160786B2 (en) 2007-01-09
US20030080385A1 (en) 2003-05-01
US20050042806A1 (en) 2005-02-24

Similar Documents

Publication Publication Date Title
JP4176342B2 (ja) 半導体装置およびそのレイアウト方法
US6611024B2 (en) Method of forming PID protection diode for SOI wafer
CN100552939C (zh) 静电放电保护器件及其制造方法
US7879650B2 (en) Method of providing protection against charging damage in hybrid orientation transistors
US6611027B2 (en) Protection transistor with improved edge structure
US20010042887A1 (en) Integrated circuit devices that use antiparallel diodes to reduce damage during plasma processing
US6462384B2 (en) Semiconductor device for ESD protection
US5932917A (en) Input protective circuit having a diffusion resistance layer
JP3897339B2 (ja) Ｓｏｉデバイスのプラズマ・チャージング損傷を最小化する構造および方法
US20070205465A1 (en) Semiconductor device and fabrication method thereof
US5736772A (en) Bifurcated polysilicon gate electrodes and fabrication methods
US6768201B1 (en) Semiconductor device and method for fabricating the same
US8026552B2 (en) Protection element and fabrication method for the same
JP3574359B2 (ja) 半導体装置
US6573576B2 (en) Semiconductor device and method for fabricating the same
JP2008294463A (ja) 半導体装置
JP4205732B2 (ja) 半導体集積回路装置
JP3254549B2 (ja) 半導体装置及びその製造方法
JPH0324056B2 (enExample)
JP2730532B2 (ja) 半導体装置
JP3669070B2 (ja) 半導体装置及びその製造方法
JP3132480B2 (ja) 半導体装置の製造方法
KR100575861B1 (ko) 반도체 소자의 정전기 방지 구조
JP2007242899A (ja) 半導体装置
JPH09260507A (ja) Ｍｏｓ型半導体装置及びその製造方法

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20041025

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20041025

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20060126

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20080527

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20080723

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20080812

A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20080820

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110829

Year of fee payment: 3

R150 Certificate of patent or registration of utility model

Free format text: JAPANESE INTERMEDIATE CODE: R150

Ref document number: 4176342

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110829

Year of fee payment: 3

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120829

Year of fee payment: 4

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120829

Year of fee payment: 4

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130829

Year of fee payment: 5

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

S111 Request for change of ownership or part of ownership

Free format text: JAPANESE INTERMEDIATE CODE: R313111

Free format text: JAPANESE INTERMEDIATE CODE: R313113

R350 Written notification of registration of transfer

Free format text: JAPANESE INTERMEDIATE CODE: R350

S531 Written request for registration of change of domicile

Free format text: JAPANESE INTERMEDIATE CODE: R313531

R350 Written notification of registration of transfer

Free format text: JAPANESE INTERMEDIATE CODE: R350

LAPS Cancellation because of no payment of annual fees