JP2013102131A - 半導体装置及び半導体装置の作製方法 - Google Patents
半導体装置及び半導体装置の作製方法 Download PDFInfo
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- JP2013102131A JP2013102131A JP2012202541A JP2012202541A JP2013102131A JP 2013102131 A JP2013102131 A JP 2013102131A JP 2012202541 A JP2012202541 A JP 2012202541A JP 2012202541 A JP2012202541 A JP 2012202541A JP 2013102131 A JP2013102131 A JP 2013102131A
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- 229930192474 thiophene Natural products 0.000 description 1
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- 229910052724 xenon Inorganic materials 0.000 description 1
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- NAWDYIZEMPQZHO-UHFFFAOYSA-N ytterbium Chemical compound [Yb] NAWDYIZEMPQZHO-UHFFFAOYSA-N 0.000 description 1
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/417—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
- H01L29/41725—Source or drain electrodes for field effect devices
- H01L29/41733—Source or drain electrodes for field effect devices for thin film transistors with insulated gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66742—Thin film unipolar transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
- H01L27/1225—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
Abstract
【解決手段】酸化物半導体膜、ゲート絶縁膜、及び側面に側壁絶縁層が設けられたゲート電極層が順に積層されたトランジスタを有する半導体装置において、ソース電極層及びドレイン電極層は、酸化物半導体膜及び側壁絶縁層に接して設けられる。該半導体装置の作製工程において、酸化物半導体膜、側壁絶縁層、及びゲート電極層上を覆うように導電膜及び層間絶縁膜を積層し、化学的機械研磨法によりゲート電極層上の層間絶縁膜及び導電膜を除去してソース電極層及びドレイン電極層を形成する。
【選択図】図1
Description
本実施の形態では、半導体装置及び半導体装置の作製方法の一形態を、図1等を用いて説明する。本実施の形態では、半導体装置の一例として酸化物半導体膜を有するトランジスタを示す。
本実施の形態では、本明細書に示すトランジスタを使用し、電力が供給されない状況でも記憶内容の保持が可能で、かつ、書き込み回数にも制限が無い半導体装置の一例を、図面を用いて説明する。
本実施の形態においては、実施の形態1又は実施の形態2に示すトランジスタを使用し、電力が供給されない状況でも記憶内容の保持が可能で、かつ、書き込み回数にも制限が無い半導体装置について、実施の形態2に示した構成と異なる構成について、図6及び図7を用いて説明を行う。
本実施の形態では、先の実施の形態で示した半導体装置を携帯電話、スマートフォン、電子書籍などの携帯機器に応用した場合の例を図8乃至図11を用いて説明する。
上記実施の形態で一例を示したトランジスタを用いて表示機能を有する半導体装置(表示装置ともいう)を作製することができる。また、トランジスタを含む駆動回路の一部または全体を、画素部と同じ基板上に一体形成し、システムオンパネルを形成することができる。
実施の形態1で一例を示したトランジスタを用いて、対象物の情報を読み取るイメージセンサ機能を有する半導体装置を作製することができる。
本実施の形態では、本発明の一態様の電子機器について説明する。具体的には、上記実施の形態で示すトランジスタを有する表示パネル、又は発光パネルを搭載した電子機器について図15を用いて説明する。
Claims (8)
- 酸化物絶縁膜上に設けられたチャネル形成領域を含む酸化物半導体膜と、
前記酸化物半導体膜上にゲート絶縁膜と、
前記ゲート絶縁膜上にゲート電極層及び絶縁膜の積層と、
前記ゲート電極層の側面及び前記絶縁膜の側面を覆う側壁絶縁層と、
前記酸化物半導体膜、前記ゲート絶縁膜の側面及び前記側壁絶縁層の側面に接するソース電極層及びドレイン電極層と、
前記ソース電極層及び前記ドレイン電極層上に層間絶縁膜とを有し、
前記ソース電極層及び前記ドレイン電極層の上面の高さは前記絶縁膜、前記側壁絶縁層、及び前記層間絶縁膜の上面の高さより低く、かつ前記ゲート電極層の上面の高さより高く、
前記酸化物半導体膜において、前記ゲート絶縁膜と重なる領域を含む前記ゲート電極層と重ならない領域は、ドーパントを含むことを特徴とする半導体装置。 - 請求項1において、前記絶縁膜、前記ソース電極層、前記ドレイン電極層、前記側壁絶縁層、及び前記層間絶縁膜上に接して酸化アルミニウム膜が設けられることを特徴とする半導体装置。
- 請求項1又は請求項2において、前記ソース電極層及び前記ドレイン電極層と前記層間絶縁膜との間に酸化アルミニウム膜が設けられることを特徴とする半導体装置。
- 酸化物絶縁膜を形成し、
前記酸化物絶縁膜上に酸化物半導体膜を形成し、
前記酸化物半導体膜上にゲート絶縁膜を形成し、
前記ゲート絶縁膜上に前記酸化物半導体膜と重なるゲート電極層及び絶縁膜を積層し、
前記ゲート電極層及び前記絶縁膜をマスクとして前記酸化物半導体膜にドーパントを選択的に導入し、
前記ゲート絶縁膜上に前記ゲート電極層の側面及び前記絶縁膜の側面を覆う側壁絶縁層を形成し、
前記酸化物半導体膜、前記ゲート絶縁膜、前記ゲート電極層、前記絶縁膜、及び前記側壁絶縁層上に導電膜を形成し、
前記導電膜上に層間絶縁膜を形成し、
前記層間絶縁膜及び前記導電膜を前記ゲート電極層上の前記絶縁膜を露出させるまで化学的機械研磨法により除去して前記導電膜を分断しソース電極層及びドレイン電極層を形成することを特徴とする半導体装置の作製方法。 - 請求項4において、前記絶縁膜、前記ソース電極層、前記ドレイン電極層、前記側壁絶縁層、及び前記層間絶縁膜上に酸化アルミニウム膜を形成することを特徴とする半導体装置の作製方法。
- 請求項4又は請求項5において、前記導電膜上に酸化アルミニウム膜を形成し、前記酸化アルミニウム膜上に前記層間絶縁膜を形成することを特徴とする半導体装置の作製方法。
- 請求項4乃至6のいずれか一項において、前記酸化物半導体膜を形成する前に前記酸化物絶縁膜表面に平坦化処理を行うことを特徴とする半導体装置の作製方法。
- 請求項4乃至7のいずれか一項において、前記側壁絶縁層を形成する前に前記酸化物絶縁膜に酸素を導入することを特徴とする半導体装置の作製方法。
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JP6077806B2 (ja) | 2017-02-08 |
TWI545764B (zh) | 2016-08-11 |
US20130075732A1 (en) | 2013-03-28 |
KR20130032836A (ko) | 2013-04-02 |
US9431545B2 (en) | 2016-08-30 |
TW201318172A (zh) | 2013-05-01 |
KR102128117B1 (ko) | 2020-06-29 |
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