JP2013138184A - 半導体装置の作製方法 - Google Patents
半導体装置の作製方法 Download PDFInfo
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- JP2013138184A JP2013138184A JP2012254988A JP2012254988A JP2013138184A JP 2013138184 A JP2013138184 A JP 2013138184A JP 2012254988 A JP2012254988 A JP 2012254988A JP 2012254988 A JP2012254988 A JP 2012254988A JP 2013138184 A JP2013138184 A JP 2013138184A
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- insulating layer
- oxide semiconductor
- transistor
- oxide
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Classifications
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
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- H01L27/1225—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
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Abstract
【解決手段】酸化物半導体層、ゲート絶縁層、及び側面に側壁絶縁層が設けられたゲート電極層が順に積層されたトランジスタを有する半導体装置において、ソース電極層及びドレイン電極層は、酸化物半導体層及び側壁絶縁層に接して設けられる。該半導体装置の作製工程において、酸化物半導体層、側壁絶縁層、及びゲート電極層上を覆うように導電層及び層間絶縁層を積層し、化学的機械研磨法によりゲート電極層上の層間絶縁層及び導電層を除去してソース電極層及びドレイン電極層を形成する。ゲート絶縁層の形成前に、酸化物半導体層に対して洗浄処理を行う。
【選択図】図1
Description
本実施の形態では、半導体装置及び半導体装置の作製方法の一形態を、図1を用いて説明する。本実施の形態では、半導体装置の一例として酸化物半導体層を有するトランジスタを示す。
本実施の形態では、本明細書に示すトランジスタを使用し、電力が供給されない状況でも記憶内容の保持が可能で、かつ、書き込み回数にも制限が無い半導体装置の一例を、図面を用いて説明する。
本実施の形態では、上記実施の形態に示すトランジスタを使用し、電力が供給されない状況でも記憶内容の保持が可能で、かつ、書き込み回数にも制限が無い半導体装置について、実施の形態2に示した構成と異なる構成について、図6及び図7を用いて説明を行う。
本実施の形態では、先の実施の形態で示した半導体装置を携帯電話、スマートフォン、電子書籍などの携帯機器に応用した場合の例を図8乃至図11を用いて説明する。
上記実施の形態で示したトランジスタを用いて、対象物の情報を読み取るイメージセンサ機能を有する半導体装置を作製することができる。
本実施の形態では、上述の実施の形態で説明した半導体装置を電子機器に適用する場合について、図23を用いて説明する。本実施の形態では、コンピュータ、携帯電話機(携帯電話、携帯電話装置ともいう)、携帯情報端末(携帯型ゲーム機、音響再生装置なども含む)、デジタルカメラ、デジタルビデオカメラ、電子ペーパー、テレビジョン装置(テレビ、またはテレビジョン受信機ともいう)などの電子機器に、上述の半導体装置を適用する場合について説明する。
2 実施例試料
3 実施例試料
4 実施例試料
106 素子分離絶縁層
108 ゲート絶縁層
110 ゲート電極
116 チャネル形成領域
120 不純物領域
124 金属間化合物領域
128 絶縁層
130 絶縁層
135 層間絶縁層
137 絶縁層
144 酸化物半導体層
146 ゲート絶縁層
148 ゲート電極
150 絶縁層
152 絶縁層
153 導電層
156 配線
160 トランジスタ
162 トランジスタ
164 容量素子
172 導電層
173 絶縁層
174 導電層
176 絶縁層
180 絶縁層
185 基板
250 メモリセル
251 メモリセルアレイ
253 周辺回路
254 容量素子
256 絶縁層
258 絶縁層
260 配線
262 導電層
400 基板
401 ゲート電極層
402 ゲート絶縁層
403 酸化物半導体層
407 絶縁層
409 チャネル形成領域
410 絶縁層
413 絶縁層
415 層間絶縁層
421 ドーパント
436 酸化物絶縁層
442 ゲート絶縁層
444 導電層
445 導電層
446 絶縁層
501 実施例トランジスタ
502 実施例トランジスタ
601 基板
602 フォトダイオード
608 接着層
613 基板
631 絶縁層
632 層間絶縁層
633 絶縁層
634 層間絶縁層
640 トランジスタ
642 電極層
643 導電層
645 導電層
650 遮光層
656 トランジスタ
658 フォトダイオードリセット信号線
659 ゲート信号線
671 フォトセンサ出力信号線
672 フォトセンサ基準信号線
701 領域
702 領域
711 元素濃度プロファイル
712 元素濃度プロファイル
713 元素濃度プロファイル
714 元素濃度プロファイル
721 元素濃度プロファイル
722 元素濃度プロファイル
723 元素濃度プロファイル
724 元素濃度プロファイル
731 元素濃度プロファイル
732 元素濃度プロファイル
733 元素濃度プロファイル
734 元素濃度プロファイル
741 元素濃度プロファイル
742 元素濃度プロファイル
743 元素濃度プロファイル
744 元素濃度プロファイル
751 元素濃度プロファイル
752 元素濃度プロファイル
753 元素濃度プロファイル
761 元素濃度プロファイル
762 元素濃度プロファイル
763 元素濃度プロファイル
771 元素濃度プロファイル
772 元素濃度プロファイル
773 元素濃度プロファイル
781 元素濃度プロファイル
782 元素濃度プロファイル
783 元素濃度プロファイル
801 トランジスタ
803 トランジスタ
804 トランジスタ
805 トランジスタ
806 トランジスタ
807 Xデコーダー
808 Yデコーダー
811 トランジスタ
812 保持容量
813 Xデコーダー
814 Yデコーダー
901 RF回路
902 アナログベースバンド回路
903 デジタルベースバンド回路
904 バッテリー
905 電源回路
906 アプリケーションプロセッサ
907 CPU
908 DSP
909 インターフェイス
910 フラッシュメモリ
911 ディスプレイコントローラ
912 メモリ回路
913 ディスプレイ
914 表示部
915 ソースドライバ
916 ゲートドライバ
917 音声回路
918 キーボード
919 タッチセンサ
950 メモリ回路
951 メモリコントローラ
952 メモリ
953 メモリ
954 スイッチ
955 スイッチ
956 ディスプレイコントローラ
957 ディスプレイ
1001 バッテリー
1002 電源回路
1003 マイクロプロセッサ
1004 フラッシュメモリ
1005 音声回路
1006 キーボード
1007 メモリ回路
1008 タッチパネル
1009 ディスプレイ
1010 ディスプレイコントローラ
1701 筐体
1702 筐体
1703 表示部
1704 キーボード
1711 本体
1712 スタイラス
1713 表示部
1714 操作ボタン
1715 外部インターフェイス
1720 電子書籍
1721 筐体
1723 筐体
1725 表示部
1727 表示部
1731 電源スイッチ
1733 操作キー
1735 スピーカー
1737 軸部
1740 筐体
1741 筐体
1742 表示パネル
1743 スピーカー
1744 マイクロフォン
1745 タッチパネル
1746 ポインティングデバイス
1747 カメラ用レンズ
1748 外部接続端子
1749 太陽電池セル
1750 外部メモリスロット
1761 本体
1763 接眼部
1764 操作スイッチ
1765 表示部
1766 バッテリー
1767 表示部
1770 テレビジョン装置
1771 筐体
1773 表示部
1775 スタンド
1780 リモコン操作機
136a 側壁絶縁層
136b 側壁絶縁層
142a 電極層
142b 電極層
175a 側壁絶縁層
175b 側壁絶縁層
251a メモリセルアレイ
251b メモリセルアレイ
404a 低抵抗領域
404b 低抵抗領域
405a ソース電極層
405b ドレイン電極層
412a 側壁絶縁層
412b 側壁絶縁層
435a 配線層
435b 配線層
440a トランジスタ
440b トランジスタ
440c トランジスタ
606a 半導体層
606b 半導体層
606c 半導体層
641a 電極層
641b 電極層
Claims (6)
- 酸化物絶縁層を形成し、
前記酸化物絶縁層上に酸化物半導体層を形成し、
前記酸化物半導体層の一部を選択的にエッチングして島状の酸化物半導体層を形成し、
前記島状の酸化物半導体層の上面および側面を洗浄処理し、
前記島状の酸化物半導体層上にゲート絶縁層を形成し、
前記ゲート絶縁層上に前記島状の酸化物半導体層と重なるゲート電極層及び絶縁層を積層し、
前記ゲート電極層及び前記絶縁層をマスクとして前記島状の酸化物半導体層の一部にドーパントを導入し、
前記ゲート絶縁層上に前記ゲート電極層及び前記絶縁層の側面を覆う側壁絶縁層を形成し、
前記島状の酸化物半導体層、前記ゲート絶縁層、前記ゲート電極層、前記絶縁層、及び前記側壁絶縁層上に導電層を形成し、
前記導電層上に層間絶縁層を形成し、
前記層間絶縁層及び前記導電層を前記ゲート電極層上の前記絶縁層を露出させるまで化学的機械研磨法により除去して前記導電層を分断しソース電極層及びドレイン電極層を形成することを特徴とする半導体装置の作製方法。 - 請求項1において、
前記洗浄処理は、酸性の溶液により行うことを特徴とする半導体装置の作製方法。 - 請求項1または請求項2において、
前記洗浄処理は、希フッ酸またはシュウ酸を含む溶液により行うことを特徴とする半導体装置の作製方法。 - 請求項1乃至請求項3のいずれか一項において、
前記酸化物絶縁層に酸素を導入することを特徴とする半導体装置の作製方法。 - 請求項1乃至請求項4のいずれか一項において、
前記酸化物半導体層に酸素を導入することを特徴とする半導体装置の作製方法。 - 請求項1乃至請求項5のいずれか一項において、
前記絶縁層、前記ソース電極層、前記ドレイン電極層、前記側壁絶縁層、及び前記層間絶縁層上に酸化アルミニウムを形成することを特徴とする半導体装置の作製方法。
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US20170200828A1 (en) | 2017-07-13 |
JP2017041644A (ja) | 2017-02-23 |
TW201330114A (zh) | 2013-07-16 |
KR102068623B1 (ko) | 2020-01-21 |
CN107123683A (zh) | 2017-09-01 |
JP2018078313A (ja) | 2018-05-17 |
KR20130061075A (ko) | 2013-06-10 |
CN103137495B (zh) | 2017-04-12 |
TWI588910B (zh) | 2017-06-21 |
TW201727769A (zh) | 2017-08-01 |
US9608123B2 (en) | 2017-03-28 |
US8956929B2 (en) | 2015-02-17 |
US20150137124A1 (en) | 2015-05-21 |
TWI669760B (zh) | 2019-08-21 |
CN107123683B (zh) | 2021-02-05 |
JP6423512B2 (ja) | 2018-11-14 |
US10224433B2 (en) | 2019-03-05 |
JP6267308B2 (ja) | 2018-01-24 |
JP6034670B2 (ja) | 2016-11-30 |
TW201640588A (zh) | 2016-11-16 |
TWI556319B (zh) | 2016-11-01 |
US20130137213A1 (en) | 2013-05-30 |
CN103137495A (zh) | 2013-06-05 |
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