JP2007103629A5 - - Google Patents

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Publication number
JP2007103629A5
JP2007103629A5 JP2005290889A JP2005290889A JP2007103629A5 JP 2007103629 A5 JP2007103629 A5 JP 2007103629A5 JP 2005290889 A JP2005290889 A JP 2005290889A JP 2005290889 A JP2005290889 A JP 2005290889A JP 2007103629 A5 JP2007103629 A5 JP 2007103629A5
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JP
Japan
Prior art keywords
potential
transistor
well
memory cell
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2005290889A
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English (en)
Japanese (ja)
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JP4822791B2 (ja
JP2007103629A (ja
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Publication date
Priority claimed from JP2005290889A external-priority patent/JP4822791B2/ja
Priority to JP2005290889A priority Critical patent/JP4822791B2/ja
Application filed filed Critical
Priority to TW095133482A priority patent/TW200729461A/zh
Priority to CN2006101418195A priority patent/CN1945739B/zh
Priority to CN2010102119252A priority patent/CN101908372A/zh
Priority to KR1020060097245A priority patent/KR20070038015A/ko
Priority to US11/541,542 priority patent/US7639525B2/en
Publication of JP2007103629A publication Critical patent/JP2007103629A/ja
Publication of JP2007103629A5 publication Critical patent/JP2007103629A5/ja
Priority to US12/624,272 priority patent/US7995377B2/en
Priority to US13/021,556 priority patent/US8203868B2/en
Publication of JP4822791B2 publication Critical patent/JP4822791B2/ja
Application granted granted Critical
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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JP2005290889A 2005-10-04 2005-10-04 半導体記憶装置 Expired - Lifetime JP4822791B2 (ja)

Priority Applications (8)

Application Number Priority Date Filing Date Title
JP2005290889A JP4822791B2 (ja) 2005-10-04 2005-10-04 半導体記憶装置
TW095133482A TW200729461A (en) 2005-10-04 2006-09-11 Semiconductor memory device
CN2006101418195A CN1945739B (zh) 2005-10-04 2006-09-30 半导体存储器件
CN2010102119252A CN101908372A (zh) 2005-10-04 2006-09-30 半导体存储器件
KR1020060097245A KR20070038015A (ko) 2005-10-04 2006-10-02 반도체기억장치
US11/541,542 US7639525B2 (en) 2005-10-04 2006-10-03 Semiconductor memory device
US12/624,272 US7995377B2 (en) 2005-10-04 2009-11-23 Semiconductor memory device
US13/021,556 US8203868B2 (en) 2005-10-04 2011-02-04 Semiconductor memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2005290889A JP4822791B2 (ja) 2005-10-04 2005-10-04 半導体記憶装置

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2011011761A Division JP2011090782A (ja) 2011-01-24 2011-01-24 半導体記憶装置

Publications (3)

Publication Number Publication Date
JP2007103629A JP2007103629A (ja) 2007-04-19
JP2007103629A5 true JP2007103629A5 (cg-RX-API-DMAC7.html) 2008-10-23
JP4822791B2 JP4822791B2 (ja) 2011-11-24

Family

ID=37901726

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2005290889A Expired - Lifetime JP4822791B2 (ja) 2005-10-04 2005-10-04 半導体記憶装置

Country Status (5)

Country Link
US (3) US7639525B2 (cg-RX-API-DMAC7.html)
JP (1) JP4822791B2 (cg-RX-API-DMAC7.html)
KR (1) KR20070038015A (cg-RX-API-DMAC7.html)
CN (2) CN101908372A (cg-RX-API-DMAC7.html)
TW (1) TW200729461A (cg-RX-API-DMAC7.html)

Families Citing this family (52)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4822791B2 (ja) * 2005-10-04 2011-11-24 ルネサスエレクトロニクス株式会社 半導体記憶装置
US8077510B2 (en) * 2006-12-07 2011-12-13 National Institute Of Advanced Industrial Science And Technology SRAM device
CN101680018B (zh) * 2007-01-10 2017-03-15 海莫希尔有限责任公司 体外血液动力学的内皮/平滑肌细胞共培养模型在鉴定血管疾病的新型治疗靶标中的应用
US7466581B2 (en) * 2007-03-02 2008-12-16 Taiwan Semiconductor Manufacturing Company, Ltd. SRAM design with separated VSS
WO2008114716A1 (ja) * 2007-03-20 2008-09-25 National Institute Of Advanced Industrial Science And Technology Ｓｒａｍ装置
WO2009004535A2 (en) * 2007-06-29 2009-01-08 Nxp B.V. Static memory devices
US7564725B2 (en) * 2007-08-31 2009-07-21 Texas Instruments Incorporated SRAM bias for read and write
US7613031B2 (en) * 2007-09-17 2009-11-03 Micron Technology, Inc. System, apparatus, and method to increase read and write stability of scaled SRAM memory cells
US8217427B2 (en) 2007-10-02 2012-07-10 International Business Machines Corporation High density stable static random access memory
JP2009093702A (ja) * 2007-10-04 2009-04-30 Sony Corp 半導体記憶装置及びその駆動方法
US7742325B2 (en) * 2007-12-17 2010-06-22 Suvolta, Inc. Swapped-body RAM architecture
JP4844619B2 (ja) * 2008-03-27 2011-12-28 株式会社デンソー 半導体メモリ装置
US8081502B1 (en) * 2008-12-29 2011-12-20 Altera Corporation Memory elements with body bias control
WO2010104918A1 (en) * 2009-03-10 2010-09-16 Contour Semiconductor, Inc. Three-dimensional memory array comprising vertical switches having three terminals
EP2320454A1 (en) * 2009-11-05 2011-05-11 S.O.I.Tec Silicon on Insulator Technologies Substrate holder and clipping device
CN101714405B (zh) * 2009-11-06 2012-06-27 东南大学 限漏流的高鲁棒亚阈值存储单元电路
FR2953641B1 (fr) * 2009-12-08 2012-02-10 S O I Tec Silicon On Insulator Tech Circuit de transistors homogenes sur seoi avec grille de controle arriere enterree sous la couche isolante
FR2957193B1 (fr) 2010-03-03 2012-04-20 Soitec Silicon On Insulator Cellule a chemin de donnees sur substrat seoi avec grille de controle arriere enterree sous la couche isolante
FR2953636B1 (fr) * 2009-12-08 2012-02-10 Soitec Silicon On Insulator Procede de commande d'une cellule memoire dram sur seoi disposant d'une seconde grille de controle enterree sous la couche isolante
US8508289B2 (en) * 2009-12-08 2013-08-13 Soitec Data-path cell on an SeOI substrate with a back control gate beneath the insulating layer
FR2953643B1 (fr) * 2009-12-08 2012-07-27 Soitec Silicon On Insulator Cellule memoire flash sur seoi disposant d'une seconde grille de controle enterree sous la couche isolante
FR2955195B1 (fr) * 2010-01-14 2012-03-09 Soitec Silicon On Insulator Dispositif de comparaison de donnees dans une memoire adressable par contenu sur seoi
FR2955203B1 (fr) * 2010-01-14 2012-03-23 Soitec Silicon On Insulator Cellule memoire dont le canal traverse une couche dielectrique enterree
FR2955204B1 (fr) * 2010-01-14 2012-07-20 Soitec Silicon On Insulator Cellule memoire dram disposant d'un injecteur bipolaire vertical
FR2955200B1 (fr) 2010-01-14 2012-07-20 Soitec Silicon On Insulator Dispositif, et son procede de fabrication, disposant d'un contact entre regions semi-conductrices a travers une couche isolante enterree
FR2957186B1 (fr) * 2010-03-08 2012-09-28 Soitec Silicon On Insulator Cellule memoire de type sram
FR2957449B1 (fr) * 2010-03-11 2022-07-15 S O I Tec Silicon On Insulator Tech Micro-amplificateur de lecture pour memoire
JP5278971B2 (ja) * 2010-03-30 2013-09-04 独立行政法人産業技術総合研究所 Ｓｒａｍ装置
FR2958441B1 (fr) 2010-04-02 2012-07-13 Soitec Silicon On Insulator Circuit pseudo-inverseur sur seoi
EP2378549A1 (en) 2010-04-06 2011-10-19 S.O.I.Tec Silicon on Insulator Technologies Method for manufacturing a semiconductor substrate
EP2381470B1 (en) 2010-04-22 2012-08-22 Soitec Semiconductor device comprising a field-effect transistor in a silicon-on-insulator structure
IT1400750B1 (it) 2010-06-30 2013-07-02 St Microelectronics Srl Memoria sram 5t per applicazioni a bassa tensione
IT1400749B1 (it) * 2010-06-30 2013-07-02 St Microelectronics Srl Cella sram configurabile dinamicamente per funzionamento a bassa tensione
US9865330B2 (en) * 2010-11-04 2018-01-09 Qualcomm Incorporated Stable SRAM bitcell design utilizing independent gate FinFET
US10629250B2 (en) * 2010-11-16 2020-04-21 Texas Instruments Incorporated SRAM cell having an n-well bias
US9029956B2 (en) * 2011-10-26 2015-05-12 Global Foundries, Inc. SRAM cell with individual electrical device threshold control
CN102522115A (zh) * 2011-12-28 2012-06-27 东南大学 一种提高亚阈值sram存储单元工艺鲁棒性的电路
CN103474093B (zh) * 2012-06-07 2016-08-03 中芯国际集成电路制造(上海)有限公司 控制灵敏放大器开启的追踪电路和采用追踪电路的sram
US9159402B2 (en) * 2012-07-02 2015-10-13 Stmicroelectronics International N.V. SRAM bitcell implemented in double gate technology
FR2998092B1 (fr) * 2012-11-13 2014-11-07 Commissariat Energie Atomique Interposeur en graphene et procede de fabrication d'un tel interposeur
CN103903645A (zh) * 2012-12-28 2014-07-02 中国科学院微电子研究所 一种辐射加固设计的静态随机存储单元
US9111635B2 (en) * 2013-01-25 2015-08-18 Qualcomm Incorporated Static random access memories (SRAM) with read-preferred cell structures, write drivers, related systems, and methods
KR102215412B1 (ko) * 2014-07-10 2021-02-15 에스케이하이닉스 주식회사 반도체 메모리 장치
FR3025653B1 (fr) * 2014-09-10 2017-12-22 Commissariat Energie Atomique Dispositif a cellules memoires sram comportant des moyens de polarisation des caissons des transistors de lecture des cellules memoires
JP6501695B2 (ja) * 2015-11-13 2019-04-17 ルネサスエレクトロニクス株式会社 半導体装置
US9824748B1 (en) 2016-12-30 2017-11-21 Globalfoundries Inc. SRAM bitcell structures facilitating biasing of pull-up transistors
US9799661B1 (en) 2017-01-03 2017-10-24 Globalfoundries Inc. SRAM bitcell structures facilitating biasing of pull-down transistors
US9734897B1 (en) * 2017-01-03 2017-08-15 Globalfoundries Inc. SRAM bitcell structures facilitating biasing of pass gate transistors
US10211206B1 (en) * 2017-11-01 2019-02-19 Globalfoundries Inc. Two-port vertical SRAM circuit structure and method for producing the same
JP2020091930A (ja) * 2018-12-07 2020-06-11 キオクシア株式会社 半導体記憶装置
CN109785884A (zh) * 2019-01-15 2019-05-21 上海华虹宏力半导体制造有限公司 静态随机存取存储器存储单元
JP6901515B2 (ja) * 2019-04-04 2021-07-14 ウィンボンド エレクトロニクス コーポレーション 半導体装置

Family Cites Families (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0564204A3 (en) 1992-03-30 1994-09-28 Mitsubishi Electric Corp Semiconductor device
JP2939086B2 (ja) * 1992-03-30 1999-08-25 三菱電機株式会社 半導体装置
JPH07230693A (ja) * 1994-02-16 1995-08-29 Toshiba Corp 半導体記憶装置
JP3085455B2 (ja) * 1997-06-25 2000-09-11 日本電気株式会社 スタティックｒａｍ
JPH1139879A (ja) 1997-07-16 1999-02-12 Victor Co Of Japan Ltd 半導体装置
JPH1153891A (ja) * 1997-08-05 1999-02-26 Oki Micro Design Miyazaki:Kk 半導体記憶装置
JP2001053168A (ja) * 1999-08-16 2001-02-23 Hitachi Ltd 半導体集積回路装置
JP2001338993A (ja) 2000-03-24 2001-12-07 Toshiba Corp 半導体装置
EP2323164B1 (en) * 2000-08-14 2015-11-25 SanDisk 3D LLC Multilevel memory array and method for making same
JP3749101B2 (ja) * 2000-09-14 2006-02-22 株式会社ルネサステクノロジ 半導体装置
US6898111B2 (en) 2001-06-28 2005-05-24 Matsushita Electric Industrial Co., Ltd. SRAM device
JP2003086713A (ja) 2001-06-28 2003-03-20 Matsushita Electric Ind Co Ltd Ｓｒａｍ装置
JP3983032B2 (ja) 2001-11-09 2007-09-26 沖電気工業株式会社 半導体記憶装置
JP3808763B2 (ja) * 2001-12-14 2006-08-16 株式会社東芝 半導体メモリ装置およびその製造方法
JP3520283B2 (ja) * 2002-04-16 2004-04-19 沖電気工業株式会社 半導体記憶装置
JP4162076B2 (ja) * 2002-05-30 2008-10-08 株式会社ルネサステクノロジ 半導体記憶装置
JP4376495B2 (ja) * 2002-08-13 2009-12-02 富士通マイクロエレクトロニクス株式会社 半導体メモリ
JP2004241755A (ja) * 2003-01-15 2004-08-26 Renesas Technology Corp 半導体装置
TWI244729B (en) * 2003-08-28 2005-12-01 Renesas Tech Corp Semiconductor memory device and method of manufacturing the same
JP2005085349A (ja) 2003-09-08 2005-03-31 Matsushita Electric Ind Co Ltd 半導体記憶装置
US7112815B2 (en) * 2004-02-25 2006-09-26 Micron Technology, Inc. Multi-layer memory arrays
JP2005251776A (ja) * 2004-03-01 2005-09-15 Renesas Technology Corp 半導体装置とその製造方法
JP4822791B2 (ja) * 2005-10-04 2011-11-24 ルネサスエレクトロニクス株式会社 半導体記憶装置
US7512030B2 (en) * 2006-08-29 2009-03-31 Texas Instruments Incorporated Memory with low power mode for WRITE

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