IT1400750B1 - Memoria sram 5t per applicazioni a bassa tensione - Google Patents

Memoria sram 5t per applicazioni a bassa tensione

Info

Publication number
IT1400750B1
IT1400750B1 ITMI2010A001196A ITMI20101196A IT1400750B1 IT 1400750 B1 IT1400750 B1 IT 1400750B1 IT MI2010A001196 A ITMI2010A001196 A IT MI2010A001196A IT MI20101196 A ITMI20101196 A IT MI20101196A IT 1400750 B1 IT1400750 B1 IT 1400750B1
Authority
IT
Italy
Prior art keywords
sram
memory
low voltage
voltage applications
applications
Prior art date
Application number
ITMI2010A001196A
Other languages
English (en)
Inventor
Danilo Rimondi
Carolina Selva
Original Assignee
St Microelectronics Srl
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by St Microelectronics Srl filed Critical St Microelectronics Srl
Priority to ITMI2010A001196A priority Critical patent/IT1400750B1/it
Priority to US13/173,272 priority patent/US8537602B2/en
Publication of ITMI20101196A1 publication Critical patent/ITMI20101196A1/it
Application granted granted Critical
Publication of IT1400750B1 publication Critical patent/IT1400750B1/it

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/412—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using field-effect transistors only
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G11C11/417—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
    • G11C11/419—Read-write [R-W] circuits
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B10/00—Static random access memory [SRAM] devices
    • H10B10/12—Static random access memory [SRAM] devices comprising a MOSFET load element

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Static Random-Access Memory (AREA)
  • Control Of Electrical Variables (AREA)
ITMI2010A001196A 2010-06-30 2010-06-30 Memoria sram 5t per applicazioni a bassa tensione IT1400750B1 (it)

Priority Applications (2)

Application Number Priority Date Filing Date Title
ITMI2010A001196A IT1400750B1 (it) 2010-06-30 2010-06-30 Memoria sram 5t per applicazioni a bassa tensione
US13/173,272 US8537602B2 (en) 2010-06-30 2011-06-30 5T SRAM memory for low voltage applications

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
ITMI2010A001196A IT1400750B1 (it) 2010-06-30 2010-06-30 Memoria sram 5t per applicazioni a bassa tensione

Publications (2)

Publication Number Publication Date
ITMI20101196A1 ITMI20101196A1 (it) 2011-12-31
IT1400750B1 true IT1400750B1 (it) 2013-07-02

Family

ID=43063887

Family Applications (1)

Application Number Title Priority Date Filing Date
ITMI2010A001196A IT1400750B1 (it) 2010-06-30 2010-06-30 Memoria sram 5t per applicazioni a bassa tensione

Country Status (2)

Country Link
US (1) US8537602B2 (it)
IT (1) IT1400750B1 (it)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5676075B2 (ja) * 2008-11-17 2015-02-25 ピーエスフォー ルクスコ エスエイアールエルＰＳ４ Ｌｕｘｃｏ Ｓ．ａ．ｒ．ｌ． 半導体装置
IT1400749B1 (it) 2010-06-30 2013-07-02 St Microelectronics Srl Cella sram configurabile dinamicamente per funzionamento a bassa tensione
TWI490857B (zh) * 2012-12-27 2015-07-01 修平學校財團法人修平科技大學 靜態隨機存取記憶體
TWI490868B (zh) * 2012-12-27 2015-07-01 修平學校財團法人修平科技大學 ５ｔ靜態隨機存取記憶體
TWI500028B (zh) * 2012-12-27 2015-09-11 Univ Hsiuping Sci & Tech 單埠靜態隨機存取記憶體
MX362045B (es) * 2015-02-17 2019-01-07 Hubbell Inc Ensambles de carcasa con insertos de sujeción de cable e insertos de sujeción de cable para tales carcasas.
US10515969B2 (en) * 2016-11-17 2019-12-24 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device and manufacturing method thereof
US11888002B2 (en) 2018-12-17 2024-01-30 Meta Platforms Technologies, Llc Dynamically programmable image sensor
US11962928B2 (en) 2018-12-17 2024-04-16 Meta Platforms Technologies, Llc Programmable pixel array
US11935291B2 (en) 2019-10-30 2024-03-19 Meta Platforms Technologies, Llc Distributed sensor system
US11948089B2 (en) 2019-11-07 2024-04-02 Meta Platforms Technologies, Llc Sparse image sensing and processing
US11825228B2 (en) 2020-05-20 2023-11-21 Meta Platforms Technologies, Llc Programmable pixel array having multiple power domains
US11935575B1 (en) * 2020-12-23 2024-03-19 Meta Platforms Technologies, Llc Heterogeneous memory system
CN113971971B (zh) * 2021-12-22 2022-05-20 中科南京智能技术研究院 一种带正负计算的存内计算单元、阵列及装置

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5943258A (en) * 1997-12-24 1999-08-24 Texas Instruments Incorporated Memory with storage cells having SOI drive and access transistors with tied floating body connections
US6998722B2 (en) * 2002-07-08 2006-02-14 Viciciv Technology Semiconductor latches and SRAM devices
US7092279B1 (en) 2003-03-24 2006-08-15 Sheppard Douglas P Shared bit line memory device and method
KR100706737B1 (ko) * 2003-08-28 2007-04-12 가부시끼가이샤 르네사스 테크놀로지 반도체 기억 장치 및 그 제조 방법
JP4287768B2 (ja) 2004-03-16 2009-07-01 パナソニック株式会社 半導体記憶装置
US7176125B2 (en) * 2004-07-23 2007-02-13 Taiwan Semiconductor Manufacturing Company, Ltd. Method of forming a static random access memory with a buried local interconnect
JP4822791B2 (ja) 2005-10-04 2011-11-24 ルネサスエレクトロニクス株式会社 半導体記憶装置
JP2007193928A (ja) 2005-12-19 2007-08-02 Matsushita Electric Ind Co Ltd 半導体記憶装置
US7548365B2 (en) * 2007-06-06 2009-06-16 Texas Instruments Incorporated Semiconductor device and method comprising a high voltage reset driver and an isolated memory array
JP2009093702A (ja) * 2007-10-04 2009-04-30 Sony Corp 半導体記憶装置及びその駆動方法

Also Published As

Publication number Publication date
US20120002459A1 (en) 2012-01-05
US8537602B2 (en) 2013-09-17
ITMI20101196A1 (it) 2011-12-31

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