FR2955200B1 - Dispositif, et son procede de fabrication, disposant d'un contact entre regions semi-conductrices a travers une couche isolante enterree - Google Patents
Dispositif, et son procede de fabrication, disposant d'un contact entre regions semi-conductrices a travers une couche isolante enterreeInfo
- Publication number
- FR2955200B1 FR2955200B1 FR1050244A FR1050244A FR2955200B1 FR 2955200 B1 FR2955200 B1 FR 2955200B1 FR 1050244 A FR1050244 A FR 1050244A FR 1050244 A FR1050244 A FR 1050244A FR 2955200 B1 FR2955200 B1 FR 2955200B1
- Authority
- FR
- France
- Prior art keywords
- insulated
- manufacturing
- contact
- semiconductor regions
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1203—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body the substrate comprising an insulating body on a semiconductor body, e.g. SOI
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/74—Making of localized buried regions, e.g. buried collector layers, internal connections substrate contacts
- H01L21/743—Making of internal connections, substrate contacts
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/84—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/73—Bipolar junction transistors
- H01L29/732—Vertical transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/20—DRAM devices comprising floating-body transistors, e.g. floating-body cells
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7841—Field effect transistors with field effect produced by an insulated gate with floating body, e.g. programmable transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
- H01L29/78639—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device with a drain or source connected to a bulk conducting substrate
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/01—Manufacture or treatment
- H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
- H10B12/05—Making the transistor
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Semiconductor Memories (AREA)
- Bipolar Transistors (AREA)
- Thin Film Transistor (AREA)
- Element Separation (AREA)
Priority Applications (8)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR1050244A FR2955200B1 (fr) | 2010-01-14 | 2010-01-14 | Dispositif, et son procede de fabrication, disposant d'un contact entre regions semi-conductrices a travers une couche isolante enterree |
US12/984,466 US9490264B2 (en) | 2010-01-14 | 2011-01-04 | Device having a contact between semiconductor regions through a buried insulating layer, and process for fabricating said device |
JP2011004142A JP5543383B2 (ja) | 2010-01-14 | 2011-01-12 | 埋め込み絶縁層を貫いて半導体層間に接触を有するデバイス、およびこのデバイスの製造プロセス |
CN201110038036.5A CN102184927B (zh) | 2010-01-14 | 2011-01-12 | 具有贯穿隐埋绝缘层的区域间触点的器件及其制造方法 |
KR1020110003089A KR101277328B1 (ko) | 2010-01-14 | 2011-01-12 | 매립 절연층을 통하여 반도체 영역들 사이에 콘택을 가지는 소자 및 소자의 제조 방법 |
TW100101081A TWI455270B (zh) | 2010-01-14 | 2011-01-12 | 具有穿過埋入式絕緣層在半導體區域間的接點之裝置及其製造方法 |
EP11150845A EP2355143A1 (fr) | 2010-01-14 | 2011-01-13 | Dispositif doté d'un contact entre les régions semi-conductrices à travers une couche isolante enterrée et procédé de fabrication dudit dispositif |
SG2011002458A SG173270A1 (en) | 2010-01-14 | 2011-01-13 | Device having a contact between semiconductor regions through a buried insulating layer, and process for fabricating said device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR1050244A FR2955200B1 (fr) | 2010-01-14 | 2010-01-14 | Dispositif, et son procede de fabrication, disposant d'un contact entre regions semi-conductrices a travers une couche isolante enterree |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2955200A1 FR2955200A1 (fr) | 2011-07-15 |
FR2955200B1 true FR2955200B1 (fr) | 2012-07-20 |
Family
ID=42342015
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR1050244A Active FR2955200B1 (fr) | 2010-01-14 | 2010-01-14 | Dispositif, et son procede de fabrication, disposant d'un contact entre regions semi-conductrices a travers une couche isolante enterree |
Country Status (8)
Country | Link |
---|---|
US (1) | US9490264B2 (fr) |
EP (1) | EP2355143A1 (fr) |
JP (1) | JP5543383B2 (fr) |
KR (1) | KR101277328B1 (fr) |
CN (1) | CN102184927B (fr) |
FR (1) | FR2955200B1 (fr) |
SG (1) | SG173270A1 (fr) |
TW (1) | TWI455270B (fr) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9768254B2 (en) | 2015-07-30 | 2017-09-19 | International Business Machines Corporation | Leakage-free implantation-free ETSOI transistors |
DE102015015699A1 (de) | 2015-12-04 | 2017-06-08 | Abb Schweiz Ag | Elektronisches Leistungsmodul |
FR3095891B1 (fr) | 2019-05-09 | 2023-01-13 | St Microelectronics Sa | Circuit électronique |
KR102690949B1 (ko) | 2019-06-14 | 2024-08-02 | 에스케이하이닉스 주식회사 | 반도체 장치 및 그 제조 방법 |
WO2021242721A1 (fr) * | 2020-05-28 | 2021-12-02 | Zeno Semiconductor, Inc. | Dispositif de mémoire comprenant un transistor à corps électriquement flottant |
US11894450B2 (en) * | 2021-11-18 | 2024-02-06 | Globalfoundries U.S. Inc. | Lateral bipolar transistor with emitter and collector regions including portions within In-insulator layer cavities and method |
Family Cites Families (108)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4169233A (en) | 1978-02-24 | 1979-09-25 | Rockwell International Corporation | High performance CMOS sense amplifier |
KR100213602B1 (ko) | 1988-05-13 | 1999-08-02 | 가나이 쓰도무 | 다이나믹형 반도체 기억장치 |
US5028810A (en) | 1989-07-13 | 1991-07-02 | Intel Corporation | Four quadrant synapse cell employing single column summing line |
JPH0432446A (ja) * | 1990-05-25 | 1992-02-04 | Matsushita Graphic Commun Syst Inc | 情報通信装置 |
JP3128829B2 (ja) | 1990-12-26 | 2001-01-29 | ソニー株式会社 | 半導体メモリ装置 |
JP3003188B2 (ja) | 1990-09-10 | 2000-01-24 | ソニー株式会社 | 半導体メモリ及びその製造方法 |
JPH04280469A (ja) | 1991-03-07 | 1992-10-06 | Mitsubishi Electric Corp | 半導体装置 |
JPH04345064A (ja) | 1991-05-22 | 1992-12-01 | Hitachi Ltd | 半導体集積回路装置およびその製造方法 |
JP2717740B2 (ja) | 1991-08-30 | 1998-02-25 | 三菱電機株式会社 | 半導体集積回路装置 |
EP0836194B1 (fr) | 1992-03-30 | 2000-05-24 | Mitsubishi Denki Kabushiki Kaisha | Dispositif à semi-conducteurs |
US5325054A (en) | 1992-07-07 | 1994-06-28 | Texas Instruments Incorporated | Method and system for screening reliability of semiconductor circuits |
US5306530A (en) | 1992-11-23 | 1994-04-26 | Associated Universities, Inc. | Method for producing high quality thin layer films on substrates |
JP3488730B2 (ja) | 1993-11-05 | 2004-01-19 | 株式会社ルネサステクノロジ | 半導体集積回路装置 |
US5455791A (en) | 1994-06-01 | 1995-10-03 | Zaleski; Andrzei | Method for erasing data in EEPROM devices on SOI substrates and device therefor |
JP3003088B2 (ja) | 1994-06-10 | 2000-01-24 | 住友イートンノバ株式会社 | イオン注入装置 |
JP3549602B2 (ja) | 1995-01-12 | 2004-08-04 | 株式会社ルネサステクノロジ | 半導体記憶装置 |
JPH08255846A (ja) | 1995-03-17 | 1996-10-01 | Nippondenso Co Ltd | 半導体装置及びその製造方法 |
JP3288554B2 (ja) | 1995-05-29 | 2002-06-04 | 株式会社日立製作所 | イオン注入装置及びイオン注入方法 |
JPH0982814A (ja) | 1995-07-10 | 1997-03-28 | Denso Corp | 半導体集積回路装置及びその製造方法 |
JPH0982918A (ja) * | 1995-09-19 | 1997-03-28 | Toshiba Corp | 半導体記憶装置およびその製造方法 |
US6787844B2 (en) | 1995-09-29 | 2004-09-07 | Nippon Steel Corporation | Semiconductor device including transistor with composite gate structure and transistor with single gate structure, and method for manufacturing the same |
JP3265178B2 (ja) * | 1996-02-20 | 2002-03-11 | 株式会社東芝 | 半導体記憶装置及びその製造方法 |
JP3489090B2 (ja) | 1996-02-27 | 2004-01-19 | 富士通株式会社 | 半導体装置及びその製造方法 |
JPH10125064A (ja) | 1996-10-14 | 1998-05-15 | Toshiba Corp | 記憶装置 |
US6121661A (en) * | 1996-12-11 | 2000-09-19 | International Business Machines Corporation | Silicon-on-insulator structure for electrostatic discharge protection and improved heat dissipation |
JPH10208484A (ja) | 1997-01-29 | 1998-08-07 | Mitsubishi Electric Corp | 半導体記憶装置のデータ読出回路及び半導体記憶装置 |
US5889293A (en) * | 1997-04-04 | 1999-03-30 | International Business Machines Corporation | Electrical contact to buried SOI structures |
JP3699823B2 (ja) | 1998-05-19 | 2005-09-28 | 株式会社東芝 | 半導体装置 |
US6072217A (en) | 1998-06-11 | 2000-06-06 | Sun Microsystems, Inc. | Tunable threshold SOI device using isolated well structure for back gate |
FR2779869B1 (fr) | 1998-06-15 | 2003-05-16 | Commissariat Energie Atomique | Circuit integre de type soi a capacite de decouplage, et procede de realisation d'un tel circuit |
US6826730B2 (en) | 1998-12-15 | 2004-11-30 | Texas Instruments Incorporated | System and method for controlling current in an integrated circuit |
JP3456913B2 (ja) | 1998-12-25 | 2003-10-14 | 株式会社東芝 | 半導体装置 |
KR100618789B1 (ko) | 1999-07-30 | 2006-09-06 | 삼성전자주식회사 | 소이 구조의 씨모스와 수직형 바이폴라 트랜지스터를 갖는 바이씨모스 |
US6372600B1 (en) | 1999-08-30 | 2002-04-16 | Agere Systems Guardian Corp. | Etch stops and alignment marks for bonded wafers |
US6476462B2 (en) | 1999-12-28 | 2002-11-05 | Texas Instruments Incorporated | MOS-type semiconductor device and method for making same |
US6417697B2 (en) | 2000-02-02 | 2002-07-09 | Broadcom Corporation | Circuit technique for high speed low power data transfer bus |
US6300218B1 (en) | 2000-05-08 | 2001-10-09 | International Business Machines Corporation | Method for patterning a buried oxide thickness for a separation by implanted oxygen (simox) process |
JP2002110990A (ja) * | 2000-09-27 | 2002-04-12 | Toshiba Corp | 半導体装置およびその製造方法 |
US6350653B1 (en) | 2000-10-12 | 2002-02-26 | International Business Machines Corporation | Embedded DRAM on silicon-on-insulator substrate |
JP2002164544A (ja) | 2000-11-28 | 2002-06-07 | Sony Corp | 半導体装置 |
US6614190B2 (en) | 2001-01-31 | 2003-09-02 | Hitachi, Ltd. | Ion implanter |
JP3982218B2 (ja) | 2001-02-07 | 2007-09-26 | ソニー株式会社 | 半導体装置およびその製造方法 |
JP3884266B2 (ja) | 2001-02-19 | 2007-02-21 | 株式会社東芝 | 半導体メモリ装置及びその製造方法 |
US6611023B1 (en) | 2001-05-01 | 2003-08-26 | Advanced Micro Devices, Inc. | Field effect transistor with self alligned double gate and method of forming same |
US6759282B2 (en) * | 2001-06-12 | 2004-07-06 | International Business Machines Corporation | Method and structure for buried circuits and devices |
US6498057B1 (en) * | 2002-03-07 | 2002-12-24 | International Business Machines Corporation | Method for implementing SOI transistor source connections using buried dual rail distribution |
EP1357603A3 (fr) | 2002-04-18 | 2004-01-14 | Innovative Silicon SA | Dispositif semiconducteur |
JP3594140B2 (ja) * | 2002-06-26 | 2004-11-24 | 沖電気工業株式会社 | 半導体装置の製造方法 |
US6838723B2 (en) | 2002-08-29 | 2005-01-04 | Micron Technology, Inc. | Merged MOS-bipolar capacitor memory cell |
US6790713B1 (en) * | 2002-09-09 | 2004-09-14 | T-Ram, Inc. | Method for making an inlayed thyristor-based device |
US7710771B2 (en) | 2002-11-20 | 2010-05-04 | The Regents Of The University Of California | Method and apparatus for capacitorless double-gate storage |
JP2004179506A (ja) | 2002-11-28 | 2004-06-24 | Seiko Epson Corp | Soi構造を有する半導体基板及びその製造方法及び半導体装置 |
US7030436B2 (en) | 2002-12-04 | 2006-04-18 | Micron Technology, Inc. | Embedded DRAM gain memory cell having MOS transistor body provided with a bi-polar transistor charge injecting means |
JP2004303499A (ja) | 2003-03-31 | 2004-10-28 | Hitachi High-Technologies Corp | イオン注入装置およびイオン注入方法 |
JP4077381B2 (ja) | 2003-08-29 | 2008-04-16 | 株式会社東芝 | 半導体集積回路装置 |
US6965143B2 (en) | 2003-10-10 | 2005-11-15 | Advanced Micro Devices, Inc. | Recess channel flash architecture for reduced short channel effect |
JP2005158952A (ja) | 2003-11-25 | 2005-06-16 | Toshiba Corp | 半導体装置及びその製造方法 |
US7109532B1 (en) | 2003-12-23 | 2006-09-19 | Lee Zachary K | High Ion/Ioff SOI MOSFET using body voltage control |
US20050255666A1 (en) | 2004-05-11 | 2005-11-17 | Miradia Inc. | Method and structure for aligning mechanical based device to integrated circuits |
US7112997B1 (en) | 2004-05-19 | 2006-09-26 | Altera Corporation | Apparatus and methods for multi-gate silicon-on-insulator transistors |
JP4795653B2 (ja) | 2004-06-15 | 2011-10-19 | ルネサスエレクトロニクス株式会社 | 半導体記憶装置 |
US7196921B2 (en) | 2004-07-19 | 2007-03-27 | Silicon Storage Technology, Inc. | High-speed and low-power differential non-volatile content addressable memory cell and array |
US7190616B2 (en) | 2004-07-19 | 2007-03-13 | Micron Technology, Inc. | In-service reconfigurable DRAM and flash memory device |
US7560361B2 (en) | 2004-08-12 | 2009-07-14 | International Business Machines Corporation | Method of forming gate stack for semiconductor electronic device |
KR100663359B1 (ko) | 2005-03-31 | 2007-01-02 | 삼성전자주식회사 | 리세스 채널 트랜지스터 구조를 갖는 단일 트랜지스터플로팅 바디 디램 셀 및 그 제조방법 |
US20060267064A1 (en) | 2005-05-31 | 2006-11-30 | Infineon Technologies Ag | Semiconductor memory device |
US7274618B2 (en) | 2005-06-24 | 2007-09-25 | Monolithic System Technology, Inc. | Word line driver for DRAM embedded in a logic process |
JP4967264B2 (ja) | 2005-07-11 | 2012-07-04 | 株式会社日立製作所 | 半導体装置 |
JP4800700B2 (ja) | 2005-08-01 | 2011-10-26 | ルネサスエレクトロニクス株式会社 | 半導体装置およびそれを用いた半導体集積回路 |
US7314794B2 (en) * | 2005-08-08 | 2008-01-01 | International Business Machines Corporation | Low-cost high-performance planar back-gate CMOS |
JP4413841B2 (ja) | 2005-10-03 | 2010-02-10 | 株式会社東芝 | 半導体記憶装置及びその製造方法 |
JP4822791B2 (ja) | 2005-10-04 | 2011-11-24 | ルネサスエレクトロニクス株式会社 | 半導体記憶装置 |
US7601271B2 (en) | 2005-11-28 | 2009-10-13 | S.O.I.Tec Silicon On Insulator Technologies | Process and equipment for bonding by molecular adhesion |
JP5054919B2 (ja) | 2005-12-20 | 2012-10-24 | ルネサスエレクトロニクス株式会社 | 半導体集積回路装置 |
KR100735613B1 (ko) | 2006-01-11 | 2007-07-04 | 삼성전자주식회사 | 이온주입설비의 디스크 어셈블리 |
US7304903B2 (en) | 2006-01-23 | 2007-12-04 | Purdue Research Foundation | Sense amplifier circuit |
JP4762036B2 (ja) | 2006-04-14 | 2011-08-31 | 株式会社東芝 | 半導体装置 |
EP2015460A1 (fr) | 2006-04-24 | 2009-01-14 | Panasonic Corporation | Dispositif de reception, dispositif electronique l'utilisant et procede de reception |
US7494902B2 (en) | 2006-06-23 | 2009-02-24 | Interuniversitair Microelektronica Centrum Vzw (Imec) | Method of fabricating a strained multi-gate transistor |
KR100843055B1 (ko) | 2006-08-17 | 2008-07-01 | 주식회사 하이닉스반도체 | 플래쉬 메모리 소자 및 그의 제조방법 |
US7560344B2 (en) | 2006-11-15 | 2009-07-14 | Samsung Electronics Co., Ltd. | Semiconductor device having a pair of fins and method of manufacturing the same |
JP2008130670A (ja) | 2006-11-17 | 2008-06-05 | Seiko Epson Corp | 半導体装置、論理回路および電子機器 |
JP5057430B2 (ja) | 2006-12-18 | 2012-10-24 | ルネサスエレクトロニクス株式会社 | 半導体集積回路とその製造方法 |
JP4869088B2 (ja) | 2007-01-22 | 2012-02-01 | 株式会社東芝 | 半導体記憶装置及びその書き込み方法 |
JP5019436B2 (ja) | 2007-02-22 | 2012-09-05 | ルネサスエレクトロニクス株式会社 | 半導体集積回路 |
JP5594927B2 (ja) | 2007-04-11 | 2014-09-24 | ピーエスフォー ルクスコ エスエイアールエル | 半導体記憶装置 |
FR2915024A1 (fr) | 2007-04-12 | 2008-10-17 | St Microelectronics Crolles 2 | Procede de fabrication permettant l'homogeneisation de l'environnement de transistors et dispositif associe |
US7729149B2 (en) | 2007-05-01 | 2010-06-01 | Suvolta, Inc. | Content addressable memory cell including a junction field effect transistor |
EP2015362A1 (fr) | 2007-06-04 | 2009-01-14 | STMicroelectronics (Crolles 2) SAS | Matrice à semi-conducteurs et procédé de fabrication correspondant |
US7449922B1 (en) | 2007-06-15 | 2008-11-11 | Arm Limited | Sensing circuitry and method of detecting a change in voltage on at least one input line |
US7759714B2 (en) | 2007-06-26 | 2010-07-20 | Hitachi, Ltd. | Semiconductor device |
FR2918823B1 (fr) | 2007-07-13 | 2009-10-16 | Ecole Centrale De Lyon Etablis | Cellule logique reconfigurable a base de transistors mosfet double grille |
FR2919112A1 (fr) | 2007-07-16 | 2009-01-23 | St Microelectronics Crolles 2 | Circuit integre comprenant un transistor et un condensateur et procede de fabrication |
WO2009028065A1 (fr) | 2007-08-30 | 2009-03-05 | Fujitsu Microelectronics Limited | Dispositif d'implantation d'ions, mécanisme de serrage de substrat, et procédé d'implantation d'ions |
KR100884344B1 (ko) | 2007-10-10 | 2009-02-18 | 주식회사 하이닉스반도체 | 비대칭 소스/드레인 접합을 갖는 불휘발성 메모리소자 및그 제조방법 |
JP5222520B2 (ja) | 2007-10-11 | 2013-06-26 | ルネサスエレクトロニクス株式会社 | 半導体装置の製造方法 |
US20090101940A1 (en) | 2007-10-19 | 2009-04-23 | Barrows Corey K | Dual gate fet structures for flexible gate array design methodologies |
DE102007052097B4 (de) | 2007-10-31 | 2010-10-28 | Advanced Micro Devices, Inc., Sunnyvale | Verfahren zur Herstellung eines SOI-Bauelements mit einer Substratdiode |
FR2925223B1 (fr) | 2007-12-18 | 2010-02-19 | Soitec Silicon On Insulator | Procede d'assemblage avec marques enterrees |
US7593265B2 (en) | 2007-12-28 | 2009-09-22 | Sandisk Corporation | Low noise sense amplifier array and method for nonvolatile memory |
JP5412445B2 (ja) | 2008-02-20 | 2014-02-12 | ソイテック | 酸化物溶解後の酸化 |
JP6053250B2 (ja) | 2008-06-12 | 2016-12-27 | ピーエスフォー ルクスコ エスエイアールエルPS4 Luxco S.a.r.l. | 半導体装置 |
US8384156B2 (en) | 2008-06-13 | 2013-02-26 | Yale University | Complementary metal oxide semiconductor devices |
US8120110B2 (en) | 2008-08-08 | 2012-02-21 | International Business Machines Corporation | Semiconductor structure including a high performance FET and a high voltage FET on a SOI substrate |
US8012814B2 (en) | 2008-08-08 | 2011-09-06 | International Business Machines Corporation | Method of forming a high performance fet and a high voltage fet on a SOI substrate |
KR101623958B1 (ko) | 2008-10-01 | 2016-05-25 | 삼성전자주식회사 | 인버터 및 그의 동작방법과 인버터를 포함하는 논리회로 |
KR101522400B1 (ko) | 2008-11-10 | 2015-05-21 | 삼성전자주식회사 | 인버터 및 그를 포함하는 논리소자 |
FR2955204B1 (fr) * | 2010-01-14 | 2012-07-20 | Soitec Silicon On Insulator | Cellule memoire dram disposant d'un injecteur bipolaire vertical |
-
2010
- 2010-01-14 FR FR1050244A patent/FR2955200B1/fr active Active
-
2011
- 2011-01-04 US US12/984,466 patent/US9490264B2/en active Active
- 2011-01-12 JP JP2011004142A patent/JP5543383B2/ja active Active
- 2011-01-12 KR KR1020110003089A patent/KR101277328B1/ko active IP Right Grant
- 2011-01-12 TW TW100101081A patent/TWI455270B/zh active
- 2011-01-12 CN CN201110038036.5A patent/CN102184927B/zh active Active
- 2011-01-13 SG SG2011002458A patent/SG173270A1/en unknown
- 2011-01-13 EP EP11150845A patent/EP2355143A1/fr not_active Withdrawn
Also Published As
Publication number | Publication date |
---|---|
JP5543383B2 (ja) | 2014-07-09 |
US9490264B2 (en) | 2016-11-08 |
EP2355143A1 (fr) | 2011-08-10 |
CN102184927A (zh) | 2011-09-14 |
JP2011155259A (ja) | 2011-08-11 |
TWI455270B (zh) | 2014-10-01 |
TW201135894A (en) | 2011-10-16 |
KR20110083540A (ko) | 2011-07-20 |
FR2955200A1 (fr) | 2011-07-15 |
KR101277328B1 (ko) | 2013-06-20 |
US20110169090A1 (en) | 2011-07-14 |
CN102184927B (zh) | 2014-11-05 |
SG173270A1 (en) | 2011-08-29 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
WO2013049042A3 (fr) | Structures de nanofils en coalescence avec lacunes interstitielles et procédé pour leur fabrication | |
EP2738813A3 (fr) | Dispositif semi-conducteur comportant une alternance de régions de source et de drain, source respective et bandes métalliques de drain | |
GB2493238A (en) | Graphene channel-based devices and methods for fabrication thereof | |
FR2955200B1 (fr) | Dispositif, et son procede de fabrication, disposant d'un contact entre regions semi-conductrices a travers une couche isolante enterree | |
FR3010233B1 (fr) | Structure semiconductrice a zones d'emission commutables, procede de fabrication d'une telle structure et dispositif semiconducteur comportant une telle structure | |
EP2543086A4 (fr) | Dispositifs semi-conducteurs comprenant une couche de source à percolation électrique et leurs procédés de fabrication | |
WO2012074872A3 (fr) | Structures à nanofils de silicium et de silicium-germanium | |
TWI370485B (en) | Semiconductor device fabrication method, semiconductor device, and semiconductor layer formation method | |
EP2234163A4 (fr) | Dispositif à semi-conducteur et procédé de fabrication du dispositif, et procédé de fabrication de grille de tranchée | |
TWI562285B (en) | Semiconductor device and method for manufacturing the same | |
EP2660891A4 (fr) | Substrat pour dispositif organique électroluminescent et son procédé de fabrication | |
EP2420599A4 (fr) | Substrat, substrat doté d'un film mince, dispositif semi-conducteur et procédé de fabrication d'un dispositif semi-conducteur | |
EP2584621A4 (fr) | Grille de connexion pour dispositif à semi-conducteurs optique, procédé pour fabriquer une grille de connexion pour dispositif à semi-conducteurs optique, et dispositif à semi-conducteurs optique. | |
WO2009084860A3 (fr) | Dispositif électroluminescent à semiconducteurs | |
GB201004116D0 (en) | Apparatus and method for monitoring a thickness of a silicon wafer with a highly doped layer at least at a backside of the silicon wafer | |
SG166749A1 (en) | Integrated circuit system with through silicon via and method of manufacture thereof | |
EP2483929A4 (fr) | Dispositif à semi-conducteurs comportant une couche barrière contre la diffusion d'oxygène et procédé de fabrication de ce dernier | |
EP2610898A4 (fr) | Substrat épitaxial pour élément semi-conducteur, élément semi-conducteur, procédé de fabrication de substrat épitaxial pour élément semi-conducteur, et procédé de fabrication d'élément semi-conducteur | |
EP2648234A4 (fr) | Elément de réception de lumière, tranche épitaxiale de semi-conducteur, procédé de fabrication de l'élément de réception de lumière et de la tranche épitaxiale de semi-conducteur, et appareil de détection | |
EP2787375A4 (fr) | Matériau de transfert de diffusion de lumière, procédé de formation de couche de diffusion de lumière, dispositif électroluminescent organique, et procédé de fabrication de dispositif électroluminescent organique | |
EP2441097A4 (fr) | Substrat semi-conducteur, dispositif à semi-conducteurs, et leurs procédés de fabrication | |
EP2916360A4 (fr) | Transistor à couches minces et procédé de fabrication, substrat de réseau, dispositif d'affichage et couche barrière de ce dernier | |
FR2990561B1 (fr) | Procede de fabrication de dispositif semi-conducteur et dispositif semi-conducteur; | |
EP3121647A3 (fr) | Dispositif d'affichage et son procédé de fabrication | |
EP2538449A4 (fr) | Procédé et dispositif permettant de fabriquer des dispositifs à semi-conducteur, dispositif à semi-conducteur et élément de transfert |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
CD | Change of name or company name |
Owner name: SOITEC, FR Effective date: 20120423 |
|
PLFP | Fee payment |
Year of fee payment: 7 |
|
PLFP | Fee payment |
Year of fee payment: 8 |
|
PLFP | Fee payment |
Year of fee payment: 9 |
|
PLFP | Fee payment |
Year of fee payment: 11 |
|
PLFP | Fee payment |
Year of fee payment: 12 |
|
PLFP | Fee payment |
Year of fee payment: 13 |
|
PLFP | Fee payment |
Year of fee payment: 14 |
|
PLFP | Fee payment |
Year of fee payment: 15 |