JP2004523912A - 混合アナログおよびデジタル集積回路 - Google Patents

混合アナログおよびデジタル集積回路 Download PDF

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Publication number
JP2004523912A
JP2004523912A JP2002570303A JP2002570303A JP2004523912A JP 2004523912 A JP2004523912 A JP 2004523912A JP 2002570303 A JP2002570303 A JP 2002570303A JP 2002570303 A JP2002570303 A JP 2002570303A JP 2004523912 A JP2004523912 A JP 2004523912A
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Prior art keywords
die
integrated circuit
analog
bonding pads
dies
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Japanese (ja)
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JP2004523912A5 (enExample
Inventor
バザルジャニ、セイフォラー
ツァン、ハイタオ
ゾウ、クィツェン
ジャ、サンジャイ
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Qualcomm Inc
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Qualcomm Inc
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Publication of JP2004523912A publication Critical patent/JP2004523912A/ja
Publication of JP2004523912A5 publication Critical patent/JP2004523912A5/ja
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    • H01L2924/1901—Structure
    • H01L2924/1904—Component type
    • H01L2924/19041—Component type being a capacitor

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US8148816B2 (en) 2007-01-11 2012-04-03 Nec Corporation Semiconductor device
JP2007306545A (ja) * 2007-03-23 2007-11-22 Seiko Epson Corp 半導体装置及び電子機器
JP2009103530A (ja) * 2007-10-22 2009-05-14 Denso Corp センサ装置
JP2016536584A (ja) * 2013-11-07 2016-11-24 クゥアルコム・インコーポレイテッドＱｕａｌｃｏｍｍ Ｉｎｃｏｒｐｏｒａｔｅｄ 集積回路をテストするための方法
WO2017038403A1 (ja) * 2015-09-01 2017-03-09 ソニー株式会社 積層体
JPWO2017038403A1 (ja) * 2015-09-01 2018-08-16 ソニー株式会社 積層体

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WO2002071486A3 (en) 2003-12-24
KR100862405B1 (ko) 2008-10-08
US6472747B2 (en) 2002-10-29
CN1498423A (zh) 2004-05-19
AU2002238123A1 (en) 2002-09-19
MY122792A (en) 2006-05-31
CN100355071C (zh) 2007-12-12
KR20080050638A (ko) 2008-06-09
JP2009152616A (ja) 2009-07-09
KR20090077026A (ko) 2009-07-13
EP1407491A2 (en) 2004-04-14
JP5931814B2 (ja) 2016-06-08
KR20040030519A (ko) 2004-04-09
WO2002071486A2 (en) 2002-09-12
KR100940404B1 (ko) 2010-02-02
TWI246737B (en) 2006-01-01
JP6537789B2 (ja) 2019-07-03
JP2014241422A (ja) 2014-12-25
JP2018022903A (ja) 2018-02-08
HK1062958A1 (zh) 2004-12-03
KR20080050637A (ko) 2008-06-09
JP2014013918A (ja) 2014-01-23

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