DE580213T1 - Hochspannungtransistor mit Graben-Technologie verwendendem Rundabschluss. - Google Patents

Hochspannungtransistor mit Graben-Technologie verwendendem Rundabschluss.

Info

Publication number
DE580213T1
DE580213T1 DE0580213T DE93201988T DE580213T1 DE 580213 T1 DE580213 T1 DE 580213T1 DE 0580213 T DE0580213 T DE 0580213T DE 93201988 T DE93201988 T DE 93201988T DE 580213 T1 DE580213 T1 DE 580213T1
Authority
DE
Germany
Prior art keywords
substrate
trench
transistor
field
ring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
DE0580213T
Other languages
English (en)
Inventor
Izak Bencuya
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Vishay Siliconix Inc
Original Assignee
Siliconix Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siliconix Inc filed Critical Siliconix Inc
Publication of DE580213T1 publication Critical patent/DE580213T1/de
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
    • H01L29/7811—Vertical DMOS transistors, i.e. VDMOS transistors with an edge termination structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
    • H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
    • H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
    • H01L29/0619—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/402—Field plates
    • H01L29/404—Multiple field plate structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/402—Field plates
    • H01L29/407—Recessed field plates, e.g. trench field plates, buried field plates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66234—Bipolar junction transistors [BJT]
    • H01L29/66325—Bipolar junction transistors [BJT] controlled by field-effect, e.g. insulated gate bipolar transistors [IGBT]
    • H01L29/66333—Vertical insulated gate bipolar transistors
    • H01L29/66348—Vertical insulated gate bipolar transistors with a recessed gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
    • H01L29/7813—Vertical DMOS transistors, i.e. VDMOS transistors with trench gate electrode, e.g. UMOS transistors

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Element Separation (AREA)

Claims (12)

SILICONIX Incorporated Laurelwood Road USA - Santa Clara, CaI. 95054 PATENTANS PRÜCHE
1. Hochspannungstransistor-Struktur mit zumindest einem Transistor, der mindestens zwei in einem Substrat ausgebildete dotierte Bereiche aufweist, und mit einer Gitterelektrode, umfassend:
Zumindest einen ersten Feldring und einen davon beabstandeten zweiten Feldring, wobei beide Feldringe in dem Substrat ausgebildet sind und beide seitlich den Transistor umgeben, und
einen ersten isolierten Graben, der in dem Substrat in dem Raum zwischen dem ersten und dem zweiten Feldring ausgebildet ist, wobei der erste isolierte Graben den Transistor seitlich umgibt.
2. Ausbildung gemäß Anspruch 1, in der auf den Seitenwänden des Grabens eine Isolierschicht gebildet ist und der Graben mit einem leitfähigen Material gefüllt ist.
3. Ausbildung gemäß Anspruch 1, in welcher der erste und der zweite Feldring sich in das Substrat hinein in eine Tiefe erstrecken, die tiefer als diejenige des Grabens ist.
4. Ausbildung gemäß Anspruch 1, die weiterhin einen leitenden Schutzring umfasst, der über dem Substrat liegend und beide Feldringe seitlich umgebend ausgebildet ist.
5. Ausbildung gemäß Anspruch 1, in der beide Feldringe dotierte Bereiche sind.
6. Ausbildung gemäß Anspruch 1, in welcher der Transistor ein Feldeffekttransistor ist und auch einen tiefen Körperbereich umfasst und eine Gitterelektrode des Transistors in einem Gittergraben ausgebildet ist, und in welcher Tiefe und Dotierniveau der Feldringe gleich denjenigen des tiefen Körperbereiches sind und Tiefe und Breite des isolierten Grabens gleich denjenigen des Gittergrabens sind.
7. Ausbildung gemäß Anspruch 1, weiterhin umfassend:
Einen dritten Feldring, der in dem Substrat ausgebildet ist und den ersten und den zweiten Feldring seitlich umgibt, und
einen zweiten isolierten Graben, der in dem Substrat zwischen dem dritten Feldring und dem zweiten Feldring ausgebildet ist.
8. Ausbildung gemäß Anspruch 7, in welcher der erste isolierte Graben mit einem leitenden Material gefüllt ist, das mit der Gitterelektrode elektrisch verbunden ist.
9. Transistor-Struktur mit zumindest einem aktiven Transistor, der mindestens zwei in einem Substrat ausgebildete dotierte Bereiche aufweist, umfassend:
Zumindest einen ringförmigen Feldring, der in dem Substrat ausgebildet ist, den aktiven Transistor seitlich umgibt und mit Zwischenraum dazu angeordnet ist, und
einen ringförmigen isolierten Graben, der in dem Substrat in dem Zwischenraum zwischen dem Feldring und dem aktiven Transistor ausgebildet ist und den aktiven Transistor seitlich umgibt.
10. Ausbildung gemäß Anspruch 9, in welcher der Feldring zwei auf unterschiedliche Tiefen sich in das Substrat erstreckende Abschnitte umfasst und die weiterhin eine Feldplatte aufweist, die über dem Substratabschnitt liegt, welcher den Feldring enthält.
11. Verfahren zur Ausbildung einer Hochspannungstransistor-Struktur in einem Substrat, wobei die Struktur einen Transistor enthält, mit den folgenden Schritten:
Ausbildung eines ersten dotierten ringförmigen Bereiches in dem Substrat, der den Feldeffekttransistor seitlich umgibt;
Ausbildung eines zweiten dotierten ringförmigen Bereiches in dem Substrat mit einem Zwischenraum zu dem ersten dotierten Bereich und diesen seitlich umgebend;
Ausbildung eines Grabens in dem Substrat, der den Feldeffekttransistor seitlich umgibt und zwischen dem ersten und dem zweiten Feldring liegt, und
Ausbildung einer Isolierung in dem Graben.
12. Verfahren gemäß Anspruch 11, bei dem der Transistor ein Feldeffekttransistor ist, und auch einen tiefen Körperbereich sowie in einem Gittergraben eine Gitterelektrode aufweist, wobei der erste dotierte ringförmige Bereich, der zweite dotierte ringförmige Bereich und der tiefe Körperbereich gleichzeitig ausgebildet werden und wobei der Gittergraben gleichzeitig mit dem Graben ausgebildet wird.
DE0580213T 1992-07-23 1993-07-07 Hochspannungtransistor mit Graben-Technologie verwendendem Rundabschluss. Pending DE580213T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/918,996 US5430324A (en) 1992-07-23 1992-07-23 High voltage transistor having edge termination utilizing trench technology

Publications (1)

Publication Number Publication Date
DE580213T1 true DE580213T1 (de) 1994-12-08

Family

ID=25441315

Family Applications (1)

Application Number Title Priority Date Filing Date
DE0580213T Pending DE580213T1 (de) 1992-07-23 1993-07-07 Hochspannungtransistor mit Graben-Technologie verwendendem Rundabschluss.

Country Status (5)

Country Link
US (2) US5430324A (de)
EP (1) EP0580213A1 (de)
JP (1) JP3387564B2 (de)
KR (1) KR0185677B1 (de)
DE (1) DE580213T1 (de)

Families Citing this family (113)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE69525003T2 (de) * 1994-08-15 2003-10-09 Siliconix Inc Verfahren zum Herstellen eines DMOS-Transistors mit Grabenstruktur unter Verwendung von sieben Masken
US5597765A (en) * 1995-01-10 1997-01-28 Siliconix Incorporated Method for making termination structure for power MOSFET
US5940721A (en) * 1995-10-11 1999-08-17 International Rectifier Corporation Termination structure for semiconductor devices and process for manufacture thereof
US5949124A (en) * 1995-10-31 1999-09-07 Motorola, Inc. Edge termination structure
US5736418A (en) * 1996-06-07 1998-04-07 Lsi Logic Corporation Method for fabricating a field effect transistor using microtrenches to control hot electron effects
GB2314206A (en) * 1996-06-13 1997-12-17 Plessey Semiconductors Ltd Preventing voltage breakdown in semiconductor devices
KR100243658B1 (ko) * 1996-12-06 2000-02-01 정선종 기판 변환기술을 이용한 인덕터 소자 및 그 제조 방법
US5913122A (en) * 1997-01-27 1999-06-15 Taiwan Semiconductor Manufacturing Company, Ltd. Method of making high breakdown voltage twin well device with source/drain regions widely spaced from FOX regions
US5883416A (en) * 1997-01-31 1999-03-16 Megamos Corporation Gate-contact structure to prevent contact metal penetration through gate layer without affecting breakdown voltage
KR100244271B1 (ko) 1997-05-06 2000-02-01 김영환 반도체소자 구조 및 제조방법
US6103635A (en) * 1997-10-28 2000-08-15 Fairchild Semiconductor Corp. Trench forming process and integrated circuit device including a trench
US6429481B1 (en) * 1997-11-14 2002-08-06 Fairchild Semiconductor Corporation Field effect transistor and method of its manufacture
KR100253406B1 (ko) 1998-01-20 2000-04-15 김영환 반도체 파워 집적회로에서의 소자격리구조 및 그 방법
US20010041461A1 (en) 1998-10-06 2001-11-15 Rodney S. Ridley Process for forming high voltage junction termination extension oxide
FR2784801B1 (fr) 1998-10-19 2000-12-22 St Microelectronics Sa Composant de puissance portant des interconnexions
FR2785090B1 (fr) * 1998-10-23 2001-01-19 St Microelectronics Sa Composant de puissance portant des interconnexions
JP3923256B2 (ja) * 1999-01-07 2007-05-30 インフィネオン テクノロジース アクチエンゲゼルシャフト ドーピングされた領域を分離するためのトレンチを備えた半導体装置
US6521947B1 (en) * 1999-01-28 2003-02-18 International Business Machines Corporation Method of integrating substrate contact on SOI wafers with STI process
US6352944B1 (en) 1999-02-10 2002-03-05 Micron Technology, Inc. Method of depositing an aluminum nitride comprising layer over a semiconductor substrate
US6204097B1 (en) * 1999-03-01 2001-03-20 Semiconductor Components Industries, Llc Semiconductor device and method of manufacture
US6140193A (en) * 1999-05-12 2000-10-31 United Microelectronics Corp. Method for forming a high-voltage semiconductor device with trench structure
DE19935442C1 (de) 1999-07-28 2000-12-21 Siemens Ag Verfahren zum Herstellen eines Trench-MOS-Leistungstransistors
AU7478400A (en) * 1999-09-14 2001-04-17 General Semiconductor, Inc. Trench dmos transistor having improved trench structure
US6461918B1 (en) * 1999-12-20 2002-10-08 Fairchild Semiconductor Corporation Power MOS device with improved gate charge performance
TW523816B (en) * 2000-06-16 2003-03-11 Gen Semiconductor Inc Semiconductor trench device with enhanced gate oxide integrity structure
US6555895B1 (en) 2000-07-17 2003-04-29 General Semiconductor, Inc. Devices and methods for addressing optical edge effects in connection with etched trenches
US6696726B1 (en) * 2000-08-16 2004-02-24 Fairchild Semiconductor Corporation Vertical MOSFET with ultra-low resistance and low gate charge
US7745289B2 (en) 2000-08-16 2010-06-29 Fairchild Semiconductor Corporation Method of forming a FET having ultra-low on-resistance and low gate charge
US6818513B2 (en) * 2001-01-30 2004-11-16 Fairchild Semiconductor Corporation Method of forming a field effect transistor having a lateral depletion structure
US6710403B2 (en) 2002-07-30 2004-03-23 Fairchild Semiconductor Corporation Dual trench power MOSFET
US6916745B2 (en) 2003-05-20 2005-07-12 Fairchild Semiconductor Corporation Structure and method for forming a trench MOSFET having self-aligned features
US6803626B2 (en) 2002-07-18 2004-10-12 Fairchild Semiconductor Corporation Vertical charge control semiconductor device
US7345342B2 (en) 2001-01-30 2008-03-18 Fairchild Semiconductor Corporation Power semiconductor devices and methods of manufacture
US6677641B2 (en) 2001-10-17 2004-01-13 Fairchild Semiconductor Corporation Semiconductor structure with improved smaller forward voltage loss and higher blocking capability
US7132712B2 (en) 2002-11-05 2006-11-07 Fairchild Semiconductor Corporation Trench structure having one or more diodes embedded therein adjacent a PN junction
FI120310B (fi) * 2001-02-13 2009-09-15 Valtion Teknillinen Parannettu menetelmä erittyvien proteiinien tuottamiseksi sienissä
GB0103715D0 (en) * 2001-02-15 2001-04-04 Koninkl Philips Electronics Nv Semicondutor devices and their peripheral termination
GB0113143D0 (en) * 2001-05-29 2001-07-25 Koninl Philips Electronics Nv Manufacture of trench-gate semiconductor devices
US6683363B2 (en) 2001-07-03 2004-01-27 Fairchild Semiconductor Corporation Trench structure for semiconductor devices
GB0122120D0 (en) * 2001-09-13 2001-10-31 Koninkl Philips Electronics Nv Edge termination in MOS transistors
US7061066B2 (en) 2001-10-17 2006-06-13 Fairchild Semiconductor Corporation Schottky diode using charge balance structure
KR100859701B1 (ko) 2002-02-23 2008-09-23 페어차일드코리아반도체 주식회사 고전압 수평형 디모스 트랜지스터 및 그 제조 방법
US6781196B2 (en) 2002-03-11 2004-08-24 General Semiconductor, Inc. Trench DMOS transistor having improved trench structure
US6825510B2 (en) 2002-09-19 2004-11-30 Fairchild Semiconductor Corporation Termination structure incorporating insulator in a trench
US6818947B2 (en) 2002-09-19 2004-11-16 Fairchild Semiconductor Corporation Buried gate-field termination structure
US7033891B2 (en) 2002-10-03 2006-04-25 Fairchild Semiconductor Corporation Trench gate laterally diffused MOSFET devices and methods for making such devices
US7576388B1 (en) 2002-10-03 2009-08-18 Fairchild Semiconductor Corporation Trench-gate LDMOS structures
US6710418B1 (en) 2002-10-11 2004-03-23 Fairchild Semiconductor Corporation Schottky rectifier with insulation-filled trenches and method of forming the same
US7638841B2 (en) * 2003-05-20 2009-12-29 Fairchild Semiconductor Corporation Power semiconductor devices and methods of manufacture
JP4860102B2 (ja) * 2003-06-26 2012-01-25 ルネサスエレクトロニクス株式会社 半導体装置
KR100994719B1 (ko) 2003-11-28 2010-11-16 페어차일드코리아반도체 주식회사 슈퍼정션 반도체장치
US7368777B2 (en) 2003-12-30 2008-05-06 Fairchild Semiconductor Corporation Accumulation device with charge balance structure and method of forming the same
JP4903055B2 (ja) * 2003-12-30 2012-03-21 フェアチャイルド・セミコンダクター・コーポレーション パワー半導体デバイスおよびその製造方法
US20050199918A1 (en) * 2004-03-15 2005-09-15 Daniel Calafut Optimized trench power MOSFET with integrated schottky diode
DE102004012884B4 (de) * 2004-03-16 2011-07-21 IXYS Semiconductor GmbH, 68623 Leistungs-Halbleiterbauelement in Planartechnik
US7352036B2 (en) 2004-08-03 2008-04-01 Fairchild Semiconductor Corporation Semiconductor power device having a top-side drain using a sinker trench
US7265415B2 (en) 2004-10-08 2007-09-04 Fairchild Semiconductor Corporation MOS-gated transistor with reduced miller capacitance
AT504998A2 (de) 2005-04-06 2008-09-15 Fairchild Semiconductor Trenched-gate-feldeffekttransistoren und verfahren zum bilden derselben
DE102005023026B4 (de) * 2005-05-13 2016-06-16 Infineon Technologies Ag Leistungshalbleiterbauelement mit Plattenkondensator-Struktur
US7393749B2 (en) 2005-06-10 2008-07-01 Fairchild Semiconductor Corporation Charge balance field effect transistor
US7598576B2 (en) * 2005-06-29 2009-10-06 Cree, Inc. Environmentally robust passivation structures for high-voltage silicon carbide semiconductor devices
US7525122B2 (en) * 2005-06-29 2009-04-28 Cree, Inc. Passivation of wide band-gap based semiconductor devices with hydrogen-free sputtered nitrides
US7855401B2 (en) * 2005-06-29 2010-12-21 Cree, Inc. Passivation of wide band-gap based semiconductor devices with hydrogen-free sputtered nitrides
US8461648B2 (en) 2005-07-27 2013-06-11 Infineon Technologies Austria Ag Semiconductor component with a drift region and a drift control region
US8110868B2 (en) 2005-07-27 2012-02-07 Infineon Technologies Austria Ag Power semiconductor component with a low on-state resistance
JP2005322949A (ja) * 2005-08-05 2005-11-17 Renesas Technology Corp 半導体装置
US7385248B2 (en) 2005-08-09 2008-06-10 Fairchild Semiconductor Corporation Shielded gate field effect transistor with improved inter-poly dielectric
JP5225549B2 (ja) 2006-03-15 2013-07-03 日本碍子株式会社 半導体素子
US7446374B2 (en) 2006-03-24 2008-11-04 Fairchild Semiconductor Corporation High density trench FET with integrated Schottky diode and method of manufacture
US7319256B1 (en) 2006-06-19 2008-01-15 Fairchild Semiconductor Corporation Shielded gate trench FET with the shield and gate electrodes being connected together
US7800185B2 (en) * 2007-01-28 2010-09-21 Force-Mos Technology Corp. Closed trench MOSFET with floating trench rings as termination
US9024378B2 (en) * 2013-02-09 2015-05-05 Alpha And Omega Semiconductor Incorporated Device structure and manufacturing method using HDP deposited source-body implant block
CN103762243B (zh) 2007-09-21 2017-07-28 飞兆半导体公司 功率器件
US9484451B2 (en) 2007-10-05 2016-11-01 Vishay-Siliconix MOSFET active area and edge termination area charge balance
US7772668B2 (en) 2007-12-26 2010-08-10 Fairchild Semiconductor Corporation Shielded gate trench FET with multiple channels
US20120273916A1 (en) 2011-04-27 2012-11-01 Yedinak Joseph A Superjunction Structures for Power Devices and Methods of Manufacture
US8105911B2 (en) * 2008-09-30 2012-01-31 Northrop Grumman Systems Corporation Bipolar junction transistor guard ring structures and method of fabricating thereof
US8304829B2 (en) 2008-12-08 2012-11-06 Fairchild Semiconductor Corporation Trench-based power semiconductor devices with increased breakdown voltage characteristics
US8174067B2 (en) 2008-12-08 2012-05-08 Fairchild Semiconductor Corporation Trench-based power semiconductor devices with increased breakdown voltage characteristics
US8227855B2 (en) * 2009-02-09 2012-07-24 Fairchild Semiconductor Corporation Semiconductor devices with stable and controlled avalanche characteristics and methods of fabricating the same
US8148749B2 (en) 2009-02-19 2012-04-03 Fairchild Semiconductor Corporation Trench-shielded semiconductor device
US8049276B2 (en) 2009-06-12 2011-11-01 Fairchild Semiconductor Corporation Reduced process sensitivity of electrode-semiconductor rectifiers
US7800170B1 (en) 2009-07-31 2010-09-21 Alpha & Omega Semiconductor, Inc. Power MOSFET device with tungsten spacer in contact hole and method
US8698232B2 (en) * 2010-01-04 2014-04-15 International Rectifier Corporation Semiconductor device including a voltage controlled termination structure and method for fabricating same
US8432000B2 (en) 2010-06-18 2013-04-30 Fairchild Semiconductor Corporation Trench MOS barrier schottky rectifier with a planar surface using CMP techniques
DE102010035296B4 (de) 2010-08-25 2012-10-31 X-Fab Semiconductor Foundries Ag Randabschlussstruktur für Transistoren mit hohen Durchbruchspannungen
TWI453831B (zh) 2010-09-09 2014-09-21 台灣捷康綜合有限公司 半導體封裝結構及其製造方法
TWI455287B (zh) 2010-11-04 2014-10-01 Sinopower Semiconductor Inc 功率半導體元件之終端結構及其製作方法
US8487371B2 (en) 2011-03-29 2013-07-16 Fairchild Semiconductor Corporation Vertical MOSFET transistor having source/drain contacts disposed on the same side and method for manufacturing the same
US8836028B2 (en) 2011-04-27 2014-09-16 Fairchild Semiconductor Corporation Superjunction structures for power devices and methods of manufacture
US8786010B2 (en) 2011-04-27 2014-07-22 Fairchild Semiconductor Corporation Superjunction structures for power devices and methods of manufacture
US8772868B2 (en) 2011-04-27 2014-07-08 Fairchild Semiconductor Corporation Superjunction structures for power devices and methods of manufacture
US8673700B2 (en) 2011-04-27 2014-03-18 Fairchild Semiconductor Corporation Superjunction structures for power devices and methods of manufacture
DE102011115603B4 (de) 2011-09-27 2017-08-17 X-Fab Semiconductor Foundries Ag Entwurfsregeln für ein Layout von MOS-Transistoren mit unterschiedlichen Durchbruchspannungen in einer integrierten Schaltung
US8872278B2 (en) 2011-10-25 2014-10-28 Fairchild Semiconductor Corporation Integrated gate runner and field implant termination for trench devices
US9431249B2 (en) 2011-12-01 2016-08-30 Vishay-Siliconix Edge termination for super junction MOSFET devices
US9614043B2 (en) 2012-02-09 2017-04-04 Vishay-Siliconix MOSFET termination trench
JP2013183143A (ja) * 2012-03-05 2013-09-12 Toyota Motor Corp 半導体装置を製造する方法、及び、半導体装置
US9842911B2 (en) 2012-05-30 2017-12-12 Vishay-Siliconix Adaptive charge balanced edge termination
US8994073B2 (en) 2012-10-04 2015-03-31 Cree, Inc. Hydrogen mitigation schemes in the passivation of advanced devices
US9812338B2 (en) 2013-03-14 2017-11-07 Cree, Inc. Encapsulation of advanced devices using novel PECVD and ALD schemes
US9991399B2 (en) 2012-10-04 2018-06-05 Cree, Inc. Passivation structure for semiconductor devices
US9966330B2 (en) 2013-03-14 2018-05-08 Vishay-Siliconix Stack die package
US9589929B2 (en) 2013-03-14 2017-03-07 Vishay-Siliconix Method for fabricating stack die package
CN104779282B (zh) * 2014-01-10 2018-01-09 帅群微电子股份有限公司 沟槽式功率金属氧化物半导体场效晶体管与其制造方法
CN104779288B (zh) * 2014-01-13 2019-05-31 北大方正集团有限公司 一种vdmos器件及其制造方法
US9293524B2 (en) * 2014-05-02 2016-03-22 Infineon Technologies Ag Semiconductor device with a field ring edge termination structure and a separation trench arranged between different field rings
US9508596B2 (en) 2014-06-20 2016-11-29 Vishay-Siliconix Processes used in fabricating a metal-insulator-semiconductor field effect transistor
US9887259B2 (en) 2014-06-23 2018-02-06 Vishay-Siliconix Modulated super junction power MOSFET devices
US20160020279A1 (en) 2014-07-18 2016-01-21 International Rectifier Corporation Edge Termination Using Guard Rings Between Recessed Field Oxide Regions
KR102098996B1 (ko) 2014-08-19 2020-04-08 비쉐이-실리코닉스 초접합 금속 산화물 반도체 전계 효과 트랜지스터
CN111129108A (zh) * 2019-11-20 2020-05-08 深圳深爱半导体股份有限公司 晶体管终端结构及其制造方法
CN113793807B (zh) * 2021-11-18 2022-02-11 南京华瑞微集成电路有限公司 一种集成源漏电容的超结mos器件及其制作方法

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5242634B2 (de) * 1973-09-03 1977-10-25
JPS5631898B2 (de) * 1974-01-11 1981-07-24
JPS61137368A (ja) * 1984-12-10 1986-06-25 Hitachi Ltd 半導体装置
JPS63263769A (ja) * 1987-04-22 1988-10-31 Hitachi Ltd 半導体装置
US5072266A (en) * 1988-12-27 1991-12-10 Siliconix Incorporated Trench DMOS power transistor with field-shaping body profile and three-dimensional geometry
JPH03155167A (ja) * 1989-11-13 1991-07-03 Sanyo Electric Co Ltd 縦型ｍｏｓｆｅｔ
US5233215A (en) * 1992-06-08 1993-08-03 North Carolina State University At Raleigh Silicon carbide power MOSFET with floating field ring and floating field plate
US5316959A (en) * 1992-08-12 1994-05-31 Siliconix, Incorporated Trenched DMOS transistor fabrication using six masks

Also Published As

Publication number Publication date
JPH06204483A (ja) 1994-07-22
KR0185677B1 (ko) 1999-03-20
JP3387564B2 (ja) 2003-03-17
US5605852A (en) 1997-02-25
US5430324A (en) 1995-07-04
KR940003071A (ko) 1994-02-19
EP0580213A1 (de) 1994-01-26

Similar Documents

Publication Publication Date Title
DE580213T1 (de) Hochspannungtransistor mit Graben-Technologie verwendendem Rundabschluss.
DE102005010944B4 (de) Verfahren zur Herstellung eines Trägerscheibenkontaktes in integrierten Schaltungen mit Hochspannungsbauelementen auf der Basis der SOI-Technologie und integrierte Schaltungen mit entsprechenden Grabenstrukturen
DE3851649T2 (de) Aus einer Vielzahl von Eintransistorzellen bestehende dynamische Speichervorrichtung mit wahlfreiem Zugriff.
DE3853778T2 (de) Verfahren zur Herstellung eines Halbleiterbauelements.
DE3012363C2 (de) Verfahren zur Bildung der Kanalbereiche und der Wannen von Halbleiterbauelementen
DE2502235C2 (de)
DE19535140A1 (de) Lateraler MOSFET mit hoher Stehspannung und einem Graben sowie Verfahren zu dessen Herstellung
DE2242026A1 (de) Mis-feldeffekttransistor
DE19919955A1 (de) Halbleitervorrichtung mit hoher Spannungsfestigkeit
DE10296970B4 (de) Halbleitervorrichtung und Verfahren zur Herstellung derselben
DE10216633A1 (de) Halbleiteranordnung und Verfahren zur Herstellung der Halbleiteranordnung
DE2335799A1 (de) Sperrschicht-feldeffekttransistoren in dielektrisch isolierten mesas
EP1181712B1 (de) Niederohmiges vdmos-halbleiterbauelement
WO2001009956A1 (de) Verfahren zum herstellen eines trench-mos-leistungstransistors
DE1589687C3 (de) Festkörperschaltung mit isolierten Feldeffekttransistoren und Verfahren zu ihrer Herstellung
DE19709002A1 (de) Verfahren zur Erzeugung von überbrückten, dotierten Zonen
DE10134444A1 (de) Halbleitervorrichtung zum Reduzieren des Übergangszonenleckstromes und des Schmalweiteneffektes und Verfahren zur Herstellung derselben
EP0271599A1 (de) Kollektorkontakt eines integrierten Bipolartransistors
DE1764570C3 (de) Verfahren zur Herstellung einer Halbleitervorrichtung mit zueinander komplementären NPN- und PNP-Transistoren
DE2728845C2 (de)
DE3625742C2 (de) Integrierte CMOS-Schaltung
EP0095658A2 (de) Planares Halbleiterbauelement und Verfahren zur Herstellung
EP1157425A1 (de) Igbt mit pn-isolation
DE2141695A1 (de) Verfahren zur Herstellung eines monolithischen Halbleiterbauelementes
EP0626100B1 (de) Verfahren zur herstellung einer halbleiterstruktur