DE580213T1 - Hochspannungtransistor mit Graben-Technologie verwendendem Rundabschluss. - Google Patents

Hochspannungtransistor mit Graben-Technologie verwendendem Rundabschluss.

Info

Publication number
DE580213T1
DE580213T1 DE0580213T DE93201988T DE580213T1 DE 580213 T1 DE580213 T1 DE 580213T1 DE 0580213 T DE0580213 T DE 0580213T DE 93201988 T DE93201988 T DE 93201988T DE 580213 T1 DE580213 T1 DE 580213T1
Authority
DE
Germany
Prior art keywords
substrate
trench
transistor
field
ring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
DE0580213T
Other languages
English (en)
Inventor
Izak Bencuya
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Vishay Siliconix Inc
Original Assignee
Siliconix Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siliconix Inc filed Critical Siliconix Inc
Publication of DE580213T1 publication Critical patent/DE580213T1/de
Pending legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7802Vertical DMOS transistors, i.e. VDMOS transistors
    • H01L29/7811Vertical DMOS transistors, i.e. VDMOS transistors with an edge termination structure
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0607Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
    • H01L29/0611Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
    • H01L29/0615Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
    • H01L29/0619Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/402Field plates
    • H01L29/404Multiple field plate structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/402Field plates
    • H01L29/407Recessed field plates, e.g. trench field plates, buried field plates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66234Bipolar junction transistors [BJT]
    • H01L29/66325Bipolar junction transistors [BJT] controlled by field-effect, e.g. insulated gate bipolar transistors [IGBT]
    • H01L29/66333Vertical insulated gate bipolar transistors
    • H01L29/66348Vertical insulated gate bipolar transistors with a recessed gate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7802Vertical DMOS transistors, i.e. VDMOS transistors
    • H01L29/7813Vertical DMOS transistors, i.e. VDMOS transistors with trench gate electrode, e.g. UMOS transistors

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Element Separation (AREA)

Claims (12)

SILICONIX Incorporated Laurelwood Road USA - Santa Clara, CaI. 95054 PATENTANS PRÜCHE
1. Hochspannungstransistor-Struktur mit zumindest einem Transistor, der mindestens zwei in einem Substrat ausgebildete dotierte Bereiche aufweist, und mit einer Gitterelektrode, umfassend:
Zumindest einen ersten Feldring und einen davon beabstandeten zweiten Feldring, wobei beide Feldringe in dem Substrat ausgebildet sind und beide seitlich den Transistor umgeben, und
einen ersten isolierten Graben, der in dem Substrat in dem Raum zwischen dem ersten und dem zweiten Feldring ausgebildet ist, wobei der erste isolierte Graben den Transistor seitlich umgibt.
2. Ausbildung gemäß Anspruch 1, in der auf den Seitenwänden des Grabens eine Isolierschicht gebildet ist und der Graben mit einem leitfähigen Material gefüllt ist.
3. Ausbildung gemäß Anspruch 1, in welcher der erste und der zweite Feldring sich in das Substrat hinein in eine Tiefe erstrecken, die tiefer als diejenige des Grabens ist.
4. Ausbildung gemäß Anspruch 1, die weiterhin einen leitenden Schutzring umfasst, der über dem Substrat liegend und beide Feldringe seitlich umgebend ausgebildet ist.
5. Ausbildung gemäß Anspruch 1, in der beide Feldringe dotierte Bereiche sind.
6. Ausbildung gemäß Anspruch 1, in welcher der Transistor ein Feldeffekttransistor ist und auch einen tiefen Körperbereich umfasst und eine Gitterelektrode des Transistors in einem Gittergraben ausgebildet ist, und in welcher Tiefe und Dotierniveau der Feldringe gleich denjenigen des tiefen Körperbereiches sind und Tiefe und Breite des isolierten Grabens gleich denjenigen des Gittergrabens sind.
7. Ausbildung gemäß Anspruch 1, weiterhin umfassend:
Einen dritten Feldring, der in dem Substrat ausgebildet ist und den ersten und den zweiten Feldring seitlich umgibt, und
einen zweiten isolierten Graben, der in dem Substrat zwischen dem dritten Feldring und dem zweiten Feldring ausgebildet ist.
8. Ausbildung gemäß Anspruch 7, in welcher der erste isolierte Graben mit einem leitenden Material gefüllt ist, das mit der Gitterelektrode elektrisch verbunden ist.
9. Transistor-Struktur mit zumindest einem aktiven Transistor, der mindestens zwei in einem Substrat ausgebildete dotierte Bereiche aufweist, umfassend:
Zumindest einen ringförmigen Feldring, der in dem Substrat ausgebildet ist, den aktiven Transistor seitlich umgibt und mit Zwischenraum dazu angeordnet ist, und
einen ringförmigen isolierten Graben, der in dem Substrat in dem Zwischenraum zwischen dem Feldring und dem aktiven Transistor ausgebildet ist und den aktiven Transistor seitlich umgibt.
10. Ausbildung gemäß Anspruch 9, in welcher der Feldring zwei auf unterschiedliche Tiefen sich in das Substrat erstreckende Abschnitte umfasst und die weiterhin eine Feldplatte aufweist, die über dem Substratabschnitt liegt, welcher den Feldring enthält.
11. Verfahren zur Ausbildung einer Hochspannungstransistor-Struktur in einem Substrat, wobei die Struktur einen Transistor enthält, mit den folgenden Schritten:
Ausbildung eines ersten dotierten ringförmigen Bereiches in dem Substrat, der den Feldeffekttransistor seitlich umgibt;
Ausbildung eines zweiten dotierten ringförmigen Bereiches in dem Substrat mit einem Zwischenraum zu dem ersten dotierten Bereich und diesen seitlich umgebend;
Ausbildung eines Grabens in dem Substrat, der den Feldeffekttransistor seitlich umgibt und zwischen dem ersten und dem zweiten Feldring liegt, und
Ausbildung einer Isolierung in dem Graben.
12. Verfahren gemäß Anspruch 11, bei dem der Transistor ein Feldeffekttransistor ist, und auch einen tiefen Körperbereich sowie in einem Gittergraben eine Gitterelektrode aufweist, wobei der erste dotierte ringförmige Bereich, der zweite dotierte ringförmige Bereich und der tiefe Körperbereich gleichzeitig ausgebildet werden und wobei der Gittergraben gleichzeitig mit dem Graben ausgebildet wird.
DE0580213T 1992-07-23 1993-07-07 Hochspannungtransistor mit Graben-Technologie verwendendem Rundabschluss. Pending DE580213T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/918,996 US5430324A (en) 1992-07-23 1992-07-23 High voltage transistor having edge termination utilizing trench technology

Publications (1)

Publication Number Publication Date
DE580213T1 true DE580213T1 (de) 1994-12-08

Family

ID=25441315

Family Applications (1)

Application Number Title Priority Date Filing Date
DE0580213T Pending DE580213T1 (de) 1992-07-23 1993-07-07 Hochspannungtransistor mit Graben-Technologie verwendendem Rundabschluss.

Country Status (5)

Country Link
US (2) US5430324A (de)
EP (1) EP0580213A1 (de)
JP (1) JP3387564B2 (de)
KR (1) KR0185677B1 (de)
DE (1) DE580213T1 (de)

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US5430324A (en) 1995-07-04
KR940003071A (ko) 1994-02-19
EP0580213A1 (de) 1994-01-26

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