CN107305892B - 使用两个多晶硅沉积步骤来形成三栅极非易失性闪存单元对的方法 - Google Patents

使用两个多晶硅沉积步骤来形成三栅极非易失性闪存单元对的方法 Download PDF

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CN107305892B
CN107305892B CN201610247666.6A CN201610247666A CN107305892B CN 107305892 B CN107305892 B CN 107305892B CN 201610247666 A CN201610247666 A CN 201610247666A CN 107305892 B CN107305892 B CN 107305892B
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insulating
layer
poly
polysilicon
blocks
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CN107305892A (zh
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F.周
X.刘
C-S.苏
N.杜
C.王
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Silicon Storage Technology Inc
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Priority to EP17786312.3A priority patent/EP3446336A4/en
Priority to JP2018554740A priority patent/JP6716716B2/ja
Priority to KR1020187032732A priority patent/KR102125469B1/ko
Priority to PCT/US2017/025263 priority patent/WO2017184315A1/en
Priority to KR1020207017319A priority patent/KR102221577B1/ko
Priority to KR1020217005278A priority patent/KR102237584B1/ko
Priority to TW106112013A priority patent/TWI641114B/zh
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Abstract

本发明提供了一种用于使用两次多晶硅沉积形成非易失性存储器单元对的简化方法。在第一多晶硅沉积工艺中,在半导体衬底上形成第一多晶硅层,并将所述第一多晶硅层与所述半导体衬底绝缘。在所述第一多晶硅层上形成一对间隔开的绝缘块。将所述第一多晶硅层的暴露部分移除,同时保持所述第一多晶硅层的各自被设置在所述一对绝缘块中的一个绝缘块下方的一对多晶硅块。在第二多晶硅沉积工艺中,在所述衬底和所述一对绝缘块上方形成第二多晶硅层。在保持第一多晶硅块(设置在所述第一对绝缘块之间)、第二多晶硅块(设置成与一个绝缘块的外侧相邻)和第三多晶硅块(设置成与另一绝缘块的外侧相邻)的同时,将所述第二多晶硅层的部分移除。

Description

使用两个多晶硅沉积步骤来形成三栅极非易失性闪存单元对 的方法
技术领域
本发明涉及一种具有字线(WL)栅极、浮动栅极和擦除栅极的非易失性闪存单元。
背景技术
具有字线(WL)栅极、浮动栅极和擦除栅极的分裂栅非易失性闪存单元是本领域所熟知的。参见例如美国专利7,315,056,该专利全文以引用方式并入本文。
随着非易失性存储器单元尺寸的减小,制造这样的存储器单元在自对准元件和数量减少的工序(例如,掩模步骤、多晶硅沉积步骤等)方面变得更具有挑战性。因此,本发明的一个目标是随着存储器单元尺寸的不断缩小而简化制造工艺。
发明内容
一种用于形成一对非易失性存储器单元的简化方法包括:在半导体衬底上形成第一绝缘层;在第一多晶硅沉积工艺中,在所述第一绝缘层上形成第一多晶硅层;在所述第一多晶硅层上形成一对间隔开的绝缘块,每一个所述绝缘块具有面朝彼此的第一侧和背对彼此的第二侧;在保持所述第一多晶硅层的被设置在所述一对绝缘块下方以及所述一对绝缘块之间的部分的同时,将所述第一多晶硅层的部分移除;形成与所述第一侧相邻并且位于所述第一多晶硅层的设置在所述一对绝缘块之间的部分上方的一对间隔开的绝缘间隔物;将所述第一多晶硅层的设置在所述绝缘间隔物之间的部分移除,同时保持所述第一多晶硅层的各自被设置在所述一对绝缘块中的一个绝缘块和所述一对绝缘间隔物中的一个绝缘间隔物下方的一对多晶硅块;在所述衬底中且在所述一对绝缘块之间形成源极区域;将所述一对绝缘间隔物移除;形成至少沿着所述一对多晶硅块中每个多晶硅块的端部延伸的绝缘材料;在第二多晶硅沉积工艺中,在所述衬底和所述一对绝缘块上方形成第二多晶硅层;在保持所述第二多晶硅层的第一多晶硅块、第二多晶硅块和第三多晶硅块的同时(其中所述第一多晶硅块被设置在所述一对绝缘块之间以及所述源极区域上方,所述第二多晶硅块被设置成与所述绝缘块中的一个绝缘块的所述第二侧相邻,所述第三多晶硅块被设置成与所述绝缘块中的另一绝缘块的所述第二侧相邻),将所述第二多晶硅层的部分移除;在所述衬底中并与所述第二多晶硅块相邻形成第一漏极区域;以及在所述衬底中并与所述第三多晶硅块相邻形成第二漏极区域。
一种形成一对非易失性存储器单元的简化方法包括:在半导体衬底上形成第一绝缘层;在第一多晶硅沉积工艺中,在所述第一绝缘层上形成第一多晶硅层;在所述第一多晶硅层上形成一对间隔开的绝缘块,每一个所述绝缘块具有面朝彼此的第一侧和背对彼此的第二侧;在保持所述第一多晶硅层的各自被设置在所述一对绝缘块中的一个绝缘块下方的一对多晶硅块的同时,将所述第一多晶硅层的部分移除;形成与所述第一侧和所述第二侧相邻的绝缘间隔物;将与所述第一侧相邻的所述绝缘间隔物移除;在所述衬底中且在所述一对绝缘块之间形成源极区域;形成至少沿着所述第一侧并沿着与所述第二侧相邻的所述绝缘间隔物延伸的绝缘材料层;在第二多晶硅沉积工艺中,在所述衬底和所述一对绝缘块上方形成第二多晶硅层;在保持所述第二多晶硅层的第一多晶硅块、第二多晶硅块和第三多晶硅块的同时(其中所述第一多晶硅块被设置在所述一对绝缘块之间以及所述源极区域上方,所述第二多晶硅块被设置成与所述绝缘块中的一个绝缘块的所述第二侧相邻,所述第三多晶硅块被设置成与所述绝缘块中的另一绝缘块的所述第二侧相邻),将所述第二多晶硅层的部分移除;在所述衬底中并与所述第二多晶硅块相邻形成第一漏极区域;以及在所述衬底中并与所述第三多晶硅块相邻形成第二漏极区域。
一种形成一对非易失性存储器单元的简化方法包括:在半导体衬底上形成第一绝缘层;在第一多晶硅沉积工艺中,在所述第一绝缘层上形成第一多晶硅层;在所述第一多晶硅层上形成一对间隔开的绝缘块,每一个所述绝缘块具有面朝彼此的第一侧和背对彼此的第二侧;形成与所述第一侧和所述第二侧相邻的绝缘间隔物;减小与所述第一侧相邻的所述绝缘间隔物的宽度;在保持所述第一多晶硅层的各自被设置在所述一对绝缘块中的一个绝缘块和与所述一个绝缘块的所述第一侧和所述第二侧相邻的所述绝缘间隔物下方的一对多晶硅块的同时,将所述第一多晶硅层的部分移除;在所述衬底中且在所述一对绝缘块之间形成源极区域;将所述绝缘间隔物移除以使所述第一多晶硅层的所述一对多晶硅块中每个多晶硅块的端部暴露;形成至少沿着所述第一多晶硅层的所述一对多晶硅块中每个多晶硅块的暴露端部延伸的绝缘材料层;在第二多晶硅沉积工艺中,在所述衬底和所述一对绝缘块上方形成第二多晶硅层;在保持所述第二多晶硅层的第一多晶硅块、第二多晶硅块和第三多晶硅块的同时(其中所述第一多晶硅块被设置在所述一对绝缘块之间以及所述源极区域上方,所述第二多晶硅块被设置成与所述绝缘块中的一个绝缘块的所述第二侧相邻,所述第三多晶硅块被设置成与所述绝缘块中的另一绝缘块的所述第二侧相邻),将所述第二多晶硅层的部分移除;在所述衬底中并与所述第二多晶硅块相邻形成第一漏极区域;以及在所述衬底中并与所述第三多晶硅块相邻形成第二漏极区域。
一种形成一对非易失性存储器单元的简化方法包括:在半导体衬底上形成第一绝缘层;在第一多晶硅沉积工艺中,在所述第一绝缘层上形成第一多晶硅层;在所述第一多晶硅层上形成绝缘块,所述绝缘块具有相对的第一侧和第二侧;在所述第一多晶硅层上且与所述第一侧相邻形成第一绝缘间隔物,并且在所述第一多晶硅层上且与所述第二侧相邻形成第二绝缘间隔物;在保持所述第一多晶硅层的被设置在所述绝缘块以及所述第一绝缘间隔物和所述第二绝缘间隔物下方的多晶硅块的同时,将所述第一多晶硅层的部分移除;将所述绝缘块移除;将所述第一多晶硅层的设置在所述第一绝缘间隔物和所述第二绝缘间隔物之间的部分移除,以形成所述第一多晶硅层的设置在所述第一绝缘间隔物下方的第一多晶硅块和所述第一多晶硅层的设置在所述第二绝缘间隔物下方的第二多晶硅块;在所述衬底中且在所述第一绝缘间隔物与所述第二绝缘间隔物之间形成源极区域;形成至少沿着所述第一多晶硅层的所述第一多晶硅块和所述第二多晶硅块中每一者的端部延伸的绝缘材料;在第二多晶硅沉积工艺中,在所述衬底和所述一对绝缘间隔物上方形成第二多晶硅层;在保持所述第二多晶硅层的第三多晶硅块、第四多晶硅块和第五多晶硅块的同时(其中所述第三多晶硅块被设置在所述一对绝缘间隔物之间以及所述源极区域上方,所述第四多晶硅块被设置成与所述第一绝缘间隔物相邻,所述第五多晶硅块被设置成与所述第二绝缘间隔物相邻),将所述第二多晶硅层的部分移除;在所述衬底中并与所述第四多晶硅块相邻形成第一漏极区域;以及在所述衬底中并与所述第五多晶硅块相邻形成第二漏极区域。
通过查看说明书、权利要求和附图,本发明的其他目的和特征将变得显而易见。
附图说明
图1A至图1I为示出形成本发明的一对存储器单元的步骤的横截面图。
图2为用于形成本发明的一对存储器单元的另一个替代实施例的横截面图。
图3A至图3D为示出用于形成本发明的一对存储器单元的另一个替代实施例的步骤的横截面图。
图4A至图4D为示出用于形成本发明的一对存储器单元的另一个替代实施例的步骤的横截面图。
图5A至图5C为示出用于形成本发明的一对存储器单元的另一个替代实施例的步骤的横截面图。
图6为用于形成本发明的一对存储器单元的另一个替代实施例的横截面图。
图7为用于形成本发明的一对存储器单元的另一个替代实施例的横截面图。
具体实施方式
本发明是以数量减少的工序(例如,仅两个多晶硅沉积步骤)来制造存储器单元对的方法。参见图1A至图1I,它们示出存储器单元对制造工艺中的步骤的横截面图(虽然在附图中仅仅示出单对存储器单元的形成,但应当理解,这种存储器单元对的阵列是同时形成的)。该工艺始于在P型单晶硅衬底10上形成二氧化硅(氧化物)层12。氧化物层12可为80至
Figure BDA0000969883100000041
厚。之后,在二氧化硅层12上形成多晶硅(或非晶硅)层14。多晶硅层14可为200至
Figure BDA0000969883100000042
厚。在多晶硅层14上形成另一个绝缘层16(例如,氧化物),并且在氧化物层16上形成又一个绝缘层18(例如,氮化硅(氮化物)),如图1A所示。氧化物层16可为20至
Figure BDA0000969883100000051
厚,氮化物层18可为约
Figure BDA0000969883100000052
厚。
在该结构上涂布光刻胶材料(未示出),然后执行掩模步骤,使光刻胶材料的所选部分暴露。光刻胶被显影,使得光刻胶的部分被移除。使用剩下的光刻胶作为掩模,蚀刻该结构。具体地讲,对氮化物层18和氧化物层16进行各向异性蚀刻(使用多晶硅层14作为蚀刻终止层),留下成对氮化物块18,如图1B所示(在光刻胶被移除后)。氮化物块18之间的空间在本文中称为“内区域”,这对氮化物块外部的空间在本文中称为“外区域”。再次在该结构上涂布光刻胶材料,并且用掩模和显影步骤来将光刻胶材料图案化,以便覆盖内区域。随后,使用各向异性多晶硅蚀刻将多晶硅层14的在外区域中的那些部分移除,如图1C所示(在光刻胶被移除后)。
然后,在该结构的侧面上形成氧化物间隔物20。间隔物的形成是本领域熟知的,并且涉及材料在结构的轮廓上方的沉积,继之进行各向异性蚀刻工艺,由此将该材料从该结构的水平表面移除,而该材料在该结构的垂直取向表面上在很大程度上保持完整(具有圆化的上表面)。所得结构示于图1D中。接着,使用多晶硅蚀刻将多晶硅层14的在内区域中的暴露部分移除。接着,执行注入工艺(例如,注入和退火),以便在衬底中于内区域中形成源极区域22。所得结构示于图1E中。
在该结构上形成光刻胶并将光刻胶从内区域移除,然后使用氧化物蚀刻将内区域中的氧化物间隔物20以及源极区域上方的氧化物层12移除。在光刻胶被移除后,接着,将隧道氧化物层24形成在该结构上方(例如,通过高温氧化物HTO),包括形成在多晶硅层14的在内区域中的暴露部分上方,如图1F所示。将多晶硅厚层26形成在该结构上方(参见图1G),继之进行多晶硅蚀刻(例如,使用氮化物18作为蚀刻终止层的CMP),从而在内区域中留下多晶硅块26a并且在外区域中留下多晶硅块26b,如图1H所示。可使用可选的多晶硅蚀刻来减小多晶硅块26a和26b的高度(即,使所述多晶硅块低于氮化硅块18的顶部)。
在该结构上形成该光刻胶并将光刻胶图案化以使多晶硅块26b部分暴露,继之进行多晶硅蚀刻以将多晶硅块26b的暴露部分移除(即,限定多晶硅块26b的外缘)。接着,执行注入以便在衬底中形成与多晶硅块26b的外缘相邻的漏极区域30。然后,在多晶硅块26a和26b的暴露的上表面上形成自对准多晶硅化物28(以改进导电性)。最终结构示于图1I中,并且包括一对存储器单元。每一个存储器单元包括源极区域22、漏极区域30、衬底中介于源极区域与漏极区域之间的沟道区域32、设置在沟道区域32的第一部分上方且与该第一部分绝缘的浮动栅极14、设置在沟道区域32的第二部分上方且与该第二部分绝缘的字线栅极26b、以及设置在源极区域22上方且与该源极区域绝缘的擦除栅极26a。擦除栅极26a具有在侧向上与浮动栅极14相邻的第一部分,以及向上且在浮动栅极14的一部分上方延伸的第二部分。
上述制造方法具有若干优点。首先,使用仅两次多晶硅沉积就形成了所有三个栅极(浮动栅极14、擦除栅极26a和字线栅极26b)。浮动栅极14具有尖锐的尖端或边缘14a,该尖端或边缘面向擦除栅极26a中的凹口27以改进擦除效率。浮动栅极14相对较薄,而浮动栅极14上方的氮化物块18相对较厚并且充当可靠的硬掩模且用作多晶硅CMP终止层。
参考图2至图7,它们示出存储器单元对制造工艺的替代实施例的横截面图(虽然在这些附图中仅仅示出一个存储器单元的形成,但应当理解,在源极区域的另一侧上同时形成镜像存储器单元来作为一对存储器单元的组成部分,并且这种存储器单元对的阵列是同时形成的)。
图2示出图1A至图1I的工艺的替代实施例,其中在形成擦除栅极50a前(即,未进行内区域氧化物蚀刻),留下形成在内区域中浮动栅极14上方的间隔物42,以便简化制造工艺。
图3A至图3D示出图1A至图1I的工艺的又一个替代实施例,其中该工艺从上述的且示于图1A中的相同工序开始。然而,与如图1C所示仅移除多晶硅层14的在外区域中的暴露部分的多晶硅蚀刻不同,使用多晶硅蚀刻将内区域和外区域两者中的多晶硅层14移除,如图3A所示。优选地,在氮化物块18上形成另外的氧化物层60。绝缘间隔物62(例如,由氧化物和氮化物两者形成的复合物,或仅氧化物)沿着氮化物块18和多晶硅层14的侧面形成,如图3B所示。在该结构上形成光刻胶64,然后将所述光刻胶从内区域移除。通过氮化物/氧化物蚀刻移除暴露ON或氧化物间隔物62。接着,使用注入工艺形成源极区域66,如图3C所示。在光刻胶被移除后,在该结构上方形成氧化物层68。接着,执行多晶硅沉积、CMP和多晶硅蚀刻,形成擦除栅极70a和字线栅极70b。接着,使用注入物形成漏极72。最终结构示于图3D中。对于该实施例,擦除栅极70a与浮动栅极14和氮化物块18之间的间距仅由氧化物层68决定。
图4A至图4D示出图1A至图1I的工艺的又一个替代实施例,其中该工艺从上述的且示于图1A中的相同工序开始。在氮化物块18的两侧上形成绝缘材料(例如,氧化物)间隔物74。在该结构上形成光刻胶76,然后选择性地将所述光刻胶从外区域移除。使用多晶硅蚀刻将多晶硅层14的暴露部分移除。使用WLVT注入来对外区域中的衬底进行注入,如图4A所示。在光刻胶被移除后,在该结构上形成光刻胶78,然后选择性地将所述光刻胶从内区域移除。执行氧化物湿法蚀刻,以使内区域中的暴露的间隔物74减薄(以便独立控制擦除栅极和浮动栅极的最终重叠)。接着,执行多晶硅蚀刻将多晶硅层14的在内区域中的暴露部分移除。接着,执行注入工艺形成源极区域80,如图4B所示。在光刻胶被移除后,执行氧化物蚀刻以移除间隔物74以及氧化物层12的暴露部分。使用热氧化工艺在多晶硅层14和衬底10的暴露表面上形成氧化物层82,如图4C所示。使用多晶硅沉积和蚀刻来形成擦除栅极84a和字线栅极84b,并且使用注入形成漏极区域86,如图4D所示。擦除栅极84a和字线栅极84b两者具有在侧向上与浮动栅极相邻的第一部分,以及向上并在浮动栅极上方延伸的第二部分,用以提高擦除效率和电容耦合。浮动栅极相对于字线栅极被擦除栅极重叠的量受到独立控制,并且由氧化物间隔物减薄步骤决定。
图5A至图5C示出图2A至图1I的工艺的又一个替代实施例,其中该工艺从上述的且示于图1A中的相同工序开始。然而,在该实施例中,擦除栅极代替氮化物块18,而非形成在其旁边。具体地讲,在氮化物块18的两侧上形成绝缘材料(例如,对于可选间隔物88为氧化物-氮化物,对于间隔物90为氧化物)的间隔物88(可选)和间隔物90,如图5A所示。使用多晶硅蚀刻将多晶硅层14的不受氮化硅块18和间隔物88和90保护的那些部分移除。随后,在该结构的两侧上形成绝缘材料(例如,氧化物)的间隔物92,包括在多晶硅层的暴露端上形成这样的间隔物,如图5B所示。使用氮化物蚀刻将氮化物块18移除,从而留下沟槽并使多晶硅层14的在沟槽底部的部分暴露。使用多晶硅蚀刻将多晶硅层14的暴露部分移除。使用注入工艺形成源极区域93。将间隔物88移除或减薄,或者在无可选间隔物88的情况下将间隔物90减薄,并且沿着移除氮化物块18所留下的沟槽的侧壁形成氧化物94。执行多晶硅沉积和蚀刻,以形成擦除栅极96a和字线栅极96b。接着,使用注入工艺形成漏极区域98。所得结构示于图5C中。
图6示出图5A至图5C的工艺的替代实施例,其中在形成间隔物90前,执行多晶硅斜坡蚀刻以使得多晶硅层14的上表面随着其延伸远离氮化物块18而向下倾斜。这导致每个浮动栅极具有向上的坡面,该坡面终止于面向擦除栅极的凹口的更尖锐的边缘。
图7示出图1至图6的工艺的另一个替代实施例,其中通过多晶硅蚀刻将形成字线栅极的多晶硅块移除,并用高K材料(即,介电常数K大于诸如HfO2、ZrO2、TiO2等的氧化物的介电常数)的绝缘层以及金属材料块替代。例如,对于图2的实施例,通过多晶硅蚀刻将多晶硅块50b移除,并用高K材料的绝缘层56以及金属材料块58替代,如图7所示。通过使字线栅极58由金属形成,可实现更高的栅极导电率。对于图1I中的多晶硅块26b、图3D中的多晶硅块70b、图4D中的多晶硅块84b和图5C和图6中的多晶硅块96b,同样也能够这样做。
应当理解,本发明不限于上述的和本文中示出的实施例,而是涵盖落在所附权利要求书的范围内的任何和所有变型形式。举例来说,本文中对本发明的提及并不意在限制任何权利要求或权利要求术语的范围,而是仅涉及可由这些权利要求中的一项或多项权利要求涵盖的一个或多个特征。上文所述的材料、工艺和数值的例子仅为示例性的,而不应视为限制权利要求。例如,氮化物块18可替代地由氧化物层或具有氧化物-氮化物-氧化或氧化物-氮化物的复合物层制成。字线栅极26b、50b、70b、84b和96b下方的绝缘体可为二氧化硅或经受NO、N2O退火或DPN(去耦等离子体氮化)的经氮处理的氧化物,但不限于这些例子。另外,根据权利要求和说明书显而易见的是,并非所有方法步骤都需要以所示出或所声称的精确顺序执行,而是需要以允许本发明的存储器单元的适当形成的任意顺序来执行。最后,单个材料层可以被形成为多个这种或类似材料层,反之亦然。
应该指出的是,如本文所用,术语“在…上方”和“在…上”两者包容地包含“直接在…上”(之间未设置中间材料、元件或空间)和“间接在…上”(之间设置有中间材料、元件或空间)。类似地,术语“相邻”包括“直接相邻”(之间没有设置中间材料、元件或空间)和“间接相邻”(之间设置有中间材料、元件或空间),“被安装到”包括“被直接安装到”(之间没有设置中间材料、元件或空间)和“被间接安装到”(之间设置有中间材料、元件或空间),并且“被电连接到”包括“被直接电连接到”(之间没有将元件电连接在一起的中间材料或元件)和“被间接电连接到”(之间有将元件电连接在一起的中间材料或元件)。例如,“在衬底上方”形成元件可包括在之间没有中间材料/元件的情况下在衬底上直接形成元件,以及在之间有一个或多个中间材料/元件的情况下在衬底上间接形成元件。

Claims (27)

1.一种形成一对非易失性存储器单元的方法,所述方法包括:
在半导体衬底上形成第一绝缘层;
在第一多晶硅沉积工艺中,在所述第一绝缘层上形成第一多晶硅层;
直接在所述第一多晶硅层上形成一对间隔开的绝缘块,每一个所述绝缘块具有面朝彼此的第一侧和背对彼此的第二侧;
在保持所述第一多晶硅层的被设置在所述一对间隔开的绝缘块下方以及所述一对间隔开的绝缘块之间的部分的同时,将所述第一多晶硅层的部分移除;
形成与所述第一侧相邻并且在所述第一多晶硅层的设置在所述一对间隔开的绝缘块之间的部分上方的一对间隔开的绝缘间隔物,其中所述绝缘间隔物的所述形成包括移除所述第一绝缘层的与所述第二侧相邻的部分;
将所述第一多晶硅层的设置在所述绝缘间隔物之间的部分移除,同时保持所述第一多晶硅层的各自被设置在所述一对间隔开的绝缘块中的一个绝缘块和所述一对间隔开的绝缘间隔物中的一个绝缘间隔物下方的一对多晶硅块;
在所述衬底中且在所述一对间隔开的绝缘块之间形成源极区域;
将所述一对间隔开的绝缘间隔物移除;
形成至少沿着所述一对多晶硅块中每个多晶硅块的端部并且沿着所述半导体衬底的与所述第二侧相邻的部分延伸的绝缘材料;
在第二多晶硅沉积工艺中,在所述衬底和所述一对间隔开的绝缘块上方形成第二多晶硅层;
在保持所述第二多晶硅层的第一多晶硅块、第二多晶硅块和第三多晶硅块的同时,将所述第二多晶硅层的部分移除,其中:
所述第一多晶硅块被设置在所述一对间隔开的绝缘块之间以及所述源极区域上方,
所述第二多晶硅块被设置成与所述绝缘块中的一个绝缘块的所述第二侧相邻,并且
所述第三多晶硅块被设置成与所述绝缘块中的另一绝缘块的所述第二侧相邻;
其中所述第二多晶硅层的所述部分的所述移除包括使用所述一对间隔开的绝缘块作为蚀刻终止层来执行CMP,以平坦化第一、第二和第三多晶硅块的顶表面;
在所述衬底中并与所述第二多晶硅块相邻形成第一漏极区域;以及
在所述衬底中并与所述第三多晶硅块相邻形成第二漏极区域。
2.根据权利要求1所述的方法,所述方法还包括:
在所述第一多晶硅块、所述第二多晶硅块和所述第三多晶硅块的上表面上形成自对准多晶硅化物。
3.根据权利要求1所述的方法,其中所述第一多晶硅块包括在侧向上与所述第一多晶硅层的所述一对多晶硅块相邻的第一部分,以及向上且在所述第一多晶硅层的所述一对多晶硅块上方延伸的第二部分。
4.根据权利要求1所述的方法,所述方法还包括:
在用于形成所述一对间隔开的绝缘间隔物的相同的沉积和蚀刻工艺中,形成与所述第二侧相邻的一对第二绝缘间隔物。
5.根据权利要求1所述的方法,其中所述间隔开的绝缘块由氮化物和氧化物中的至少一种形成。
6.根据权利要求1所述的方法,其中所述第一绝缘层由氧化物或经氮处理的氧化物形成。
7.根据权利要求1所述的方法,所述方法还包括:
将所述第二多晶硅块和所述第三多晶硅块移除;以及
形成与所述绝缘块中的一个绝缘块的所述第二侧相邻的第一金属块;
形成与所述绝缘块中的另一绝缘块的所述第二侧相邻的第二金属块。
8.根据权利要求7所述的方法,所述方法还包括:
在所述第一金属块与所述绝缘块中的一个绝缘块的所述第二侧之间形成高K绝缘材料层;以及
在所述第二金属块与所述绝缘块中的另一绝缘块的所述第二侧之间形成高K绝缘材料层。
9.一种形成一对非易失性存储器单元的方法,所述方法包括:
在半导体衬底上形成第一绝缘层;
在第一多晶硅沉积工艺中,在所述第一绝缘层上形成第一多晶硅层;
在所述第一多晶硅层上形成一对间隔开的绝缘块,每一个所述绝缘块具有面朝彼此的第一侧和背对彼此的第二侧;
在保持所述第一多晶硅层的各自被设置在所述一对间隔开的绝缘块中的一个绝缘块下方的一对多晶硅块的同时,将所述第一多晶硅层的部分移除;
形成与所述第一侧和所述第二侧相邻的绝缘间隔物;
将与所述第一侧相邻的所述绝缘间隔物移除;
在所述衬底中且在所述一对间隔开的绝缘块之间形成源极区域;
形成至少沿着所述第一侧并沿着与所述第二侧相邻的所述绝缘间隔物延伸的绝缘材料层;
在第二多晶硅沉积工艺中,在所述衬底和所述一对间隔开的绝缘块上方形成第二多晶硅层;
在保持所述第二多晶硅层的第一多晶硅块、第二多晶硅块和第三多晶硅块的同时,将所述第二多晶硅层的部分移除,其中:
所述第一多晶硅块被设置在所述一对间隔开的绝缘块之间以及所述源极区域上方,
所述第二多晶硅块被设置成与所述绝缘块中的一个绝缘块的所述第二侧相邻,并且
所述第三多晶硅块被设置成与所述绝缘块中的另一绝缘块的所述第二侧相邻;
在所述衬底中并与所述第二多晶硅块相邻形成第一漏极区域;以及
在所述衬底中并与所述第三多晶硅块相邻形成第二漏极区域;
其中所述第一多晶硅块仅通过所述绝缘材料层与所述第一多晶硅层的所述一对多晶硅块绝缘;
所述第二多晶硅块仅通过所述绝缘材料层和所述绝缘间隔物中的一个绝缘间隔物与所述第一多晶硅层的所述一对多晶硅块中的一个多晶硅块绝缘;以及
所述第三多晶硅块仅通过所述绝缘材料层和所述绝缘间隔物中的一个绝缘间隔物与所述第一多晶硅层的所述一对多晶硅块中的一个多晶硅块绝缘。
10.根据权利要求9所述的方法,其中所述间隔开的绝缘块由氮化物和氧化物中的至少一种形成。
11.根据权利要求9所述的方法,其中所述第一绝缘层由氧化物或经氮处理的氧化物形成。
12.根据权利要求9所述的方法,所述方法还包括:
将所述第二多晶硅块和所述第三多晶硅块移除;以及
形成与所述绝缘块中的一个绝缘块的所述第二侧相邻的第一金属块;
形成与所述绝缘块中的另一绝缘块的所述第二侧相邻的第二金属块。
13.根据权利要求12所述的方法,所述方法还包括:
在所述第一金属块与所述绝缘块中的一个绝缘块的所述第二侧之间形成高K绝缘材料层;以及
在所述第二金属块与所述绝缘块中的另一绝缘块的所述第二侧之间形成高K绝缘材料层。
14.一种形成一对非易失性存储器单元的方法,所述方法包括:
在半导体衬底上形成第一绝缘层;
在第一多晶硅沉积工艺中,在所述第一绝缘层上形成第一多晶硅层;
在所述第一多晶硅层上形成一对间隔开的绝缘块,每一个所述绝缘块具有面朝彼此的第一侧和背对彼此的第二侧;
形成与所述第一侧和所述第二侧相邻的绝缘间隔物;
减小与所述第一侧相邻的所述绝缘间隔物的宽度;
在保持所述第一多晶硅层的各自被设置在所述一对间隔开的绝缘块中的一个绝缘块和与所述一个绝缘块的所述第一侧和所述第二侧相邻的所述绝缘间隔物下方的一对多晶硅块的同时,将所述第一多晶硅层的部分移除;
在所述衬底中且在所述一对间隔开的绝缘块之间形成源极区域;
将所述绝缘间隔物移除以使所述第一多晶硅层的所述一对多晶硅块中每个多晶硅块的端部暴露;
形成至少沿着所述第一多晶硅层的所述一对多晶硅块中每个多晶硅块的暴露端部延伸的绝缘材料层;
在第二多晶硅沉积工艺中,在所述衬底和所述一对间隔开的绝缘块上方形成第二多晶硅层;
在保持所述第二多晶硅层的第一多晶硅块、第二多晶硅块和第三多晶硅块的同时,将所述第二多晶硅层的部分移除,其中:
所述第一多晶硅块被设置在所述一对间隔开的绝缘块之间以及所述源极区域上方,
所述第二多晶硅块被设置成与所述绝缘块中的一个绝缘块的所述第二侧相邻,并且
所述第三多晶硅块被设置成与所述绝缘块中的另一绝缘块的所述第二侧相邻;
在所述衬底中并与所述第二多晶硅块相邻形成第一漏极区域;以及
在所述衬底中并与所述第三多晶硅块相邻形成第二漏极区域。
15.根据权利要求14所述的方法,其中:
所述第一多晶硅块包括在侧向上与所述第一多晶硅层的所述一对多晶硅块相邻的第一部分,以及向上且在所述第一多晶硅层的所述一对多晶硅块上方延伸的第二部分;
所述第二多晶硅块包括在侧向上与所述第一多晶硅层的所述一对多晶硅块中的一个多晶硅块相邻的第一部分,以及向上且在所述第一多晶硅层的所述一对多晶硅块中的所述一个多晶硅块上方延伸的第二部分;
所述第三多晶硅块包括在侧向上与所述第一多晶硅层的所述一对多晶硅块中的另一多晶硅块相邻的第一部分,以及向上且在所述第一多晶硅层的所述一对多晶硅块中的所述另一多晶硅块上方延伸的第二部分。
16.根据权利要求15所述的方法,其中所述第一多晶硅块与所述第一多晶硅层的所述一对多晶硅块中任一者之间的垂直重叠量小于所述第二多晶硅块与所述第一多晶硅层的所述一对多晶硅块中的所述一个多晶硅块之间的垂直重叠量,并且小于所述第三多晶硅块与所述第一多晶硅层的所述一对多晶硅块中的所述另一多晶硅块之间的垂直重叠量。
17.根据权利要求14所述的方法,其中所述间隔开的绝缘块由氮化物和氧化物中的至少一种形成。
18.根据权利要求14所述的方法,其中所述第一绝缘层由氧化物或经氮处理的氧化物形成。
19.根据权利要求14所述的方法,所述方法还包括:
将所述第二多晶硅块和所述第三多晶硅块移除;以及
形成与所述绝缘块中的一个绝缘块的所述第二侧相邻的第一金属块;
形成与所述绝缘块中的另一绝缘块的所述第二侧相邻的第二金属块。
20.根据权利要求19所述的方法,所述方法还包括:
在所述第一金属块与所述绝缘块中的一个绝缘块的所述第二侧之间形成高K绝缘材料层;以及
在所述第二金属块与所述绝缘块中的另一绝缘块的所述第二侧之间形成高K绝缘材料层。
21.一种形成一对非易失性存储器单元的方法,所述方法包括:
在半导体衬底上形成第一绝缘层;
在第一多晶硅沉积工艺中,在所述第一绝缘层上形成第一多晶硅层;
在所述第一多晶硅层上形成绝缘块,所述绝缘块具有相对的第一侧和第二侧;
在所述第一多晶硅层上且与所述第一侧相邻形成第一绝缘间隔物,并且在所述第一多晶硅层上且与所述第二侧相邻形成第二绝缘间隔物;
在保持所述第一多晶硅层的被设置在所述绝缘块以及所述第一绝缘间隔物和所述第二绝缘间隔物下方的多晶硅块的同时,将所述第一多晶硅层的部分移除;
将所述绝缘块移除;
将所述第一多晶硅层的设置在所述第一绝缘间隔物和所述第二绝缘间隔物之间的部分移除,以形成所述第一多晶硅层的设置在所述第一绝缘间隔物下方的第一多晶硅块和所述第一多晶硅层的设置在所述第二绝缘间隔物下方的第二多晶硅块;
在所述衬底中且在所述第一绝缘间隔物与所述第二绝缘间隔物之间形成源极区域;
形成至少沿着所述第一多晶硅层的所述第一多晶硅块和所述第二多晶硅块每者的端部延伸的绝缘材料;
在第二多晶硅沉积工艺中,在所述衬底和第一和第二绝缘间隔物上方形成第二多晶硅层;
在保持所述第二多晶硅层的第三多晶硅块、第四多晶硅块和第五多晶硅块的同时,将所述第二多晶硅层的部分移除,其中:
所述第三多晶硅块被设置在第一和第二绝缘间隔物之间以及所述源极区域上方,
所述第四多晶硅块被设置成与所述第一绝缘间隔物相邻,并且
所述第五多晶硅块被设置成与所述第二绝缘间隔物相邻;
在所述衬底中并与所述第四多晶硅块相邻形成第一漏极区域;以及
在所述衬底中并与所述第五多晶硅块相邻形成第二漏极区域。
22.根据权利要求21所述的方法,其中在所述绝缘块被移除前,所述方法还包括:
对所述第一多晶硅层的上表面执行多晶硅斜坡蚀刻,以使所述上表面随着所述上表面延伸远离所述绝缘块而向下倾斜。
23.根据权利要求21所述的方法,其中所述第三多晶硅块包括在侧向上与所述第一多晶硅层的所述第一多晶硅块和所述第二多晶硅块相邻的第一部分,以及向上且在所述第一多晶硅层的所述第一多晶硅块和所述第二多晶硅块上方延伸的第二部分。
24.根据权利要求21所述的方法,其中所述绝缘块由氮化物、氧化物、或包括氮化物和氧化物两者的层复合物形成。
25.根据权利要求21所述的方法,其中所述第一绝缘层由氧化物或经氮处理的氧化物形成。
26.根据权利要求21所述的方法,所述方法还包括:
将所述第四多晶硅块和所述第五多晶硅块移除;以及
形成与所述第一绝缘间隔物相邻的第一金属块;
形成与所述第二绝缘间隔物相邻的第二金属块。
27.根据权利要求26所述的方法,所述方法还包括:
在所述第一金属块与所述第一绝缘间隔物之间形成高K绝缘材料层;以及
在所述第二金属块与所述第二绝缘间隔物之间形成高K绝缘材料层。
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