JP6238235B2 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
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- JP6238235B2 JP6238235B2 JP2014122606A JP2014122606A JP6238235B2 JP 6238235 B2 JP6238235 B2 JP 6238235B2 JP 2014122606 A JP2014122606 A JP 2014122606A JP 2014122606 A JP2014122606 A JP 2014122606A JP 6238235 B2 JP6238235 B2 JP 6238235B2
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- Prior art keywords
- insulating film
- gate electrode
- floating gate
- element isolation
- film
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- 239000004065 semiconductor Substances 0.000 title claims description 37
- 238000002955 isolation Methods 0.000 claims description 79
- 239000000758 substrate Substances 0.000 claims description 78
- 230000015572 biosynthetic process Effects 0.000 claims description 24
- 102100025292 Stress-induced-phosphoprotein 1 Human genes 0.000 description 40
- 101710140918 Stress-induced-phosphoprotein 1 Proteins 0.000 description 40
- 230000015654 memory Effects 0.000 description 26
- 102100027564 DNA replication complex GINS protein PSF1 Human genes 0.000 description 21
- 101001080484 Homo sapiens DNA replication complex GINS protein PSF1 Proteins 0.000 description 21
- 239000012535 impurity Substances 0.000 description 18
- 101150031442 sfc1 gene Proteins 0.000 description 18
- 101000658644 Homo sapiens Tetratricopeptide repeat protein 21A Proteins 0.000 description 17
- 102100034913 Tetratricopeptide repeat protein 21A Human genes 0.000 description 17
- 238000004519 manufacturing process Methods 0.000 description 17
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 15
- 238000005530 etching Methods 0.000 description 15
- 229910052814 silicon oxide Inorganic materials 0.000 description 15
- 230000002093 peripheral effect Effects 0.000 description 13
- 101150089655 Ins2 gene Proteins 0.000 description 11
- 101100072652 Xenopus laevis ins-b gene Proteins 0.000 description 11
- 102100036218 DNA replication complex GINS protein PSF2 Human genes 0.000 description 9
- 101000736065 Homo sapiens DNA replication complex GINS protein PSF2 Proteins 0.000 description 9
- 101100332235 Saccharomyces cerevisiae (strain ATCC 204508 / S288c) DRN1 gene Proteins 0.000 description 9
- 238000000034 method Methods 0.000 description 9
- 101150024306 sou1 gene Proteins 0.000 description 9
- 239000010410 layer Substances 0.000 description 8
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 8
- 229920005591 polysilicon Polymers 0.000 description 8
- 101100260207 Schizosaccharomyces pombe (strain 972 / ATCC 24843) sfc2 gene Proteins 0.000 description 7
- 229910052581 Si3N4 Inorganic materials 0.000 description 7
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 7
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 6
- 239000011229 interlayer Substances 0.000 description 6
- 229910052710 silicon Inorganic materials 0.000 description 6
- 239000010703 silicon Substances 0.000 description 6
- 101100149883 Candida albicans (strain SC5314 / ATCC MYA-2876) SOU2 gene Proteins 0.000 description 5
- 102100036740 DNA replication complex GINS protein PSF3 Human genes 0.000 description 4
- 101001136564 Homo sapiens DNA replication complex GINS protein PSF3 Proteins 0.000 description 4
- 238000000151 deposition Methods 0.000 description 4
- 230000000994 depressogenic effect Effects 0.000 description 4
- 239000000463 material Substances 0.000 description 4
- 238000009751 slip forming Methods 0.000 description 4
- 238000001312 dry etching Methods 0.000 description 3
- 230000006870 function Effects 0.000 description 3
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 2
- 238000013459 approach Methods 0.000 description 2
- 230000015556 catabolic process Effects 0.000 description 2
- 230000007423 decrease Effects 0.000 description 2
- 238000009792 diffusion process Methods 0.000 description 2
- 150000002500 ions Chemical class 0.000 description 2
- 230000001590 oxidative effect Effects 0.000 description 2
- 229910021332 silicide Inorganic materials 0.000 description 2
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 2
- 239000002344 surface layer Substances 0.000 description 2
- 239000012808 vapor phase Substances 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 230000003071 parasitic effect Effects 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/401—Multistep manufacturing processes
- H01L29/4011—Multistep manufacturing processes for data storage electrodes
- H01L29/40114—Multistep manufacturing processes for data storage electrodes the electrodes comprising a conductor-insulator-conductor-insulator-semiconductor structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42324—Gate electrodes for transistors with a floating gate
- H01L29/42328—Gate electrodes for transistors with a floating gate with at least one additional gate other than the floating gate and the control gate, e.g. program gate, erase gate or select gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/788—Field effect transistors with field effect produced by an insulated gate with floating gate
- H01L29/7881—Programmable transistors with only two possible levels of programmation
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/40—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
- H10B41/42—Simultaneous manufacture of periphery and memory cells
Description
CIR 周辺回路領域
CON1 コンタクト
CON2 コンタクト
DEP 凹部
DRN1 ドレイン
DRN2 ドレイン
EGE 消去ゲート電極
ESI 絶縁膜
FGE 浮遊ゲート電極
FMR 不揮発メモリ領域
GINS1 浮遊ゲート絶縁膜
GINS2 選択ゲート絶縁膜
GE ゲート電極
HMSK ハードマスク
INSL 層間絶縁膜
LDR 低濃度不純物領域
PSI 導電膜
PR1 レジストパターン
PR2 レジストパターン
PR3 レジストパターン
PR4 レジストパターン
PR5 レジストパターン
PR6 レジストパターン
PR7 レジストパターン
SD 半導体装置
SFC1 第1上面
SFC2 第2上面
SGE 選択ゲート電極
SINS1 第1絶縁膜
SINS2 第2絶縁膜
SINS3 第3絶縁膜
SOU1 ソース
SOU2 ソース
STI1 第1素子分離膜
STI2 第2素子分離膜
SUB 基板
TINS 絶縁膜
Claims (6)
- 基板と、
前記基板に形成され、前記基板の第1素子形成領域の隣に位置する第1素子分離膜と、
前記第1素子形成領域に位置する前記基板上に形成された浮遊ゲート絶縁膜と、
前記浮遊ゲート絶縁膜上に形成された浮遊ゲート電極と、
前記浮遊ゲート電極上面に第1絶縁膜を介して形成された制御ゲート電極と、
前記第1素子形成領域に位置する前記基板上に形成され、平面視において、前記浮遊ゲート絶縁膜から第1方向に延在して形成された選択ゲート絶縁膜と、
前記選択ゲート絶縁膜上及び前記第1素子分離膜上に、平面視において、前記第1方向と交差する第2方向に連続して形成され、側面が第2絶縁膜を介して前記浮遊ゲート電極の第1側面に接する選択ゲート電極と、
前記浮遊ゲート電極の前記第1側面と反対側の第2側面に、第3絶縁膜を介して接する消去ゲート電極と、
を備え、
前記第1素子分離膜のうち前記選択ゲート電極と重なる領域の上面である第1上面は、前記基板の上面よりも下に位置し、
前記第2絶縁膜は前記第1素子分離膜と接している前記第1素子形成領域の端部を覆っている半導体装置。 - 請求項1に記載の半導体装置において、
前記第2絶縁膜の下端は、前記基板の上面よりも下に位置している半導体装置。 - 請求項2に記載の半導体装置において、
前記第2絶縁膜の下端から前記浮遊ゲート電極の底面までの距離は、前記第2絶縁膜の厚さよりも大きい半導体装置。 - 請求項1に記載の半導体装置において、
前記第1上面は、前記第1素子分離膜のうち前記制御ゲート電極と重なる領域の上面である第2上面よりも下に位置する半導体装置。 - 請求項4に記載の半導体装置において、
前記基板に形成され、第2素子形成領域の隣に位置する第2素子分離膜と、
前記第2素子形成領域に形成されたトランジスタと、
を備え、
前記トランジスタのゲート電極の一部は前記第2素子分離膜上に位置し、
前記第2素子分離膜のうち前記ゲート電極と重なる領域の上面は、前記第1上面よりも高く、かつ前記第2上面よりも低い半導体装置。 - 請求項1に記載の半導体装置において、
前記基板に形成され、第2素子形成領域の隣に位置する第2素子分離膜と、
前記第2素子形成領域に形成されたトランジスタと、
を備え、
前記第2素子分離膜の上面は、前記第1上面よりも上に位置する半導体装置。
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2014122606A JP6238235B2 (ja) | 2014-06-13 | 2014-06-13 | 半導体装置 |
US14/737,148 US9356032B2 (en) | 2014-06-13 | 2015-06-11 | Semiconductor device with improved electrode isolation |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2014122606A JP6238235B2 (ja) | 2014-06-13 | 2014-06-13 | 半導体装置 |
Publications (2)
Publication Number | Publication Date |
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JP2016004822A JP2016004822A (ja) | 2016-01-12 |
JP6238235B2 true JP6238235B2 (ja) | 2017-11-29 |
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JP (1) | JP6238235B2 (ja) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
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US9793279B2 (en) * | 2015-07-10 | 2017-10-17 | Silicon Storage Technology, Inc. | Split gate non-volatile memory cell having a floating gate, word line, erase gate, and method of manufacturing |
US10535670B2 (en) * | 2016-02-25 | 2020-01-14 | Taiwan Semiconductor Manufacturing Co., Ltd. | Non-volatile memory having an erase gate formed between two floating gates with two word lines formed on other sides and a method for forming the same |
CN107305892B (zh) * | 2016-04-20 | 2020-10-02 | 硅存储技术公司 | 使用两个多晶硅沉积步骤来形成三栅极非易失性闪存单元对的方法 |
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US6091104A (en) * | 1999-03-24 | 2000-07-18 | Chen; Chiou-Feng | Flash memory cell with self-aligned gates and fabrication process |
KR100442090B1 (ko) * | 2002-03-28 | 2004-07-27 | 삼성전자주식회사 | 분할된 게이트 구조를 갖는 비휘발성 메모리 셀들 및 그제조방법 |
US6747310B2 (en) * | 2002-10-07 | 2004-06-08 | Actrans System Inc. | Flash memory cells with separated self-aligned select and erase gates, and process of fabrication |
JP2006041354A (ja) * | 2004-07-29 | 2006-02-09 | Renesas Technology Corp | 半導体装置及びその製造方法 |
JP2008085102A (ja) | 2006-09-28 | 2008-04-10 | Toshiba Corp | 半導体装置およびその製造方法 |
US7652318B2 (en) * | 2006-11-03 | 2010-01-26 | Taiwan Semiconductor Manufacturing Co., Ltd. | Split-gate memory cells and fabrication methods thereof |
US20090039410A1 (en) | 2007-08-06 | 2009-02-12 | Xian Liu | Split Gate Non-Volatile Flash Memory Cell Having A Floating Gate, Control Gate, Select Gate And An Erase Gate With An Overhang Over The Floating Gate, Array And Method Of Manufacturing |
JP5503843B2 (ja) * | 2007-12-27 | 2014-05-28 | ルネサスエレクトロニクス株式会社 | 不揮発性半導体記憶装置及びその製造方法 |
JP2009188293A (ja) * | 2008-02-08 | 2009-08-20 | Nec Electronics Corp | 不揮発性半導体記憶装置及びその製造方法 |
US8093649B2 (en) * | 2008-03-28 | 2012-01-10 | National Tsing Hua University | Flash memory cell |
JP2010050208A (ja) * | 2008-08-20 | 2010-03-04 | Renesas Technology Corp | 半導体記憶装置 |
US7851846B2 (en) * | 2008-12-03 | 2010-12-14 | Silicon Storage Technology, Inc. | Non-volatile memory cell with buried select gate, and method of making same |
JP2010182751A (ja) * | 2009-02-03 | 2010-08-19 | Renesas Electronics Corp | 不揮発性半導体記憶装置及びその製造方法 |
JP2010183098A (ja) * | 2010-03-30 | 2010-08-19 | Renesas Electronics Corp | 不揮発性半導体記憶装置 |
JP2012222201A (ja) | 2011-04-11 | 2012-11-12 | Renesas Electronics Corp | 半導体装置及び半導体装置の製造方法 |
TWI422017B (zh) * | 2011-04-18 | 2014-01-01 | Powerchip Technology Corp | 非揮發性記憶體元件及其製造方法 |
US9018690B2 (en) * | 2012-09-28 | 2015-04-28 | Silicon Storage Technology, Inc. | Split-gate memory cell with substrate stressor region, and method of making same |
JP6114534B2 (ja) * | 2012-11-07 | 2017-04-12 | ルネサスエレクトロニクス株式会社 | 半導体装置及び半導体装置の製造方法 |
US9293359B2 (en) * | 2013-03-14 | 2016-03-22 | Silicon Storage Technology, Inc. | Non-volatile memory cells with enhanced channel region effective width, and method of making same |
US9679980B2 (en) * | 2014-03-13 | 2017-06-13 | Taiwan Semiconductor Manufacturing Co., Ltd. | Common source oxide formation by in-situ steam oxidation for embedded flash |
-
2014
- 2014-06-13 JP JP2014122606A patent/JP6238235B2/ja active Active
-
2015
- 2015-06-11 US US14/737,148 patent/US9356032B2/en active Active
Also Published As
Publication number | Publication date |
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JP2016004822A (ja) | 2016-01-12 |
US9356032B2 (en) | 2016-05-31 |
US20150364481A1 (en) | 2015-12-17 |
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