CN101419914B - 用于在沟槽内形成电介质层的方法 - Google Patents

用于在沟槽内形成电介质层的方法 Download PDF

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CN101419914B
CN101419914B CN2008101711541A CN200810171154A CN101419914B CN 101419914 B CN101419914 B CN 101419914B CN 2008101711541 A CN2008101711541 A CN 2008101711541A CN 200810171154 A CN200810171154 A CN 200810171154A CN 101419914 B CN101419914 B CN 101419914B
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precursor
silicon
oxygen
silicon oxide
oxide layer
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CN101419914A (zh
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梁静美
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Applied Materials Inc
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Applied Materials Inc
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Abstract

一种形成半导体结构的方法，其包括在大约150℃或更低的处理温度下使硅前体和原子氧前体反应，以便在基板之上形成氧化硅层。在含氧环境内紫外线(UV)固化该氧化硅层。

Description

用于在沟槽内形成电介质层的方法
相关申请的交叉参考
本申请涉及共同受让的Nitin K.Ingle等人的名为“CHEMICAL VAPORDEPOSITION OF HIGH QUALITY FLOW-LIKE SILICON DIOXIDE USING ASILICON CONTAINING PRECURSOR AND ATOMIC OXYGEN”的代理人卷号为A010498/T69600的美国专利申请。本申请还涉及共同受让的2007年5月29日提交的Lubomirsky等人的名为“PROCESS CHAMBER FORDIELECTRIC GAPFILL”的美国专利申请No.11/754,924。本申请还涉及共同受让的Abjijit Basu Mallick等人的名为“HIGH QUALITY SILICON OXIDEFILMS BY REMOTE PLASMA CVD FROM DISILANE PRECURSORS”的代理人卷号为016301/078800US的美国专利申请。为了所有目的，将相关申请的全部内容通过引用引入本文。
发明背景
本发明一般涉及用于形成半导体结构的方法，尤其涉及用于在沟槽中形成电介质层的方法。
由于集成电路上的器件密度持续提高，尺寸和器件结构之间的距离持续减小。在这些形成中，结构的间隙以及结构之间的沟槽的更窄宽度增加了高度与宽度的比值(即高宽比)。集成电路元件的持续小型化使这些元件内部及其之间的水平宽度以比其垂直高度更快的速度缩小。
虽然使器件结构不断增加高宽比的能力已经允许在半导体芯片基板的相同表面区域上封装更多的结构(例如晶体管、电容、二极管等)，但是也产生了制造问题。这些问题之一是难以完全填充在这些结构中的间隙和沟槽而不在填充期间产生空隙或线缝。为了将邻近器件结构彼此电隔离，必须用如氧化硅的电介质材料填充间隙和沟槽。如果留下空的间隙，对于器件，将存在太多的电噪音和电流泄漏，而不能适当运行(或根本不能运行)。
当间隙宽度较大(而且高宽比较小)时，可以由电介质材料的快速沉积而相对容易地填充间隙。沉积材料将覆盖间隙的侧壁和底部，并持续地从底部向上填充，直到完全填满裂缝或沟槽。然而，由于高宽比增大，将深的、窄的沟槽填满而没有在填充体积中引起空隙或线缝的阻塞，变得更加困难。
电介质层中的空隙和线缝在半导体器件制造期间和成品器件中均会产生问题。空隙和线缝在电介质层中随机地形成，并且它们具有不可预知的尺寸、形状、位置和群密度。这导致该层的诸如均匀蚀刻、抛光、退火等的后沉积处理的不可预知和不一致。在成品器件中的空隙和线缝还产生器件结构中间隙和沟槽的电介质性质的变化。而这由于器件元件内部和器件元件之间的电串扰、电荷泄漏、甚至短路，可能导致不均匀的、及劣质的器件性能。
已经开发出在高宽比高的结构上沉积电介质材料期间使空隙和线缝的形成最小化的技术。这些技术包括减慢电介质材料的沉积速度，以便该电介质材料更加对于沟槽的侧壁和底部保持更加保形。更加保形的沉积可以降低被沉积材料阻塞在沟槽的顶部或中间及最终密封空隙顶部的程度。然而，减慢沉积速度意味这增加沉积时间，这降低处理效率和生产率。
用于控制空隙形成的另一种技术是提高沉积的电介质材料的流动性。具有更高流动性的材料可以更加快速地填充空隙或线缝，并防止其变成填充体积中的永久缺陷。提高氧化硅电介质材料的流动性通常包括向用于形成氧化物层的前体混合物中添加水蒸气或过氧化物(例如H2O2)。水蒸气在沉积薄膜中产生更多的Si-OH键，该Si-OH键赋予该薄膜提高的流动性。然而，在氧化硅沉积期间湿度水平的增加还可以对沉积薄膜的性能产生不利影响，包括其密度(即增加的湿法蚀刻速度比(WERR))和介电性能(即增加的k值)。
发明概述
根据示范实施例，用于形成半导体结构的方法包括在大约150℃或更低的处理温度下使硅前体和原子氧前体反应，以便在基板之上形成氧化硅层。在含氧环境内紫外线(UV)固化固化氧化硅层。
根据又一个示范实施例，该方法还包括在基板内至少形成一个沟槽，其中该至少一个沟槽具有大约5:1或更高的高度与宽度的高宽比。
根据另一个示范实施例，该方法还包括将该基板装入沉积室；在该沉积室外部产生原子氧前体；将该原子氧前体引入到该室中；以及将硅前体引入到该沉积室中，其中在该沉积室中混合硅前体和原子氧前体。
根据替代示范实施例，产生原子氧前体包括：从包括氩气的气体混合物形成等离子体；以及将氧前体引入到该等离子体中，其中氧前体分解，以便形成原子氧。该氧前体可选自由分子氧、臭氧、及二氧化氮组成的组。
根据示范实施例，硅前体选自由硅烷、二甲基硅烷、三甲基硅烷、四甲基硅烷、二乙基硅烷、四甲基原硅酸酯(TMOS)、四乙基原硅酸酯(TEOS)、八甲基三硅氧烷(OMTS)、八甲基环四硅氧烷(OMCTS)、四甲基环四硅氧烷(TOMCATS)、DMDMOS、DEMS、甲基三乙氧基硅烷(MTES)、苯基二甲基硅烷、及苯基硅烷组成的组。
根据又一个示范实施例，UV固化氧化硅层的处理温度在大约20℃至大约650℃之间。
根据另一个示范实施例，含氧环境包括臭氧和氧气的混合物。
根据替代示范实施例，臭氧的百分数为大约18％或更低。
根据示范实施例，UV固化氧化硅层的处理时间在大约1分钟至大约10分钟之间。
根据替代示范实施例，UV固化氧化硅层的UV波长在大约200纳米(nm)至大约450nm之间。
根据另一个示范实施例，用于形成半导体结构的方法包括在大约150℃或更低的处理温度下使含硅前体与至少一种自由基氮前体互相反应，以便在基板之上形成含硅氮层，该含硅前体包括两个硅原子。在含氧环境内UV固化该含硅氮层，以便形成氧化硅层。
将在后续描述中部分地阐述本发明的其它实施例和特征，而对于本领域的技术人员，通过分析说明书，其余部分将是显而易见的，或者能够从本发明的实践中得到。依靠说明书中描述的手段、组合、及方法，可实现和获得本发明的特征和优点。
附图的简要描述
参考本说明书的其余部分和附图，可能获得对某些示范实施例的本质的进一步理解，在几个附图中使用相似参考数字表示相似成分。在某些示例中，与参考数字联合并跟随连字号的下标表示多个相似成分中的一个。当参考没有指明存在下标的参考数字时，意图是指所有这种多个相似成分。
图1是示出用于在基板之上形成氧化硅层的示范方法的流程图。
图2A-2D是示出用于形成浅槽隔离(STI)结构的示范方法的示意横截面图。
图3是示出用于在基板之上形成氧化硅薄膜的示范方法的简化流程图。
图4是示出将硅前体中的Si-Si键转换成Si-N(H)-Si键，然后扩展到转换成Si-O-Si键的构型。
发明的详细描述
下面描述用于在含氧环境内UV固化之后形成具有预期薄膜密度、碳浓度和/或湿法蚀刻速度比(WERR)的氧化硅层的示范方法。UV固化可如愿地提高氧化硅层的密度和/或降低氧化硅层的湿法蚀刻速度比。
某些示范方法包括在大约150℃或更低的处理温度下使硅前体与原子氧前体互相反应，以便在基板之上形成氧化硅层。在含氧环境内UV固化该氧化硅层。其它示范方法包括在大约150℃或更低的处理温度下使含硅前体与至少一种自由基氮前体互相反应，以便在基板之上形成含硅氮层，该含硅前体包括两个硅原子。在含氧环境内UV固化该含硅氮层，以便形成氧化硅层。
图1是示出用于在基板之上形成氧化硅层的示范方法的流程图。例如，在图1中，用于在基板之上形成氧化硅层的方法100可能包括工艺102-112。
工艺102将诸如基板200(图2A所示)的基板装入沉积室中。例如，基板200可能是硅基板、III-V族化合物基板、硅/锗(SiGe)基板、外延型基板、绝缘体上外延硅(SOI)基板、诸如液晶显示(LCD)、等离子体显示、电致发光(EL)灯显示的显示基板、或发光二极管(LED)基板。在某些实施例中，基板200可能至少包括一种结构，诸如沟槽结构、阱、结、二极管、晶体管、金属氧化物半导体场效应晶体管(MOSFET)、中间层电介质(ILD)结构、金属层间电介质(IMD)结构、电路、其它半导体结构或它们的多种组合。基板200可能是半导体晶片(例如，200mm、300mm、400mm等的硅晶片)。在某些实施例中，基板200可能至少具有一个沟槽，诸如如图2A所示的在该基板中形成的沟槽210。
在某些实施例中，工艺104可在沉积室外部产生原子氧前体。例如，可通过含氧前体的分解产生原子氧前体，该含氧前体例如分子氧(O2)、臭氧(O3)、氮-氧化合物(例如NO、NO2、N2O等)、氢-氧化合物(例如H2O、H2O2等)、碳-氧化合物(例如CO、CO2等)、以及其它含氧前体和前体组合。
在某些实施例中，可通过热分解、紫外光分解、和/或等离子体分解等方法进行用于产生原子氧前体的含氧前体分解。等离子体分解可包括在远程等离子体产生室中从氦气、氩气等引燃等离子体，并将氧前体引入到该等离子体中，以便产生原子氧前体。
再次参考图1，工艺106可能将原子氧等离子体引入沉积室中，在沉积室中该原子氧等离子体可首次与硅前体混合，该硅前体由工艺108引入沉积室中。在工艺110，高反应性的原子氧前体可在中等温度(例如大约150℃或更低的处理温度)下与硅前体(和/或沉积室中可能存在的其它沉积前体)反应，以便形成如图2B所示的氧化硅层220。在某些实施例中，用于形成氧化硅层220的处理温度可能在大约-10℃至大约150℃之间。氧化硅层220的形成可使沟槽210的尺寸减小到沟槽210a的尺寸。在某些实施例中，工艺110可能具有在大约0.5Torr和大约6Torr总室压之间的压力。
硅前体可包括有机硅烷化合物和/或基本不含碳的硅化合物。不含碳的硅前体可包括硅烷(SiH4)等。有机硅烷化合物可包括具有直接Si-C键的化合物和/或具有Si-O-C键的化合物。有机硅烷前体的示例可能包括二甲基硅烷、三甲基硅烷、四甲基硅烷、二乙基硅烷、四氧基原硅酸酯(TMOS)、四乙基原硅酸酯(TEOS)、八甲基三硅氧烷(OMTS)、八甲基环四硅氧烷(OMCTS)、四甲基环四硅氧烷(TOMCATS)、DMDMOS、DEMS、甲基三乙氧基硅烷(MTES)、苯基二甲基硅烷、及苯基硅烷等。
在某些实施例中，在被引入到沉积室之前或期间，硅前体可与载气混合。载气可能是基本不干扰在基板上形成氧化物薄膜的不活泼气体。载气的示例包括氦气、氖气、氩气、及氢气(H2)等气体。在共同受让的Nitin K.Ingle等人的名为“CHEMICAL VAPOR DEPOSITION OF HIGH QUALITYFLOW-LIKE SILICON DIOXIDE USING A SILICON CONTAININGPRECURSOR AND ATOMIC OXYGEN”的代理人卷号为A010498/T69600的美国专利申请中可能描述了关于形成氧化硅层220的细节，为了所有目的，将其全部内容通过引用引入本文。
在某些实施例中，原子氧前体和硅前体在被引入到沉积室之前不混合。前体可通过分布在沉积室周围的空间分隔的前体入口进入该室。例如，原子氧前体可能从沉积室顶部的直接设置在基板上方的入口(或多个入口)进入。该入口将原子氧前体流指引到基本与基板沉积表面垂直的方向上。在其它实施例中，硅前体可从沉积室侧壁周围的一个或多个入口进入。该入口可将硅前体流指引到近似平行沉积表面的方向上。
其它实施例包括通过多舱口喷头的分离舱口传送原子氧前体和硅前体。例如，放置在基板之上的喷头可包括用于前体进入沉积室的开口图案。可为开口的一个子集供应原子氧前体，而为开口的第二子集供应硅前体。穿过开口的不同子集的前体可彼此流动隔离，直到脱离到沉积室中。共同受让的2007年5月29日提交的Lubomirsky等人的名为“PROCESS CHAMBER FORDIELECTRIC GAPFILL”的美国专利申请No.11/754,924中描述了关于前体操作设备的类型和设计的其它细节，为了所有目的，将相关申请的全部内容通过引用引入本文。
当原子氧前体和硅前体在沉积室中反应时，它们在基板之上形成氧化硅层。初始氧化物层具有如愿的流动性，并且可快速地移动到沉积表面存在的结构中的间隙、开口、沟槽、空隙、线缝等中。这允许方法100提供在间隙、沟槽、及其它表面结构中基本没有空隙和线缝的氧化物填充。在某些实施例中，如图2A所示，在基板200中形成的沟槽210可具有高的高度与宽度的高宽比“H/W”，例如大约5:1、6:1、6:1、8:1、9:1、10:1、11:1及12:1或更高的高宽比。
虽然不想束缚于特定理论，硅前体和原子氧前体可反应以形成具有高浓度的硅-羟基(Si-OH)键的氧化硅。这些键可为氧化硅层带来提高的流动性。初始氧化硅层可在其中包含一定水平的碳。Si-OH键和/或碳可提高沉积层的湿法蚀刻速度比(WERR)和介电常数，而这可以降低沉积氧化物的质量，及其作为电绝缘体的效力。
再次参考图1，工艺112可能在含氧环境内UV固化由工艺110所形成的氧化硅层。含氧环境可包括氧气(O2)和臭氧(O3)的混合物。在某些实施例中，混合物中的臭氧的百分数可能是大约18％或更少。在其它实施例中，混合物中的臭氧可能是大约12％。工艺112可具有在大约20℃至大约650℃之间的处理温度。在某些实施例中，工艺112可具有在大约1分钟至大约10分钟之间的处理时间。在一个实施例中，处理时间是大约10分钟。UV固化可使用在大约200纳米(nm)至大约450纳米之间的UV波长。在某些实施例中，可在由加利福尼亚Santa Clara的Applied Materials公司获得的Producer SETM主机的NanoCureTMUV双室中执行UV固化。
如图2C所示，工艺112可使氧化硅层220致密化成氧化硅层220a。工艺112可减小氧化硅层220内的Si-OH键浓度和/或碳浓度。进行某些实验并在表1和2中示出它们的结果。
Figure G2008101711541D00071
在表1中，前体A和B是通过例如结合图1描述的工艺100-110所形成的具有不同碳浓度的氧化硅层。前体B具有比前体A高的碳水平。由“前体A”表示的氧化硅层在大约390℃的处理温度下经历诸如氮气(N2)固化、UV-Ar固化和UV-O3固化的不同固化。发现碳浓度从大约1.4(沉积态)降低到基本接近0(UV-O3)。氧化物层的湿法蚀刻速度比(WERR)从大约35(沉积态)降低到大约5.8。沉积态氧化硅层的密度(1.7939)增加到大约1.9600(UV-O3固化)。
对于具有比前体A的碳水平更高的前体B，发现氧化物层的碳浓度从6.6(沉积态)降低到基本接近0(UV-O3)。湿法蚀刻速度比(WERR)从超过30(沉积态)降低到大约5.0。沉积态氧化硅层的密度(1.4912)增加到大约2.0022(UV-O3固化)。因此，UV-O3固化可使沉积态氧化硅层致密化并如愿地降低氧化硅层的WERR。
根据表1，还发现UV-O3固化的氧化硅层具有比UV-Ar固化的氧化硅层或N2固化氧化硅层更高的密度。UV-O3固化的氧化硅层具有比UV-Ar固化的氧化硅层或N2固化的氧化硅层更低的WERR。
表2
Figure G2008101711541D00081
在表2中，由“前体A”表示的氧化硅层在不同处理温度下，例如100℃、300℃、390℃和500℃，经历UV-O3固化；而由“前体B”表示的氧化硅层在不同处理温度下，例如100℃、200℃、300℃、400℃和500℃，经历UV-O3固化。发现在大约100℃的处理温度下UV-O3固化可获得氧化硅层的期望的密度和WERR。
图2D是示出示范STI结构的横截面视图。在图2D中，在固化氧化硅层220a之上形成诸如高密度等离子体化学气相沉积(HDP CVD)层的电介质层230。由于固化氧化硅层220a在沟槽210的底部区域处具有比在沟槽210的侧壁上大的厚度，可如愿地减小沟槽210a的高宽比。因此，可在电介质层230内基本不形成线缝、间隙或空隙的情况下，形成电介质层230并且该电介质层在沟槽210a内填充。
在某些实施例中，可对电介质层230进行诸如退火处理(未示出)的热处理。热处理可能如愿地使电介质层230致密化。在其它实施例中，用于形成电介质层230的工艺和热处理可能是可选的。可形成氧化硅层220(图2B所示)并基本填满沟槽210。
图3是示出用于在基板之上形成氧化硅薄膜的另一个示范方法的简化流程图。在图3中，方法300可利用后面结合图4描述的化学反应工艺形成氧化硅薄膜。示范方法300可包括不穷举的一系列步骤，也可向其中添加其它步骤(未示出)。本领域技术人员将认识到多种改变、修改、及替代。在某些实施例中，方法300可包括将基板装入沉积室302；以及将在其分子结构中至少具有Si-Si键的一种或多种含硅前体引入到该沉积室中304。方法300可包括产生一种或多种自由基氮前体306。例如，可在耦合到该沉积室的远程氨气等离子体系统中产生该一种或多种自由基氮前体。
方法300可包括将一种或多种自由基氮前体引入到该沉积室中308。方法300可使一种或多种自由基氮前体和一种或多种含硅前体反应310，以便在基板上形成流动的具有Si-N(H)-Si键的电介质薄膜。在某些实施例中，工艺310可具有大约150℃或更低的处理温度。
在某些实施例中，在CVD处理中使用的一种或多种含硅前体在其分子结构中包括多个羟基。在CVD沉积薄膜中保留该羟基，为该薄膜提供与常规SOG(旋布玻璃，Spin-on-Glass)薄膜相似的流动样特征。由于该流动样特征，在沉积期间，基于方法300的CVD沉积薄膜趋于聚集在基板间隙或沟槽的底部部分中，减少在间隙填充或STI沟槽的中心周围空隙的出现。在另一个实施例中，在其分子结构中至少具有Si-Si键的一种或多种含硅前体包括乙硅烷和/或聚硅烷前体。在其分子结构中乙硅烷具有单Si-Si单元，而聚硅烷可具有多个Si-Si键。例如，可以使用具有不同取代基的乙硅烷，包括烷氧基乙硅烷、烷氧基-烷基乙硅烷、及烷氧基-乙酰氧基乙硅烷。在其它示例中，也可使用具有高级同系物的乙硅烷。当然，本领域技术人员将认识到在乙和聚硅烷前体的选择中的多种替代、改变、和修改。
在某些实施例中，可通过将氨气(NH3)引入到远程等离子体系统中产生在方法300中使用的活性氮种类(诸如-N、-NH、及-NH2)。远程等离子体系统可包括耦合到沉积室的分离室。在该远程等离子体系统中氨气的分解产生自由基氮前体，例如像NH或NH2的氢氮烯(hydronitrene)。还可产生原子氢基。例如，在方法300的工艺306中，产生氢氮烯和氢基。可随后将自由基氮前体传送到沉积室中，在该沉积室中已经独立地引入一种或多种含硅前体。例如，可通过喷头传送反应性氮前体，而通过多个凹槽喷嘴引入硅前体。可在共同受让的Abjijit Basu Mallick等人的名为“HIGH QUALITY SILICON OXIDEFILMS BY REMOTE PLASMA CVD FROM DISILANE PRECURSORS”的代理人卷号为016301/078800US的美国专利申请中描述关于形成含硅氧层的细节，为了所有目的，将其全部内容通过引用引入本文。
在形成含硅氧层之后，方法300可包括在含氧环境内将CVD沉积的易流动电介质薄膜UV固化312成氧化硅薄膜。UV固化312可包括薄膜膨胀，这是由于Si-N(H)-Si键向Si-O-Si键的转换抵消了因从CVD沉积薄膜中去除某些羟基而引起的薄膜收缩。作为结果，薄膜膨胀和收缩的平衡导致致密的、无空隙的氧化硅薄膜，该薄膜由于在沉积和退火期间引入的应力还具有降低的破裂可能性。
在某些实施例中，UV固化312可与结合图1描述的UV固化112相似。结合图2D描述的处理可能与图3所示的方法300配合。为了实现期望的半导体结构，本领域技术人员可修改该工艺流程。
图4是示意地示出将硅前体中的Si-Si键转换为Si-N(H)-Si键并随后扩展为Si-O-Si的示范化学反应工艺。该图仅是示例，其在这里不会不适当地限制权利要求的范围。本领域技术人员将认识到其它改变、修改、和替代。如图所示，该化学反应是CVD(化学气相沉积)处理，在此期间将具有至少一个Si-Si键的含硅前体与由在远程等离子体(即与流动的Si-N(H)-Si薄膜的沉积分离地形成的等离子体)中的氨气分解产生的自由基氮种类混合。CVD处理导致硅前体(或多种前体)中的Si-Si键转换为Si-N(H)-Si键。随后，在后续UV-O3固化期间，将Si-N(H)-Si键转换为Si-O-Si键，其中可在诸如含氧(例如，氧气和臭氧的混合物)环境中进行退火。
在某些实施例中，CVD处理包括将至少两种反应物独立地引入到沉积室中并在预定条件下让它们反应。在一个实施例中，第一反应物可以选自由烷氧基乙硅烷、烷氧基-烷基乙硅烷、烷氧基-乙酰氧基乙硅烷、及聚硅烷组成的组中的一种类型的前体。例如，烷氧基乙硅烷包括Si2(EtO)6乙氧基乙硅烷、Si2(MeO)6甲氧基乙硅烷、及Si6(MeO)12甲氧基环己基硅烷，其中Et表示乙基(C2H6)而Me表示甲基(CH3)。在另一个示例中，烷氧基-烷基乙硅烷可包括Si2(EtO)4(Me)2四乙氧基-二甲基乙硅烷、Si2(EtO)4(Et)2四乙氧基-二乙基乙硅烷、Si2(EtO)2(Me)4二乙氧基-四甲基乙硅烷、Si2(MeO)4(Me)2四甲氧基-二甲基乙硅烷、以及Si4O2(Me)8甲基环己基硅氧烷、Si6(MeO)6(Me)6甲氧基-甲基环己基硅烷、Si4O2(H2)4氢代环己基硅氧烷。在另一个示例中，烷氧基-乙酰氧基乙硅烷可包括Si2(AcO)6乙酰氧基乙硅烷、Si2(Me)4(AcO)2四甲基-二乙酰氧基乙硅烷、及Si2(Me)2(AcO)4二甲基-四乙酰氧基乙硅烷，其中Ac表示乙酰基。而在另一个示例中，聚硅烷包括环戊基硅烷或其它取代物。可将上述这些前体中的任一种引入到沉积室中，而完全不与用于CVD处理的另一种反应物接触。
在其它实施例中，用于CVD处理的另一种反应物可能是包括从远程氨气等离子体产生的自由基氮种类的第二反应物。例如，自由基氮种类可包括氮离子、氢氮烯NHx，其中x＝1或2。由于在这些乙硅烷或聚硅烷类前体的分子结构中至少存在高反应性的Si-Si键，CVD处理可导致除羟基和碳类种类之外还包含多个Si-N(H)-Si键的产品。例如，该产品是沉积在基板上的碳氮化硅薄膜。由于这些羟基和碳类种类的存在，CVD沉积碳氮化硅薄膜是非晶态的和易流动的。
在某些实施例中，在含氧环境内的后续UV-O3固化在碳氮化硅薄膜与氧(O)之间引起另一化学反应。该反应是氧化过程，在其中碳氮化硅薄膜中的Si-N(H)-Si键被转换为Si-O-Si键，导致氧化硅薄膜的形成。一种副产品可包括NH3氨气，通过为该室构建的排气系统可以立即将NH3泵出。
在提供数值范围的情况中，应该理解为同样明确公开了在该范围的上限和下限之间的每个中间值，到下限的个位的十分之一，除非文中另外明确指出。在本发明中包括任何声明值之间的每个较小范围或在声明范围中的中间值和在该声明范围中的任何其它声明或中间值。在该范围内可能独立地包括或排除这些较小范围的上限和下限，在本发明中同样包括其界限中的任一个、两个都不或两个都包括在该较小范围中的每个范围，服从在声明范围中的任何明确排除界限。在声明范围包括界限的一个或两个的情况中，本发明中同样包括排除这些包括的界限的任一个或两个的范围。
如这里和权利要求中所使用，单数形式“一个”“和”及“该”包括复数对象，除非文中另外明确指出。因此，例如，提及“一种工艺”可能包括多个这种工艺，而提及“该喷嘴”可能包括提及一个或多个喷嘴和本领域技术人员已知的其等效物，等等。
同样，当在说明书和权利要求中使用时，词语“包括”“包含”、意图确定声明的特征、整体、成分、或步骤的存在，但是它们不排除一种或多种其它特征、整体、成分、步骤、或组的存在或添加。

Claims (18)

1.一种用于形成半导体结构的方法，该方法包括：
在150℃或更低的处理温度下使硅前体和原子氧前体反应，以在基板之上形成氧化硅层；以及
在含臭氧环境内UV-O3固化所述氧化硅层，其中所述UV-O3固化所述氧化硅层的处理温度在20℃至650℃之间，所述UV-O3固化所述氧化硅层的处理时间在1分钟至10分钟之间，并且所述UV-O3固化所述氧化硅层的UV波长在200nm至450nm之间。
2.如权利要求1所述的方法，还包括在所述基板内形成至少一个沟槽结构，其中所述至少一个沟槽结构具有5∶1或更高的高度与宽度的高宽比。
3.如权利要求1所述的方法，还包括：
将所述基板装入沉积室；
在所述沉积室外部产生所述原子氧前体；
将所述原子氧前体引入到所述沉积室中；以及
将所述硅前体引入到所述沉积室中，其中将所述硅前体和所述原子氧前体在所述沉积室中混合。
4.如权利要求3所述的方法，其中产生所述原子氧前体包括：
由包括氩气的气体混合物形成等离子体；以及
将氧前体引入所述等离子体中，其中所述氧前体分解，以形成原子氧。
5.如权利要求4所述的方法，其中所述氧前体选自分子氧、臭氧、及二氧化氮。
6.如权利要求1所述的方法，其中所述硅前体选自硅烷、二甲基硅烷、三甲基硅烷、四甲基硅烷、二乙基硅烷、四甲基原硅酸酯、四乙基原硅酸酯、八甲基三硅氧烷、八甲基环四硅氧烷、四甲基环四硅氧烷、DMDMOS、DEMS、甲基三乙氧基硅烷、苯基二甲基硅烷、及苯基硅烷。
7.如权利要求1所述的方法，其中所述含臭氧环境包括臭氧和氧气的混合物。
8.如权利要求7所述的方法，其中所述臭氧的百分数为18％或更低。
9.一种用于形成半导体结构的方法，该方法包括：
在150℃或更低的处理温度下使含硅前体与至少一种自由基氮前体互相反应，以在基板之上形成含硅氮层，所述含硅前体包括两个硅原子；以及
在含臭氧环境内UV-O3固化所述含硅氮层，以形成氧化硅层，其中所述UV-O3固化所述含硅氮层的处理温度在20℃至650℃之间，所述UV-O3固化所述含硅氮层的处理时间在1分钟至10分钟之间，并且所述UV-O3固化所述含硅氮层的UV波长在200nm至450nm之间。
10.如权利要求9所述的方法，还包括通过将氨气暴露于远程等离子体系统中的等离子体产生所述至少一种自由基氮前体，其中所述氨气的至少一部分分解为所述自由基氮前体。
11.如权利要求9所述的方法，其中所述自由基氮前体具有化学式NHX，其中x是0、1或2。
12.如权利要求9所述的方法，其中所述含硅前体包括乙硅烷前体或聚硅烷前体。
13.如权利要求9所述的方法，其中所述含硅前体选自烷氧基乙硅烷、烷氧基-烷基乙硅烷和聚硅烷。
14.如权利要求9所述的方法，其中所述含硅氮层包括碳氮化硅薄膜。
15.如权利要求9所述的方法，其中所述含硅氮层包括含Si-N(H)-Si键薄膜。
16.如权利要求9所述的方法，其中所述含臭氧环境包括臭氧和氧气的混合物。
17.如权利要求16所述的方法，其中所述臭氧的百分数为18％或更低。
18.如权利要求9所述的方法，还包括在所述基板内形成至少一个沟槽结构，其中所述至少一个沟槽结构具有5∶1或更高的高度与宽度的高宽比。
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