CN103238206A - 原位低介电常数加盖以改良整合损坏抗性 - Google Patents
原位低介电常数加盖以改良整合损坏抗性 Download PDFInfo
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- CN103238206A CN103238206A CN2011800576434A CN201180057643A CN103238206A CN 103238206 A CN103238206 A CN 103238206A CN 2011800576434 A CN2011800576434 A CN 2011800576434A CN 201180057643 A CN201180057643 A CN 201180057643A CN 103238206 A CN103238206 A CN 103238206A
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
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- H01L21/02214—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound comprising silicon and oxygen
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- H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
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- Condensed Matter Physics & Semiconductors (AREA)
- Power Engineering (AREA)
- Plasma & Fusion (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Spectroscopy & Molecular Physics (AREA)
- Formation Of Insulating Films (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Chemical Vapour Deposition (AREA)
Abstract
本发明提供一种用于形成包括气隙的低k介电层的方法及装置。在一个实施例中,提供一种处理基板的方法。该方法包含:将基板安置在处理区域内;在存在等离子体的情况下,将有机硅化合物与氧化气体以及提供致孔剂的前驱物反应,以将包含硅、氧及碳的含致孔剂的低k介电层沉积在基板上;将包含硅、氧及碳的多孔介电加盖层沉积在含致孔剂的低k介电层上;以及紫外线(UV)固化含致孔剂的低k介电层及多孔介电加盖层,以经由多孔介电加盖层从含致孔剂的低k介电层中移除致孔剂的至少一部分,以将含致孔剂的低k介电层转化为具有气隙的多孔低k介电层。
Description
发明背景
技术领域
本发明的实施例大体而言涉及集成电路的制造。更具体地,本发明的实施例涉及用于形成包括气隙的低k介电层的方法。
现有技术
自从数十年前第一次引入这些器件以来,集成电路几何形状的大小急剧减小。自此,集成电路大体遵循两年/一半大小规则(常称为莫耳定律),此意谓芯片上的器件的数量每两年增加一倍。现今的制造设施通常生产具有0.1微米特征大小的器件,而未来的设施很快将生产具有甚至更小特征大小的器件。
因为必须减少相邻金属线之间的电容性耦合来进一步减小集成电路上的器件的大小,所以器件几何形状的持续减小产生了对具有较低介电常数(k)值的层的需求。具体而言,期望具有小于约4.0的低介电常数的绝缘体。具有低介电常数的绝缘体的实例包括旋涂式玻璃、掺氟硅玻璃(FSG)、掺碳氧化物、以及聚四氟乙烯(PTFE),此全部为市售的。
最近,开发出具有小于约3.5的k值的低介电常数有机硅层。一种已用以开发低介电常数有机硅层的方法为:由包含有机硅化合物以及包含热不稳定物质或挥发性基团的化合物的气体混合物沉积层;并且然后后处理所沉积的层以从所沉积的层中移除诸如有机基团之类的热不稳定物质或挥发性基团。从所沉积的层中移除热不稳定物质或挥发性基团在层中产生纳米大小的空隙或“气隙”,由于空气具有约1的介电常数,因此此举降低层的介电常数,例如,至约2.5。然而,在进一步整合步骤(例如,蚀刻或化学机械研磨(CMP))之后,这些介电膜的多孔特征导致不希望的损坏。
鉴于集成电路特征大小的持续减小以及电路密度的增加,仍然需要一种形成具有有甚至更低介电常数的介电层的器件以及膜的方法。
发明内容
本发明的实施例大体而言涉及集成电路的制造。更具体地,本发明的实施例涉及用于形成包括气隙的低k介电层的方法。在一个实施例中,提供一种处理基板的方法。该方法包含:将基板安置在处理区域内;在存在等离子体的情况下,将有机硅化合物与氧化气体以及提供致孔剂的前驱物反应,以将包含硅、氧及碳的含致孔剂的低k介电层沉积在基板上;将包含硅、氧及碳的多孔介电加盖层沉积在含致孔剂的低k介电层上;以及紫外线(UV)固化含致孔剂的低k介电层以及多孔介电加盖层,以经由多孔介电加盖层从含致孔剂的低k介电层中移除致孔剂的至少一部分,以将含致孔剂的低k介电层转化为具有气隙的多孔低k介电层。
在另一实施例中,提供一种处理基板的方法。该方法包含:藉由一种方法将包含硅、氧及碳的含致孔剂的低k介电层沉积在设置于处理腔室的处理区域中的基板上,该方法包含:以介于500与1500mgm之间的流速将有机硅化合物流入处理区域中;以介于1000与2000mgm之间的流速将提供致孔剂的前驱物流入处理区域中;以介于100与500sccm之间的流速将氧化气体流入处理区域中;以及以介于1500与2200sccm之间的流速将稀释剂流入处理区域中,其中有机硅化合物、提供致孔剂的前驱物、氧化气体、以及稀释剂在存在等离子体的情况下反应;藉由一种无致孔剂的方法将包含硅、氧及碳的多孔介电加盖层沉积在含致孔剂的低k介电层上,该方法包含:以介于500与1500mgm之间的流速流动有机硅化合物,以介于100与500sccm之间的流速流动氧化气体,以及以介于2400与3400sccm之间的流速流动稀释剂,其中有机硅化合物、氧化气体以及稀释剂在存在等离子体的情况下反应;以及紫外线(UV)固化含致孔剂的低k介电层以及及多孔介电加盖层,以经由多孔介电加盖层从含致孔剂的低k介电层中移除致孔剂的至少一部分,以将含致孔剂的低k介电层转化为具有气隙的多孔低k介电层。
附图说明
因此,可详细理解本发明的上述特征的方式,上文简要概述的本发明的更特定描述可参照实施例进行,某些实施例在附图中示出。然而,应注意,附图仅图示本发明的典型实施例,并且因此不被视为本发明范围的限制,因为本发明可允许其它同等有效的实施例。
图1为根据本文所描述的实施例,用于沉积膜的装置的横截面示意图;
图2为根据本文所描述的实施例,图示用于形成具多孔介电加盖层之具有气隙的多孔低k介电层的工艺的流程图;
图3A-3E为藉由图2的工艺沉积在基板上的层的示意图;
以及
图4为图示沉积有以及未沉积有多孔介电加盖层的多种低k介电膜中存在的碳的百分比的作图。
为促进理解,在任何可能的情况下,使用相同附图标记来代表附图中共用的相同元件。预期,一个实施例的元件和/或工艺步骤可有利地并入其它实施例而无需额外叙述。
具体实施方式
参照一种用于将多孔介电加盖层沉积在含致孔剂的低k介电层上的方法及装置来描述本发明的实施例。然后可将介电加盖层以及含致孔剂的低k介电层暴露于UV处理工艺,以经由多孔介电加盖层从含致孔剂的低k介电层中释放且释气(outgas)致孔剂,从而将含致孔剂的低k介电层转化为具有气隙的低k介电层。
已开发基于SiCOH材料、藉由等离子体增强化学气相沉积(PECVD)的方法形成的低k介电材料。然而,如先前所论述的,由于电子器件的大小减小,因此需要用于微型器件的具有小于2.5的低介电常数(低k)的材料。一种用于超低k材料的方法为使用具有化学地附着于硅原子的有机官能基团的硅前驱物来制造混合有机-无机膜。此后,使膜退火,从而导致混合膜中弱有机分子的降解。然而,在进一步整合步骤之后,这些低k膜(k﹤2.2)的多孔特征诱发不希望的损坏。本文所描述的实施例使用对多孔低k膜加盖的新方案来降低这种不希望的损坏。在本文所描述的某些实施例中,在气隙形成之前,将多孔原位加盖层沉积在含致孔剂的低k介电层上。相对于下低k膜,该多孔介电加盖层可为具有更低孔隙率的更密集低k膜,从而在阻挡沉积及CMP工艺期间对诸如等离子体处理之类的整合损坏产生更好的抗性,同时为足够可渗透的以允许待释气的致孔剂来增加孔隙率且降低下介电膜的k值。
如本文所使用的术语“有机硅化合物”旨在代表含有有机基团中的碳原子的化合物,并且可为环状或线性的化合物。有机基团可包括烷基、烯基、环己烯基和芳基、以及这些基团的官能衍生物。较佳地,有机硅化合物包括附着于硅原子的一个或多个碳原子,藉此在适当的处理条件下,碳原子不易于通过氧化来移除。有机硅化合物还可较佳地包括一个或多个氧原子。在某些实施例中,较佳的有机硅化合物具有至少1:1、以及更佳至少2:1(诸如约4:1)的氧对硅的原子比。
适当的环状有机硅化合物包括具有三个或三个以上硅原子、以及选择性地一个或多个氧原子的环结构。市售的环状有机硅化合物包括具有交替的硅及氧原子的环,其中一个或两个烷基键合至硅原子。一些示例性环状有机硅化合物包括:1,3,5-三硅-2,4,6-环丙烷,即环状(SiH2CH2--)3;1,3,5,7-四甲基环四硅氧烷(TMCTS),即环状(SiHCH3--O--)4;八甲基环四硅氧烷(OMCTS),即环状(Si(CH3)2--O--)4;1,3,5,7,9-戊甲基环戊硅氧烷,即环状(SiHCH3--O--)5;1,3,5,7-四硅-2,6-二氧-4,8-二甲烷,即环状(SiH2--CH2--SiH2--O--)2;以及六甲基环三硅氧烷,即环状(Si(CH3)2--O--)3。
适当的线性有机硅化合物包括具有带有一个或多个硅原子以及一个或多个碳原子的线性、分支结构、或者环状侧基团的有机硅化合物。有机硅化合物可进一步包括一个或多个氧原子。一些示例性线性有机硅化合物包括:甲硅烷CH3--SiH3;二甲硅烷(CH3)2--SiH2;三甲硅烷(CH3)3--SiH;乙硅烷CH3--CH2--SiH3;二硅甲烷SiH3--CH2--SiH3;二(甲硅)甲烷CH3--SiH2--CH2--SiH2--CH3;1,2-二硅乙烷SiH3--CH2--CH2--SiH3;1,2-二(甲硅)乙烷CH3--SiH2--CH2--CH2--SiH2--CH3;2,2-二硅丙烷SiH3--C(CH3)2--SiH3;二乙氧基甲硅烷(DEMS)CH3--SiH--(O--CH2--CH3)2;1,3-二甲基二硅氧烷CH3--SiH2--O--SiH2--CH3;1,1,3,3-四甲基二硅氧烷(CH3)2--SiH--O--SiH--(CH3)2;六甲基二硅氧烷(HMDS)(CH3)3--Si--O--Si--(CH3)3;1,3-二(硅甲烷)二硅氧烷(SiH3--CH2--SiH2--)2--O;二(1-甲基二硅氧)甲烷(CH3--SiH2--O--SiH2--)2--CH2;2,2-二(1-甲基二硅氧)丙烷(CH3--SiH2--O--SiH2--)2--C(CH3)2;六甲氧基二硅氧烷(HMDOS)(CH3O)3--Si--O--Si--(OCH3)3;二甲基二甲氧基硅烷(DMDMOS)(CH3O)2--Si--(CH3)2;二甲氧基甲基乙烯基硅烷(DMMVS)(CH3O)2--Si--(CH3)--CH2--CH3。
包括具有至少一个环状基团的一种或多种有机化合物的提供致孔剂的前驱物称为致孔剂或致孔剂材料。如本文所使用的术语“环状基团”旨在代表环结构。环结构可含有少至三个原子。例如,这些原子可包括碳、硅、氮、氧、氟、以及以上原子的组合。环状基团可包括一个或多个单键、双键、三键、以及以上键的任何组合。举例而言,环状基团可包括一个或多个芳族基、芳基、苯基、环己烷、环己二烯、环庚二烯、以及以上基团的组合。环状基团还可为二环状或三环状。另外,环状基团较佳地键合至线性或分支官能基团。线性或分支官能基团较佳地含有烷基或乙烯基烷基,并且具有介于一个与二十个之间的碳原子。线性或分支官能基团还可包括氧原子,诸如酮、醚及酯。具有至少一个环状基团的一些示例性化合物包括α-萜品烯(ATP)、乙烯基环己烷(VCH)、以及苯乙酸酯,仅举数例。
适当的氧化气体包括氧气(O2)、臭氧(O3)、一氧化碳(CO)、二氧化碳(CO2)、水(H2O)、2,3-丁烷二酮、或者以上气体的组合。在进入沉积腔室之前,可在微波腔室中发生氧气或含氧化合物的离解(disassociation),以减少含硅化合物的过度离解。较佳地,向反应区域施加射频(RF)功率来增加离解。
适当的稀释剂包括不反应的气体和/或惰性气体,例如,氦气或氩气。
图1为根据本发明的实施例,用于沉积层的化学气相沉积(CVD)腔室100的横截面示意图。这种腔室的实例为购自加利福尼亚州圣克拉拉市的应用材料公司的PRODUCER系统上的双或成对腔室。成对腔室具有两个隔离的处理区域(用于处理两个基板,每个处理区域一个基板),以使得每个区域中所经历的流速约为进入整个腔室的流速的一半。下文以及说明书通篇的实例中所描述的流速为每300mm基板的流速。在美国专利号5,855,681中进一步描述了具有两个隔离的处理区域的腔室,该专利以引用的方式并入本文。可使用的腔室的另一实例为CENTURA系统上的DxZ腔室,以上两者均购自应用材料公司。
CVD腔室100具有腔室主体102,该腔室主体102界定分开的处理区域118、120。每个处理区域118、120具有基座128,基座128用于在CVD腔室100内支撑基板(未图示)。每个基座128通常包括加热元件(未图标)。较佳地,每个基座128藉由杆126可移动地安置在处理区域118、120中的一个处理区域中,该杆126延伸穿过腔室主体102的底部,该杆126在该底部连接至驱动系统103。
处理区域118、120中的每一个处理区域还较佳地包括气体分配组件108,该气体分配组件108经安置穿过腔室盖104以将气体输送至处理区域118、120中。每个处理区域的气体分配组件108通常包括气体入口通道140,该气体入口通道140将气体从气流控制器119输送至气体分配歧管142中,该气体分配组件108还称为喷淋头组件。气流控制器119通常用以控制和调节进入腔室的不同工艺气体的流速。如果使用液体前驱物,则其它流动控制部件可包括液流注射阀及液流控制器(未图示)。气体分配歧管142包含环形底板148、面板146、以及位于底板148与面板146之间的阻隔板144。气体分配歧管142包括多个喷嘴(未图示),在处理期间经由所述多个喷嘴注射气态混合物。RF(射频)电源125向气体分配歧管142提供偏压电位以促进在喷淋头组件与基座128之间产生等离子体。在等离子体增强化学气相沉积工艺期间,基座128可充当用于在腔室主体102内产生RF偏压的阴极。阴极电气耦接至电极电源以在CVD腔室100中产生电容性电场。通常向阴极施加RF电压,而腔室主体102电气接地。向基座128所施加的功率在基板的上表面上产生负电压形式的基板偏压。该负电压用以将离子从形成于CVD腔室100中的等离子体中吸引至基板的上表面。
在处理期间,工艺气体径向横跨基板表面而均匀分布。藉由从RF电源125向气体分配歧管142施加RF能量,由一个或多个工艺气体或者气体混合物形成等离子体,该等离子体充当被供电的电极。当基板暴露于等离子体与等离子体中所提供的反应气体时,发生膜沉积。腔室壁112通常接地。RF电源125可向气体分配歧管142供给单频率或混合频率的RF信号,以增强引入处理区域118、120中的任何气体的分解。
系统控制器134控制诸如RF电源125、驱动系统103、气流控制器119、以及其它相关腔室的多种部件的功能和/或处理功能。系统控制器134执行储存于存储器138中的系统控制软件,并且可包括模拟和数字输入/输出板、接口板,以及步进马达控制器板,在较佳实施例中,该存储器138为硬盘驱动。光学和/或磁性传感器通常用以移动和确定可移动的机械组件的位置。
以上CVD系统描述主要出于说明的目的,并且还可使用其它等离子体处理腔室来实践本发明的实施例。
如图1中所描绘的,在300mm基板上沉积期间,通常藉由使用RF电源125向喷淋头施加的RF能量,在邻近于基板的腔室中形成受控等离子体。替代地,可向基板支撑件提供RF功率。可使用高频RF(HFRF)功率以及低频RF(LFRF)功率(例如,双频RF)、恒定RF、脉冲RF、或者任何其它已知的或尚有待于发现的等离子体产生技术来产生等离子体。RF电源125可供给介于约5MHz与约300MHz之间的单频RF。另外,RF电源125还可供给介于约300Hz与约1000kHz之间的单频LFRF,来供给混合频率以增强引入处理腔室中的工艺气体的反应物质的分解。RF功率可为循环的或脉冲的,以减少对基板的加热且提升所沉积的膜中的更大孔隙率。适当的RF功率可为介于约10W与约5000W之间的范围中(较佳地介于约200W与约1000W之间的范围中)的功率。适当的LFRF功率可为介于约0W与约5000W之间的范围中(较佳地介于约0W与约200W之间的范围中)的功率。
在沉积期间,可将基板维持在介于约-20℃与约500℃之间(较佳地介于约100℃与约450℃之间)的温度下。基板与歧管之间的间隔可介于约200mil与约1200mil之间。沉积压力可介于约1托尔与约20托尔之间,较佳地介于约4托尔与约10托尔之间。沉积速率可介于约与约之间。
多孔介电加盖层的沉积
图2为根据本文所描述的实施例,图示用于形成具多孔介电加盖层之具有气隙的多孔低k介电层的工艺200的流程图。在方块202处,基板可设置于处理腔室的处理区域中。处理腔室可为PECVD腔室,诸如图1中所描绘的PECVD腔室。处理区域可为诸如图1中所描绘的处理区域118或120之类的处理区域。
在方块204处,可在基板上沉积衬层(lining layer)。衬层可为藉由PECVD工艺由包括反应含硅化合物的等离子体所沉积的阻挡层。根据本文所描述的实施例,阻挡层的沉积工艺可包括形成于处理区域中的电容性耦合等离子体、或者电容性耦合和感应耦合的等离子体。在等离子体形成期间,可使用诸如氦气或氩气之类的惰性气体。
在方块206处,将含致孔剂的低k介电层沉积在基板上。在存在衬层的实施例中,可将含致孔剂的低k介电层沉积在衬层上。可藉由沉积进一步含有热不稳定有机基团或致孔剂的含硅/氧材料,来沉积含致孔剂的低k介电层。
在方块208处,然后可将本发明的多孔介电加盖层沉积在含致孔剂的低k介电层上。可将多孔介电加盖层沉积在与含致孔剂的低k介电层相同的处理区域和/或处理腔室中。可使用背对背(back-to-back)的等离子体工艺来沉积多孔介电加盖层。除了多孔介电加盖层通常为无致孔剂的以外,可使用与在方块206中沉积的含致孔剂的低k介电层相同的前驱物来沉积多孔介电加盖层。还可使用与用于含致孔剂的低k介电层的处理条件类似的处理条件来沉积多孔介电加盖层。可将基板从处理腔室中移除且转移至UV处理腔室。多孔介电加盖层可为多孔介电低k加盖层。在某些实施例中,多孔介电加盖层为多孔氧化物介电加盖层。在US 2003/0224591中描述了一种示例性多孔氧化物介电加盖层。
在方块210处,将含致孔剂的低k介电层以及多孔介电加盖层暴露于UV处理或“固化”工艺。含致孔剂的低k介电层以及多孔介电加盖层暴露于UV固化工艺导致从含致孔剂的低k介电层中释放含致孔剂的化合物,从而导致在介电层内形成气穴(air pocket)或“气隙”。多孔介电加盖层通常比具有气隙的低k介电层具有较低的孔隙率。在UV固化工艺期间,气态含致孔剂的化合物经由多孔介电加盖层逸出。因此,多孔介电加盖层为足够可渗透的以允许气态含致孔剂的化合物逸出、同时维持足够的结构完整性以防止多孔低k介电层在后续整合步骤期间崩塌(collapse)是重要的。
参阅图3A-3E,可将衬层300沉积在基板304的下表面上。衬层300充当后续含致孔剂的低k介电层302与基板304的下表面以及形成于基板304的表面上的金属线306、308、310之间的隔离层。如本文所述,藉由多孔介电加盖层312对含致孔剂的低k介电层302加盖。
参阅图3A,可藉由引入反应含硅化合物以及氧化气体,将衬层300沉积在处理区域118、120中。工艺气体在等离子体增强环境中反应,以在基板304的表面以及金属线306、308、310上形成保形性氧化硅层。
参阅图3B,自由含硅前驱物(例如,含有机硅的前驱物)、提供致孔剂的前驱物、选择性氧化气体、以及稀释剂组成的处理气体来沉积含致孔剂的低k介电层302。含致孔剂的低k介电层302可为碳氧化硅(silicon oxycarbide)层。含硅前驱物气体可以从约100至约3000mgm的流速流动。提供致孔剂的前驱物气体可以从约100至约3000mgm的流速流动。选择性氧化气体可以从约0至约5000sccm的流速流动。稀释剂气体可以从约500至约5000sccm的流速流动。含硅前驱物的较佳气体流速介于约200至约1000mgm之间,提供致孔剂的前驱物的较佳气体流速介于约200至约1000mgm之间,氧化气体的较佳气体流速介于约100至约1000sccm之间,并且稀释剂的较佳气体流速介于约1500sccm至约2200sccm之间。较佳地,在含致孔剂的低k介电层302的沉积期间,将处理区域维持在从约2至约15托尔的压力下。更佳地,将处理区域维持在从约5至约10托尔的压力下。可将基板维持在从约0℃至约400℃的温度下。较佳地,将基板维持在从约200℃至约350℃的温度下。
参阅图3C,较佳地使用与用于沉积含致孔剂的低k介电层302类似的材料及方法,将多孔介电加盖层312沉积在含致孔剂的低k介电层302上。多孔介电加盖层312可为碳氧化硅层。可藉由改变前述工艺条件(包括含硅前驱物、氧化气体,和/或稀释剂气体的流速)中的任何条件,来控制多孔介电加盖层312的孔隙率。可使用表格I中所描述的工艺条件来沉积多孔介电加盖层312。
表格I:加盖层的工艺条件
如图3D及图3E所示,使用UV固化工艺固化含致孔剂的低k介电层302以及多孔介电加盖层312。UV固化工艺使含致孔剂的化合物挥发,这些含致孔剂的化合物经由多孔介电加盖层312的孔释气,以将含致孔剂的低k介电层302转化为具有气隙316的多孔低k介电层314。
紫外线固化工艺的实例包含:提供介于约2托尔与约12托尔之间的腔室压力,提供介于约50℃与约600℃之间的腔室温度、介于约200nm与约300nm之间的UV源波长、介于约100sccm与20000sccm之间的氦气流速、以及选择性地,可提供诸如氩气、氮气和氧气或者这些气体的任何组合的附加气体用于UV工艺。UV功率可介于约25%与约100%之间且处理时间周期可介于约0分钟与约200分钟之间。可使用加利福尼亚州圣克拉拉市的应用材料公司所制造的UV系统,例如,NanoCure系统来执行工艺。还可使用其它UV系统,诸如在2005年5月9日提交的、标题名称为“用于固化介电材料的串联UV腔室(TANDEM UV CHAMBER FOR CURING DIELECTRICMATERIALS)”、公开为U.S.2006/0251827的美国专利申请序列号11/124,908中所描述的系统,以不与本说明书相抵触的程度将该申请以引用的方式并入本文。可使用静压源或双扫频源来执行该工艺。
相对于由相同材料形成的固体膜,多孔介电加盖层可具有从约10%至约20%的孔隙率,并且相对于由相同材料形成的固体膜,具有气隙的多孔低k介电层可具有从约25%至约40%的孔隙率。
实例:
本文所描述的实施例的目标及优点由以下实例进一步说明。在这些实例中所叙述的特定材料和这些特定材料的量、以及其它条件和细节不应用以限制本文所描述的实施例。以下实例说明具有气隙的多孔低k介电层的沉积,其中多孔介电加盖层沉积在该多孔低k介电层上。使用购自加利福尼亚州圣克拉拉市的应用材料公司的PRODUCER系统来实施该实例。
在背对背工艺中,使用表格II中所描绘的工艺条件来沉积具有气隙的多孔低k介电层以及多孔介电加盖层。如表格II所示,使用无致孔剂沉积工艺来沉积多孔介电加盖层。
表格II实例1的工艺条件
图4为图示沉积有以及未沉积有多孔介电加盖层的多种低k介电膜中存在的碳的百分比的作图400。使用傅立叶变换红外(FT_IR)光谱技术获得图4中所描绘的数据。线402表示在不使用多孔介电加盖层的UV处理之前的控制。线404表示在不使用加盖层的UV处理之后的控制。线406表示具有约2%的孔隙率的多孔介电加盖层A。线408表示具有约7%的孔隙率的多孔介电加盖层B。线410表示具有约17%的孔隙率的多孔介电加盖层C。线412表示具有约21%的孔隙率的多孔介电加盖层D。如作图400中所说明,在固化之后,从具有盖C及盖D的含致孔剂的低k介电层中完全移除致孔剂,然而,盖A及盖B阻止致孔剂的移除,从而在2900cm-1附近导致高残余的C-H峰值。从作图400中所描绘的结果,相信对于释气致孔剂,具有约15%或大于15%的孔隙率的多孔介电加盖层为足够可渗透的。
本文所描述的某些实施例提供了一种用于多孔低k介电膜的原位加盖的新颖工艺。加盖层包含具有低孔隙率的更密集SiCOH材料,从而产生对后续整合步骤的改良的损坏抗性,同时该加盖层为足够可渗透的以允许释气致孔剂以制成下层低k膜。
虽然前文涉及本发明的实施例,但在不脱离本发明的基本范围的情况下,可设计本发明的其它及另外的实施例,并且本发明的范围由以下权利要求决定。
Claims (15)
1.一种处理基板的方法,所述方法包含以下步骤:
将基板安置在处理区域内;
在存在等离子体的情况下,将有机硅化合物与氧化气体以及提供致孔剂的前驱物反应,以将包含硅、氧及碳的含致孔剂的低k介电层沉积在所述基板上;
将包含硅、氧及碳的多孔介电加盖层沉积在所述含致孔剂的低k介电层上;以及
紫外线(UV)固化所述含致孔剂的低k介电层以及所述多孔介电加盖层,以经由所述多孔介电加盖层从所述含致孔剂的低k介电层中移除所述致孔剂的至少一部分,以将所述含致孔剂的低k介电层转化为具有气隙的多孔低k介电层。
2.如权利要求1所述的方法,其中相对于由相同材料形成的固体膜,所述多孔介电加盖层具有从约10%至约20%的孔隙率,并且相对于由相同材料形成的固体膜,具有气隙的所述多孔低k介电层具有从约25%至约40%的孔隙率。
3.如权利要求1所述的方法,其中所述使有机硅化合物起反应以及所述沉积多孔介电加盖层在相同处理腔室中背对背地执行。
4.如权利要求1所述的方法,其中所述多孔介电加盖层为无致孔剂的介电加盖层。
5.如权利要求1所述的方法,其中将有机硅化合物与氧化气体及致孔剂反应以沉积含致孔剂的低k介电层包含:
以介于500与1500mgm之间的流速将所述有机硅化合物流入所述处理区域中;
以介于1000与2000mgm之间的流速将所述提供致孔剂的前驱物流入所述处理区域中;
以介于100与500sccm之间的流速将氧化气体流入所述处理区域中;以及
以介于1500与2200sccm之间的流速将稀释剂流入所述处理区域中。
6.如权利要求5所述的方法,其中将包含硅、氧及碳的多孔介电加盖层沉积在所述含致孔剂的低k介电层上包含:
以介于500与1500mgm之间的流速将所述有机硅化合物流入所述处理区域中;
以介于100与500sccm之间的流速将所述氧化气体流入所述处理区域中;以及
以介于2400与3400sccm之间的流速将所述稀释剂流入所述处理区域中。
7.如权利要求6所述的方法,其中所述多孔介电加盖层为无致孔剂的。
8.如权利要求1所述的方法,其中在所述UV固化步骤之后,具有气隙的所述多孔低k介电层具有2.2或少于2.2的介电常数。
9.如权利要求1所述的方法,其中具有气隙的所述多孔低k介电层为碳氧化硅层。
10.如权利要求9所述的方法,其中所述多孔介电加盖层为碳氧化硅层。
12.如权利要求6所述的方法,其中所述提供致孔剂的前驱物为乙烯基环己烷,所述氧化剂为氧气,并且所述稀释剂为氦气。
13.如权利要求12所述的方法,其中所述有机硅化合物选自包含以下的基团:甲硅烷CH3--SiH3、二甲硅烷(CH3)2--SiH2、三甲硅烷(CH3)3--SiH、乙硅烷CH3--CH2--SiH3、二硅甲烷SiH3--CH2--SiH3、二(甲硅)甲烷CH3--SiH2--CH2--SiH2--CH3、1,2-二硅乙烷SiH3--CH2--CH2--SiH3、1,2-二(甲硅)乙烷CH3--SiH2--CH2--CH2--SiH2--CH3、2,2-二硅丙烷SiH3--C(CH3)2--SiH3、二乙氧基甲硅烷(DEMS)CH3--SiH--(O--CH2--CH3)2、1,3-二甲基二硅氧烷CH3--SiH2--O--SiH2--CH3、1,1,3,3-四甲基二硅氧烷(CH3)2--SiH--O--SiH--(CH3)2、六甲基二硅氧烷(HMDS)(CH3)3--Si--O--Si--(CH3)3、1,3-二(硅甲烷)二硅氧烷(SiH3--CH2--SiH2--)2--O、二(1-甲基二硅氧)甲烷(CH3--SiH2--O--SiH2--)2--CH2、2,2-二(1-甲基二硅氧)丙烷(CH3--SiH2--O--SiH2--)2--C(CH3)2、六甲氧基二硅氧烷(HMDOS)(CH3O)3--Si--O--Si--(OCH3)3、二甲基二甲氧基硅烷(DMDMOS)(CH3O)2--Si--(CH3)2、二甲氧基甲基乙烯基硅烷(DMMVS)(CH3O)2--Si--(CH3)--CH2--CH3。
14.如权利要求1所述的方法,其中所述紫外线(UV)固化包含:
提供介于约2托尔与约12托尔之间的腔室压力;
提供介于约50℃与约600℃之间的腔室温度;
提供介于约200nm与约300nm之间的UV源波长;以及
以介于约100sccm与约20000sccm之间的流速流动氦气。
15.一种处理基板的方法,所述方法包含:
藉由一种方法将包含硅、氧及碳的含致孔剂的低k介电层沉积在设置于处理腔室的处理区域中的基板上,所述方法包含:
以介于500与1500mgm之间的流速将有机硅化合物流入所述处理区域中;
以介于1000与2000mgm之间的流速将提供致孔剂的前驱物流入所述处理区域中;
以介于100与500sccm之间的流速将氧化气体流入所述处理区域中;以及
以介于1500与2200sccm之间的流速将稀释剂流入所述处理区域中,其中所述有机硅化合物、所述提供致孔剂的前驱物、所述氧化气体、以及所述稀释剂在存在等离子体的情况下反应;
藉由一种无致孔剂的方法将包含硅、氧及碳的多孔介电加盖层沉积在所述含致孔剂的低k介电层上,所述方法包含:
以介于500与1500mgm之间的流速流动所述有机硅化合物;
以介于100与500sccm之间的流速流动所述氧化气体;以及
以介于2400与3400sccm之间的流速流动所述稀释剂,其中所述有机硅化合物、所述氧化气体以及所述稀释剂在存在等离子体的情况下反应;以及
紫外线(UV)固化所述含致孔剂的低k介电层以及所述多孔介电加盖层,以经由所述多孔介电加盖层从所述含致孔剂的低k介电层中移除所述致孔剂的至少一部分,以将所述含致孔剂的低k介电层转化为具有气隙的多孔低k介电层。
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JP (1) | JP2014505356A (zh) |
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- 2011-11-28 KR KR1020137019161A patent/KR20140003495A/ko not_active Application Discontinuation
- 2011-11-28 WO PCT/US2011/062197 patent/WO2012087493A2/en active Application Filing
- 2011-11-28 JP JP2013544510A patent/JP2014505356A/ja active Pending
- 2011-11-28 US US13/305,559 patent/US20120156890A1/en not_active Abandoned
- 2011-11-28 CN CN2011800576434A patent/CN103238206A/zh active Pending
Cited By (7)
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CN104505344A (zh) * | 2014-08-20 | 2015-04-08 | 上海华力微电子有限公司 | 形成多孔超低介电材料的方法 |
CN104505344B (zh) * | 2014-08-20 | 2017-12-15 | 上海华力微电子有限公司 | 形成多孔超低介电材料的方法 |
CN107406983A (zh) * | 2014-12-22 | 2017-11-28 | 应用材料公司 | 通过沉积调整来解决fcvd的线条弯曲 |
CN105225930A (zh) * | 2015-09-27 | 2016-01-06 | 上海华力微电子有限公司 | 一种低介电常数薄膜之制备方法 |
TWI747023B (zh) * | 2018-08-10 | 2021-11-21 | 美商慧盛材料美國責任有限公司 | 矽化合物及使用其沉積膜的方法 |
CN114920556A (zh) * | 2022-06-09 | 2022-08-19 | 潮州三环(集团)股份有限公司 | 一种陶瓷浆料及其制备的多层陶瓷电容器 |
CN114920556B (zh) * | 2022-06-09 | 2022-11-29 | 潮州三环(集团)股份有限公司 | 一种陶瓷浆料及其制备的多层陶瓷电容器 |
Also Published As
Publication number | Publication date |
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JP2014505356A (ja) | 2014-02-27 |
WO2012087493A3 (en) | 2012-10-04 |
US20120156890A1 (en) | 2012-06-21 |
KR20140003495A (ko) | 2014-01-09 |
WO2012087493A2 (en) | 2012-06-28 |
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