CN101366112B - 用于半导体集成电路基板的隔离结构及其形成方法 - Google Patents

用于半导体集成电路基板的隔离结构及其形成方法 Download PDF

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Publication number
CN101366112B
CN101366112B CN2006800525978A CN200680052597A CN101366112B CN 101366112 B CN101366112 B CN 101366112B CN 2006800525978 A CN2006800525978 A CN 2006800525978A CN 200680052597 A CN200680052597 A CN 200680052597A CN 101366112 B CN101366112 B CN 101366112B
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China
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dielectric material
field oxide
oxide region
substrate
layer
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Expired - Fee Related
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CN2006800525978A
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Chinese (zh)
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CN101366112A (zh
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理查德·K·威廉斯
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Advanced Analogic Technologies Inc
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Advanced Analogic Technologies Inc
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
    • H01L21/76232—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials of trenches having a shape other than rectangular or V-shape, e.g. rounded corners, oblique or rounded trench walls
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Element Separation (AREA)
CN2006800525978A 2005-12-09 2006-12-07 用于半导体集成电路基板的隔离结构及其形成方法 Expired - Fee Related CN101366112B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US11/298,075 US20070132056A1 (en) 2005-12-09 2005-12-09 Isolation structures for semiconductor integrated circuit substrates and methods of forming the same
US11/298,075 2005-12-09
PCT/US2006/046579 WO2007070311A1 (en) 2005-12-09 2006-12-07 Isolation structures for semiconductor integrated circuit substrates and methods of forming the same

Publications (2)

Publication Number Publication Date
CN101366112A CN101366112A (zh) 2009-02-11
CN101366112B true CN101366112B (zh) 2011-05-04

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CN2006800525978A Expired - Fee Related CN101366112B (zh) 2005-12-09 2006-12-07 用于半导体集成电路基板的隔离结构及其形成方法

Country Status (7)

Country Link
US (5) US20070132056A1 (enExample)
EP (1) EP1958249A1 (enExample)
JP (4) JP5438973B2 (enExample)
KR (4) KR20110079861A (enExample)
CN (1) CN101366112B (enExample)
TW (2) TWI544573B (enExample)
WO (1) WO2007070311A1 (enExample)

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Also Published As

Publication number Publication date
TW200733297A (en) 2007-09-01
TWI460818B (zh) 2014-11-11
KR20110111549A (ko) 2011-10-11
KR20110081909A (ko) 2011-07-14
WO2007070311A1 (en) 2007-06-21
US7994605B2 (en) 2011-08-09
US7923821B2 (en) 2011-04-12
KR20080098481A (ko) 2008-11-10
CN101366112A (zh) 2009-02-11
JP2016164998A (ja) 2016-09-08
KR20110079861A (ko) 2011-07-08
JP6026486B2 (ja) 2016-11-16
US20070132056A1 (en) 2007-06-14
US20100055864A1 (en) 2010-03-04
JP6263569B2 (ja) 2018-01-17
TWI544573B (zh) 2016-08-01
US7955947B2 (en) 2011-06-07
JP5438973B2 (ja) 2014-03-12
US20080203543A1 (en) 2008-08-28
TW201419444A (zh) 2014-05-16
US20080254592A1 (en) 2008-10-16
EP1958249A1 (en) 2008-08-20
JP2013168662A (ja) 2013-08-29
JP2015062239A (ja) 2015-04-02
US7915137B2 (en) 2011-03-29
US20080203520A1 (en) 2008-08-28
JP2009518867A (ja) 2009-05-07
KR101323497B1 (ko) 2013-10-31

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