CN100440456C - 制造具有不同厚度氧化膜的半导体器件的方法 - Google Patents
制造具有不同厚度氧化膜的半导体器件的方法 Download PDFInfo
- Publication number
- CN100440456C CN100440456C CNB2004100431776A CN200410043177A CN100440456C CN 100440456 C CN100440456 C CN 100440456C CN B2004100431776 A CNB2004100431776 A CN B2004100431776A CN 200410043177 A CN200410043177 A CN 200410043177A CN 100440456 C CN100440456 C CN 100440456C
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- film
- oxide
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- semiconductor device
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/823462—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the gate insulating layers, e.g. different gate insulating layer thicknesses, particular gate insulator materials or particular gate insulator implants
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Semiconductor Memories (AREA)
Abstract
Description
Claims (7)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2003134265A JP4190940B2 (ja) | 2003-05-13 | 2003-05-13 | 半導体装置の製造方法 |
JP134265/2003 | 2003-05-13 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1622292A CN1622292A (zh) | 2005-06-01 |
CN100440456C true CN100440456C (zh) | 2008-12-03 |
Family
ID=33524873
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNB2004100431776A Expired - Fee Related CN100440456C (zh) | 2003-05-13 | 2004-05-13 | 制造具有不同厚度氧化膜的半导体器件的方法 |
Country Status (5)
Country | Link |
---|---|
US (2) | US7078354B2 (zh) |
JP (1) | JP4190940B2 (zh) |
CN (1) | CN100440456C (zh) |
DE (1) | DE102004024603B4 (zh) |
TW (1) | TWI309471B (zh) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102097387A (zh) * | 2009-12-15 | 2011-06-15 | 三星电子株式会社 | 制造非易失性存储器的方法 |
Families Citing this family (32)
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KR100552839B1 (ko) * | 2003-11-05 | 2006-02-22 | 동부아남반도체 주식회사 | 반도체 소자 및 이의 제조 방법 |
KR100529655B1 (ko) * | 2003-12-31 | 2005-11-17 | 동부아남반도체 주식회사 | 반도체 장치의 게이트 산화막 형성 방법 |
KR100653543B1 (ko) * | 2004-09-17 | 2006-12-04 | 동부일렉트로닉스 주식회사 | 반도체 소자의 제조 방법 |
JP4471815B2 (ja) * | 2004-11-05 | 2010-06-02 | 日本テキサス・インスツルメンツ株式会社 | 半導体装置およびその製造方法 |
KR100611784B1 (ko) * | 2004-12-29 | 2006-08-10 | 주식회사 하이닉스반도체 | 다중 게이트절연막을 갖는 반도체장치 및 그의 제조 방법 |
US20060148139A1 (en) * | 2005-01-06 | 2006-07-06 | Ng Hock K | Selective second gate oxide growth |
US7402472B2 (en) * | 2005-02-25 | 2008-07-22 | Freescale Semiconductor, Inc. | Method of making a nitrided gate dielectric |
US20070066021A1 (en) * | 2005-09-16 | 2007-03-22 | Texas Instruments Inc. | Formation of gate dielectrics with uniform nitrogen distribution |
KR20080035761A (ko) * | 2006-10-20 | 2008-04-24 | 동부일렉트로닉스 주식회사 | 모스 트랜지스터의 게이트 절연막 형성 방법 |
KR101283574B1 (ko) * | 2007-08-09 | 2013-07-08 | 삼성전자주식회사 | 질소를 함유하는 절연막 형성 방법 및 그것을 포함하는플래시 메모리 소자의 제조 방법 |
US20090189227A1 (en) * | 2008-01-25 | 2009-07-30 | Toshiba America Electronic Components, Inc. | Structures of sram bit cells |
US8071440B2 (en) * | 2008-12-01 | 2011-12-06 | United Microelectronics Corporation | Method of fabricating a dynamic random access memory |
DE102009046877B4 (de) * | 2009-06-30 | 2012-06-21 | Globalfoundries Dresden Module One Limited Liability Company & Co. Kg | Erhöhung der Selektivität während der Herstellung einer Kanalhalbleiterlegierung durch einen nassen Oxidationsprozess |
US8541832B2 (en) * | 2009-07-23 | 2013-09-24 | Samsung Electronics Co., Ltd. | Integrated circuit memory devices having vertical transistor arrays therein and methods of forming same |
KR101624975B1 (ko) * | 2009-11-17 | 2016-05-30 | 삼성전자주식회사 | 3차원 반도체 기억 소자 |
KR20120003351A (ko) | 2010-07-02 | 2012-01-10 | 삼성전자주식회사 | 3차원 비휘발성 메모리 장치 및 그 동작방법 |
KR101763420B1 (ko) | 2010-09-16 | 2017-08-01 | 삼성전자주식회사 | 3차원 반도체 기억 소자 및 그 제조 방법 |
KR101825539B1 (ko) | 2010-10-05 | 2018-03-22 | 삼성전자주식회사 | 3차원 반도체 장치 및 그 제조 방법 |
KR101743661B1 (ko) * | 2011-06-01 | 2017-06-07 | 삼성전자 주식회사 | 서로 다른 두께의 게이트 절연막을 갖는 모스펫 소자 형성 방법 |
US8394688B2 (en) | 2011-06-27 | 2013-03-12 | United Microelectronics Corp. | Process for forming repair layer and MOS transistor having repair layer |
US8642374B2 (en) | 2011-09-07 | 2014-02-04 | Omnivision Technologies, Inc. | Image sensor with reduced noise by blocking nitridation using photoresist |
US8741784B2 (en) | 2011-09-20 | 2014-06-03 | United Microelectronics Corp. | Process for fabricating semiconductor device and method of fabricating metal oxide semiconductor device |
JP6083930B2 (ja) | 2012-01-18 | 2017-02-22 | キヤノン株式会社 | 光電変換装置および撮像システム、光電変換装置の製造方法 |
US9634083B2 (en) | 2012-12-10 | 2017-04-25 | United Microelectronics Corp. | Semiconductor structure and process thereof |
CN103346077A (zh) * | 2013-07-09 | 2013-10-09 | 上海华力微电子有限公司 | 一种栅氧化层的制备方法 |
CN104576343B (zh) * | 2013-10-29 | 2018-03-06 | 中芯国际集成电路制造(上海)有限公司 | 栅极氧化层的制造方法 |
US9412596B1 (en) | 2015-01-30 | 2016-08-09 | International Business Machines Corporation | Nitridation on HDP oxide before high-k deposition to prevent oxygen ingress |
CN108109900B (zh) * | 2016-11-24 | 2021-04-09 | 中芯国际集成电路制造(上海)有限公司 | 半导体装置及其制造方法 |
CN108630605B (zh) * | 2017-03-22 | 2020-12-18 | 中芯国际集成电路制造(上海)有限公司 | 半导体装置及其制造方法 |
CN109585274B (zh) * | 2018-11-30 | 2020-09-15 | 上海华力微电子有限公司 | 半导体结构的制备方法 |
CN114520227A (zh) * | 2020-11-18 | 2022-05-20 | 联华电子股份有限公司 | 半导体元件及其制作方法 |
US11957252B2 (en) | 2021-09-28 | 2024-04-16 | Hung Ya Wang | Foam pad structure having protective film |
Citations (3)
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US6323143B1 (en) * | 2000-03-24 | 2001-11-27 | Taiwan Semiconductor Manufacturing Company | Method for making silicon nitride-oxide ultra-thin gate insulating layers for submicrometer field effect transistors |
US20010052618A1 (en) * | 2000-06-20 | 2001-12-20 | Nec Corporation | Semiconductor device having a plurality of gate insulating films of different thicknesses, and method of manufacturing such semiconductor device |
US6444592B1 (en) * | 2000-06-20 | 2002-09-03 | International Business Machines Corporation | Interfacial oxidation process for high-k gate dielectric process integration |
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US6469343B1 (en) * | 1998-04-02 | 2002-10-22 | Nippon Steel Corporation | Multi-level type nonvolatile semiconductor memory device |
US6087236A (en) * | 1998-11-24 | 2000-07-11 | Intel Corporation | Integrated circuit with multiple gate dielectric structures |
JP2000216257A (ja) | 1999-01-20 | 2000-08-04 | Matsushita Electronics Industry Corp | 半導体装置およびその製造方法 |
JP3472727B2 (ja) | 1999-08-13 | 2003-12-02 | Necエレクトロニクス株式会社 | 半導体装置及び半導体装置の製造方法 |
US6258673B1 (en) * | 1999-12-22 | 2001-07-10 | International Business Machines Corporation | Multiple thickness of gate oxide |
US6297103B1 (en) * | 2000-02-28 | 2001-10-02 | Micron Technology, Inc. | Structure and method for dual gate oxide thicknesses |
JP2002368122A (ja) | 2001-06-12 | 2002-12-20 | Nec Corp | 半導体装置及びその製造方法 |
US6773999B2 (en) * | 2001-07-18 | 2004-08-10 | Matsushita Electric Industrial Co., Ltd. | Method for treating thick and thin gate insulating film with nitrogen plasma |
JP4673513B2 (ja) * | 2001-08-01 | 2011-04-20 | 株式会社半導体エネルギー研究所 | 半導体装置の作製方法 |
US6759302B1 (en) * | 2002-07-30 | 2004-07-06 | Taiwan Semiconductor Manufacturing Company | Method of generating multiple oxides by plasma nitridation on oxide |
KR100442885B1 (ko) * | 2002-11-01 | 2004-08-02 | 삼성전자주식회사 | 반도체 소자의 다중 두께 게이트 유전층 제조 방법 |
KR100486278B1 (ko) * | 2002-11-11 | 2005-04-29 | 삼성전자주식회사 | 신뢰성이 향상된 게이트 산화막 형성방법 |
-
2003
- 2003-05-13 JP JP2003134265A patent/JP4190940B2/ja not_active Expired - Fee Related
-
2004
- 2004-05-12 US US10/843,694 patent/US7078354B2/en not_active Expired - Lifetime
- 2004-05-12 TW TW093113285A patent/TWI309471B/zh not_active IP Right Cessation
- 2004-05-13 CN CNB2004100431776A patent/CN100440456C/zh not_active Expired - Fee Related
- 2004-05-13 DE DE102004024603A patent/DE102004024603B4/de not_active Expired - Lifetime
-
2005
- 2005-12-01 US US11/291,068 patent/US20060125029A1/en not_active Abandoned
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
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US6323143B1 (en) * | 2000-03-24 | 2001-11-27 | Taiwan Semiconductor Manufacturing Company | Method for making silicon nitride-oxide ultra-thin gate insulating layers for submicrometer field effect transistors |
US20010052618A1 (en) * | 2000-06-20 | 2001-12-20 | Nec Corporation | Semiconductor device having a plurality of gate insulating films of different thicknesses, and method of manufacturing such semiconductor device |
US6444592B1 (en) * | 2000-06-20 | 2002-09-03 | International Business Machines Corporation | Interfacial oxidation process for high-k gate dielectric process integration |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102097387A (zh) * | 2009-12-15 | 2011-06-15 | 三星电子株式会社 | 制造非易失性存储器的方法 |
CN102097387B (zh) * | 2009-12-15 | 2015-04-08 | 三星电子株式会社 | 制造非易失性存储器的方法 |
Also Published As
Publication number | Publication date |
---|---|
JP2004342656A (ja) | 2004-12-02 |
TWI309471B (en) | 2009-05-01 |
JP4190940B2 (ja) | 2008-12-03 |
CN1622292A (zh) | 2005-06-01 |
DE102004024603B4 (de) | 2010-11-25 |
TW200501396A (en) | 2005-01-01 |
US20060125029A1 (en) | 2006-06-15 |
DE102004024603A1 (de) | 2005-03-03 |
US20050003618A1 (en) | 2005-01-06 |
US7078354B2 (en) | 2006-07-18 |
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ASS | Succession or assignment of patent right |
Owner name: PS4 LASCO CO., LTD. Free format text: FORMER OWNER: NIHITATSU MEMORY CO., LTD. Effective date: 20130826 |
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Effective date of registration: 20130826 Address after: Luxemburg Luxemburg Patentee after: ELPIDA MEMORY INC. Address before: Tokyo, Japan Patentee before: Nihitatsu Memory Co., Ltd. |
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