ATE427559T1 - Verfahren zur herstellung eines substrats, insbesondere fur optische, elektronische oder optoelektronische anwendungen, und mittels dieses verfahrens erhaltenes substrat - Google Patents

Verfahren zur herstellung eines substrats, insbesondere fur optische, elektronische oder optoelektronische anwendungen, und mittels dieses verfahrens erhaltenes substrat

Info

Publication number
ATE427559T1
ATE427559T1 AT07100845T AT07100845T ATE427559T1 AT E427559 T1 ATE427559 T1 AT E427559T1 AT 07100845 T AT07100845 T AT 07100845T AT 07100845 T AT07100845 T AT 07100845T AT E427559 T1 ATE427559 T1 AT E427559T1
Authority
AT
Austria
Prior art keywords
layer
seed layer
support
useful
substrate
Prior art date
Application number
AT07100845T
Other languages
English (en)
Inventor
Fabrice Letertre
Bruno Ghyselen
Original Assignee
Soitec Silicon On Insulator
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Soitec Silicon On Insulator filed Critical Soitec Silicon On Insulator
Application granted granted Critical
Publication of ATE427559T1 publication Critical patent/ATE427559T1/de

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/34Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies not provided for in groups H01L21/0405, H01L21/0445, H01L21/06, H01L21/16 and H01L21/18 with or without impurities, e.g. doping materials
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B25/00Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
    • C30B25/02Epitaxial-layer growth
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B25/00Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
    • C30B25/02Epitaxial-layer growth
    • C30B25/18Epitaxial-layer growth characterised by the substrate
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/10Inorganic compounds or compositions
    • C30B29/40AIIIBV compounds wherein A is B, Al, Ga, In or Tl and B is N, P, As, Sb or Bi
    • C30B29/403AIII-nitrides
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/10Inorganic compounds or compositions
    • C30B29/40AIIIBV compounds wherein A is B, Al, Ga, In or Tl and B is N, P, As, Sb or Bi
    • C30B29/403AIII-nitrides
    • C30B29/406Gallium nitride
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/0445Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising crystalline silicon carbide
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76254Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/16Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
    • H01L29/1608Silicon carbide

Landscapes

  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Materials Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Power Engineering (AREA)
  • Inorganic Chemistry (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Recrystallisation Techniques (AREA)
  • Led Devices (AREA)
  • Footwear And Its Accessory, Manufacturing Method And Apparatuses (AREA)
  • Manufacture Of Macromolecular Shaped Articles (AREA)
  • Luminescent Compositions (AREA)
  • Light Receiving Elements (AREA)
  • Polymers With Sulfur, Phosphorus Or Metals In The Main Chain (AREA)
AT07100845T 2000-11-27 2001-11-26 Verfahren zur herstellung eines substrats, insbesondere fur optische, elektronische oder optoelektronische anwendungen, und mittels dieses verfahrens erhaltenes substrat ATE427559T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR0015279A FR2817394B1 (fr) 2000-11-27 2000-11-27 Procede de fabrication d'un substrat notamment pour l'optique, l'electronique ou l'optoelectronique et substrat obtenu par ce procede

Publications (1)

Publication Number Publication Date
ATE427559T1 true ATE427559T1 (de) 2009-04-15

Family

ID=8856906

Family Applications (2)

Application Number Title Priority Date Filing Date
AT07100845T ATE427559T1 (de) 2000-11-27 2001-11-26 Verfahren zur herstellung eines substrats, insbesondere fur optische, elektronische oder optoelektronische anwendungen, und mittels dieses verfahrens erhaltenes substrat
AT01997835T ATE352866T1 (de) 2000-11-27 2001-11-26 Verfahren zur herstellung eines substrats insbesondere für die optik, elektronik oder optoelektronik und resultierendes substrat

Family Applications After (1)

Application Number Title Priority Date Filing Date
AT01997835T ATE352866T1 (de) 2000-11-27 2001-11-26 Verfahren zur herstellung eines substrats insbesondere für die optik, elektronik oder optoelektronik und resultierendes substrat

Country Status (11)

Country Link
US (2) US6794276B2 (de)
EP (2) EP1344246B1 (de)
JP (2) JP2004517472A (de)
KR (1) KR100805469B1 (de)
CN (2) CN1217381C (de)
AT (2) ATE427559T1 (de)
AU (1) AU2002222036A1 (de)
DE (2) DE60138233D1 (de)
FR (1) FR2817394B1 (de)
TW (1) TW536728B (de)
WO (1) WO2002043112A2 (de)

Families Citing this family (159)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7560296B2 (en) * 2000-07-07 2009-07-14 Lumilog Process for producing an epitalixal layer of galium nitride
US7118929B2 (en) * 2000-07-07 2006-10-10 Lumilog Process for producing an epitaxial layer of gallium nitride
FR2840731B3 (fr) * 2002-06-11 2004-07-30 Soitec Silicon On Insulator Procede de fabrication d'un substrat comportant une couche utile en materiau semi-conducteur monocristallin de proprietes ameliorees
FR2835096B1 (fr) * 2002-01-22 2005-02-18 Procede de fabrication d'un substrat auto-porte en materiau semi-conducteur monocristallin
FR2817394B1 (fr) * 2000-11-27 2003-10-31 Soitec Silicon On Insulator Procede de fabrication d'un substrat notamment pour l'optique, l'electronique ou l'optoelectronique et substrat obtenu par ce procede
FR2840730B1 (fr) * 2002-06-11 2005-05-27 Soitec Silicon On Insulator Procede de fabrication d'un substrat comportant une couche utile en materiau semi-conducteur monocristallin de proprietes ameliorees
US7407869B2 (en) 2000-11-27 2008-08-05 S.O.I.Tec Silicon On Insulator Technologies Method for manufacturing a free-standing substrate made of monocrystalline semiconductor material
FR2894990B1 (fr) * 2005-12-21 2008-02-22 Soitec Silicon On Insulator Procede de fabrication de substrats, notamment pour l'optique,l'electronique ou l'optoelectronique et substrat obtenu selon ledit procede
US8507361B2 (en) 2000-11-27 2013-08-13 Soitec Fabrication of substrates with a useful layer of monocrystalline semiconductor material
US7019339B2 (en) 2001-04-17 2006-03-28 California Institute Of Technology Method of using a germanium layer transfer to Si for photovoltaic applications and heterostructure made thereby
US20050026432A1 (en) * 2001-04-17 2005-02-03 Atwater Harry A. Wafer bonded epitaxial templates for silicon heterostructures
US7238622B2 (en) * 2001-04-17 2007-07-03 California Institute Of Technology Wafer bonded virtual substrate and method for forming the same
US6770966B2 (en) * 2001-07-31 2004-08-03 Intel Corporation Electronic assembly including a die having an integrated circuit and a layer of diamond to transfer heat
FR2835095B1 (fr) * 2002-01-22 2005-03-18 Procede de preparation d'ensembles a semi-conducteurs separables, notamment pour former des substrats pour l'electronique, l'optoelectrique et l'optique
FR2840452B1 (fr) 2002-05-28 2005-10-14 Lumilog Procede de realisation par epitaxie d'un film de nitrure de gallium separe de son substrat
US6936497B2 (en) * 2002-12-24 2005-08-30 Intel Corporation Method of forming electronic dies wherein each die has a layer of solid diamond
US7018909B2 (en) * 2003-02-28 2006-03-28 S.O.I.Tec Silicon On Insulator Technologies S.A. Forming structures that include a relaxed or pseudo-relaxed layer on a substrate
DE60336543D1 (de) 2003-05-27 2011-05-12 Soitec Silicon On Insulator Verfahren zur Herstellung einer heteroepitaktischen Mikrostruktur
FR2855908B1 (fr) * 2003-06-06 2005-08-26 Soitec Silicon On Insulator Procede d'obtention d'une structure comprenant au moins un substrat et une couche ultramince
FR2855909B1 (fr) * 2003-06-06 2005-08-26 Soitec Silicon On Insulator Procede d'obtention concomitante d'au moins une paire de structures comprenant au moins une couche utile reportee sur un substrat
TWI240434B (en) 2003-06-24 2005-09-21 Osram Opto Semiconductors Gmbh Method to produce semiconductor-chips
EP1664393B1 (de) * 2003-07-14 2013-11-06 Allegis Technologies, Inc. VERFAHREN ZUR Herstellung VON GALLIUMNITRID LED
FR2857982B1 (fr) * 2003-07-24 2007-05-18 Soitec Silicon On Insulator Procede de fabrication d'une couche epitaxiee
US7538010B2 (en) 2003-07-24 2009-05-26 S.O.I.Tec Silicon On Insulator Technologies Method of fabricating an epitaxially grown layer
FR2857983B1 (fr) * 2003-07-24 2005-09-02 Soitec Silicon On Insulator Procede de fabrication d'une couche epitaxiee
FR2868204B1 (fr) * 2004-03-25 2006-06-16 Commissariat Energie Atomique Substrat de type semi-conducteur sur isolant comportant une couche enterree en carbone diamant
WO2005104192A2 (en) * 2004-04-21 2005-11-03 California Institute Of Technology A METHOD FOR THE FABRICATION OF GaAs/Si AND RELATED WAFER BONDED VIRTUAL SUBSTRATES
US9011598B2 (en) * 2004-06-03 2015-04-21 Soitec Method for making a composite substrate and composite substrate according to the method
WO2006015185A2 (en) * 2004-07-30 2006-02-09 Aonex Technologies, Inc. GaInP/GaAs/Si TRIPLE JUNCTION SOLAR CELL ENABLED BY WAFER BONDING AND LAYER TRANSFER
US7579621B2 (en) 2004-09-17 2009-08-25 Massachusetts Institute Of Technology Integrated BST microwave tunable devices using buffer layer transfer method
US7713839B2 (en) * 2004-10-06 2010-05-11 Intel Corporation Diamond substrate formation for electronic assemblies
US7846759B2 (en) * 2004-10-21 2010-12-07 Aonex Technologies, Inc. Multi-junction solar cells and methods of making same using layer transfer and bonding techniques
ATE420461T1 (de) * 2004-11-09 2009-01-15 Soitec Silicon On Insulator Verfahren zum herstellen von zusammengesetzten wafern
DE102004062290A1 (de) * 2004-12-23 2006-07-06 Osram Opto Semiconductors Gmbh Verfahren zur Herstellung eines Halbleiterchips
EP1681712A1 (de) * 2005-01-13 2006-07-19 S.O.I. Tec Silicon on Insulator Technologies S.A. Verfahren zur Herstellung von Substraten für Optoelektronischen Anwendungen
JP2006210660A (ja) * 2005-01-28 2006-08-10 Hitachi Cable Ltd 半導体基板の製造方法
US10374120B2 (en) * 2005-02-18 2019-08-06 Koninklijke Philips N.V. High efficiency solar cells utilizing wafer bonding and layer transfer to integrate non-lattice matched materials
US7595507B2 (en) * 2005-04-13 2009-09-29 Group4 Labs Llc Semiconductor devices having gallium nitride epilayers on diamond substrates
JP2008537341A (ja) * 2005-04-13 2008-09-11 ザ リージェンツ オブ ザ ユニバーシティ オブ カリフォルニア 自立(Al,In,Ga)Nウェーハ製作のためのウェーハ分離技術
US8674405B1 (en) * 2005-04-13 2014-03-18 Element Six Technologies Us Corporation Gallium—nitride-on-diamond wafers and devices, and methods of manufacture
US8101498B2 (en) * 2005-04-21 2012-01-24 Pinnington Thomas Henry Bonded intermediate substrate and method of making same
KR100588377B1 (ko) * 2005-05-10 2006-06-09 삼성전기주식회사 수직구조 질화갈륨계 발광다이오드 소자 및 그 제조방법
US20060284167A1 (en) * 2005-06-17 2006-12-21 Godfrey Augustine Multilayered substrate obtained via wafer bonding for power applications
US7795050B2 (en) * 2005-08-12 2010-09-14 Samsung Electronics Co., Ltd. Single-crystal nitride-based semiconductor substrate and method of manufacturing high-quality nitride-based light emitting device by using the same
US20070069225A1 (en) * 2005-09-27 2007-03-29 Lumileds Lighting U.S., Llc III-V light emitting device
US8334155B2 (en) * 2005-09-27 2012-12-18 Philips Lumileds Lighting Company Llc Substrate for growing a III-V light emitting device
US7568412B2 (en) * 2005-10-04 2009-08-04 Marquip, Llc Method for order transition on a plunge slitter
JP2007180142A (ja) * 2005-12-27 2007-07-12 Toshiba Corp 窒化物系半導体素子及びその製造方法
US20070194342A1 (en) * 2006-01-12 2007-08-23 Kinzer Daniel M GaN SEMICONDUCTOR DEVICE AND PROCESS EMPLOYING GaN ON THIN SAPHIRE LAYER ON POLYCRYSTALLINE SILICON CARBIDE
FR2896619B1 (fr) * 2006-01-23 2008-05-23 Soitec Silicon On Insulator Procede de fabrication d'un substrat composite a proprietes electriques ameliorees
JP4756418B2 (ja) * 2006-02-28 2011-08-24 公立大学法人大阪府立大学 単結晶窒化ガリウム基板の製造方法
US8438119B2 (en) * 2006-03-30 2013-05-07 Sap Ag Foundation layer for services based enterprise software architecture
US20070232074A1 (en) * 2006-03-31 2007-10-04 Kramadhati Ravi Techniques for the synthesis of dense, high-quality diamond films using a dual seeding approach
US20070243703A1 (en) * 2006-04-14 2007-10-18 Aonex Technololgies, Inc. Processes and structures for epitaxial growth on laminate substrates
EP2016614A4 (de) * 2006-04-25 2014-04-09 Univ Singapore Verfahren eines auf der epitaxialen lateral-überwachstums-galliumnitrid vorlage gewachsenen zinkoxidfilms
TW200802544A (en) * 2006-04-25 2008-01-01 Osram Opto Semiconductors Gmbh Composite substrate and method for making the same
US7498191B2 (en) * 2006-05-22 2009-03-03 Chien-Min Sung Semiconductor-on-diamond devices and associated methods
US7670928B2 (en) * 2006-06-14 2010-03-02 Intel Corporation Ultra-thin oxide bonding for S1 to S1 dual orientation bonding
US20080048192A1 (en) * 2006-08-22 2008-02-28 Chien-Min Sung LED devices and associated methods
EP1901345A1 (de) * 2006-08-30 2008-03-19 Siltronic AG Mehrlagiger Halbleiterwafer und entsprechendes Verfahren
US8236594B2 (en) * 2006-10-20 2012-08-07 Chien-Min Sung Semiconductor-on-diamond devices and associated methods
US7943485B2 (en) * 2007-01-22 2011-05-17 Group4 Labs, Llc Composite wafers having bulk-quality semiconductor layers and method of manufacturing thereof
EP1950803B1 (de) * 2007-01-24 2011-07-27 S.O.I.TEC Silicon on Insulator Technologies S.A. Herstellungsverfahren für Wafer aus Silizium auf Isolator und entsprechender Wafer
US8157914B1 (en) 2007-02-07 2012-04-17 Chien-Min Sung Substrate surface modifications for compositional gradation of crystalline materials and associated products
US7732301B1 (en) 2007-04-20 2010-06-08 Pinnington Thomas Henry Bonded intermediate substrate and method of making same
EP1986229A1 (de) * 2007-04-27 2008-10-29 S.O.I.T.E.C. Silicon on Insulator Technologies Herstellungsverfahren für Wafer aus Verbundmaterial und entsprechender Wafer aus Verbundmaterial
US7799600B2 (en) * 2007-05-31 2010-09-21 Chien-Min Sung Doped diamond LED devices and associated methods
US7781256B2 (en) * 2007-05-31 2010-08-24 Chien-Min Sung Semiconductor-on-diamond devices and associated methods
FR2917232B1 (fr) * 2007-06-06 2009-10-09 Soitec Silicon On Insulator Procede de fabrication d'une structure pour epitaxie sans zone d'exclusion.
JP4945725B2 (ja) * 2007-07-26 2012-06-06 ソイテック 改善されたエピタキシャル材料を製造するための方法
KR101374090B1 (ko) * 2007-07-26 2014-03-17 아리조나 보드 오브 리젠츠 퍼 앤 온 비하프 오브 아리조나 스테이트 유니버시티 에피택시 방법들과 그 방법들에 의하여 성장된 템플릿들
US20090278233A1 (en) * 2007-07-26 2009-11-12 Pinnington Thomas Henry Bonded intermediate substrate and method of making same
JP2009141093A (ja) 2007-12-06 2009-06-25 Toshiba Corp 発光素子及び発光素子の製造方法
FR2926674B1 (fr) * 2008-01-21 2010-03-26 Soitec Silicon On Insulator Procede de fabrication d'une structure composite avec couche d'oxyde de collage stable
CN101521155B (zh) * 2008-02-29 2012-09-12 信越化学工业株式会社 制备具有单晶薄膜的基板的方法
US7749884B2 (en) * 2008-05-06 2010-07-06 Astrowatt, Inc. Method of forming an electronic device using a separation-enhancing species
FR2931293B1 (fr) * 2008-05-15 2010-09-03 Soitec Silicon On Insulator Procede de fabrication d'une heterostructure support d'epitaxie et heterostructure correspondante
KR20110028278A (ko) * 2008-05-17 2011-03-17 애스트로와트, 인코포레이티드 분리 기술을 사용하는 전자 디바이스 형성 방법
JP5548395B2 (ja) * 2008-06-25 2014-07-16 株式会社半導体エネルギー研究所 Soi基板の作製方法
EP2151861A1 (de) * 2008-08-06 2010-02-10 S.O.I. TEC Silicon Passivierung von geätzten Halbleiterstrukturen
FR2934925B1 (fr) * 2008-08-06 2011-02-25 Soitec Silicon On Insulator Procede de fabrication d'une structure comprernant une etape d'implantations d'ions pour stabiliser l'interface de collage.
EP2151852B1 (de) 2008-08-06 2020-01-15 Soitec Relaxation und Übertragung von Spannungsschichten
EP2151856A1 (de) * 2008-08-06 2010-02-10 S.O.I. TEC Silicon Relaxation von Spannungsschichten
TWI457984B (zh) 2008-08-06 2014-10-21 Soitec Silicon On Insulator 應變層的鬆弛方法
EP2159836B1 (de) * 2008-08-25 2017-05-31 Soitec Versteifungsschichten zur Relaxation von verspannten Schichten
WO2010025218A2 (en) * 2008-08-28 2010-03-04 The Regents Of The University Of California Composite semiconductor substrates for thin-film device layer transfer
US8692260B2 (en) * 2008-09-26 2014-04-08 Soitec Method of forming a composite laser substrate
US8048754B2 (en) * 2008-09-29 2011-11-01 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing SOI substrate and method for manufacturing single crystal semiconductor layer
JP5611571B2 (ja) * 2008-11-27 2014-10-22 株式会社半導体エネルギー研究所 半導体基板の作製方法及び半導体装置の作製方法
US7927975B2 (en) 2009-02-04 2011-04-19 Micron Technology, Inc. Semiconductor material manufacture
FR2943174B1 (fr) 2009-03-12 2011-04-15 Soitec Silicon On Insulator Adaptation du parametre de maille d'une couche de materiau contraint
US8802477B2 (en) * 2009-06-09 2014-08-12 International Business Machines Corporation Heterojunction III-V photovoltaic cell fabrication
US8703521B2 (en) 2009-06-09 2014-04-22 International Business Machines Corporation Multijunction photovoltaic cell fabrication
US20100310775A1 (en) * 2009-06-09 2010-12-09 International Business Machines Corporation Spalling for a Semiconductor Substrate
US8633097B2 (en) * 2009-06-09 2014-01-21 International Business Machines Corporation Single-junction photovoltaic cell
US20110048517A1 (en) * 2009-06-09 2011-03-03 International Business Machines Corporation Multijunction Photovoltaic Cell Fabrication
US9520856B2 (en) 2009-06-24 2016-12-13 Avago Technologies General Ip (Singapore) Pte. Ltd. Acoustic resonator structure having an electrode with a cantilevered portion
US9847243B2 (en) 2009-08-27 2017-12-19 Corning Incorporated Debonding a glass substrate from carrier using ultrasonic wave
JP5377212B2 (ja) 2009-10-13 2013-12-25 信越化学工業株式会社 単結晶ダイヤモンド基板の製造方法
US9847768B2 (en) * 2009-11-23 2017-12-19 Avago Technologies General Ip (Singapore) Pte. Ltd. Polarity determining seed layer and method of fabricating piezoelectric materials with specific C-axis
DE102009057020B4 (de) 2009-12-03 2021-04-29 Solaero Technologies Corp. Wachstumssubstrate für invertierte metamorphe Multijunction-Solarzellen
EP2330697A1 (de) * 2009-12-07 2011-06-08 S.O.I.Tec Silicon on Insulator Technologies Halbleitervorrichtung mit einer InGaN-Schicht
US9012253B2 (en) * 2009-12-16 2015-04-21 Micron Technology, Inc. Gallium nitride wafer substrate for solid state lighting devices, and associated systems and methods
JP5643509B2 (ja) * 2009-12-28 2014-12-17 信越化学工業株式会社 応力を低減したsos基板の製造方法
US8648387B2 (en) * 2009-12-30 2014-02-11 Industrial Technology Research Institute Nitride semiconductor template and method of manufacturing the same
TW201133945A (en) * 2010-01-12 2011-10-01 jian-min Song Diamond LED devices and associated methods
US8203153B2 (en) 2010-01-15 2012-06-19 Koninklijke Philips Electronics N.V. III-V light emitting device including a light extracting structure
US8105852B2 (en) * 2010-01-15 2012-01-31 Koninklijke Philips Electronics N.V. Method of forming a composite substrate and growing a III-V light emitting device over the composite substrate
US8154052B2 (en) 2010-05-06 2012-04-10 Koninklijke Philips Electronics N.V. Light emitting device grown on wavelength converting substrate
US8692261B2 (en) 2010-05-19 2014-04-08 Koninklijke Philips N.V. Light emitting device grown on a relaxed layer
US8536022B2 (en) 2010-05-19 2013-09-17 Koninklijke Philips N.V. Method of growing composite substrate using a relaxed strained layer
JP2011254051A (ja) * 2010-06-04 2011-12-15 Sumitomo Electric Ind Ltd 炭化珪素基板の製造方法、半導体装置の製造方法、炭化珪素基板および半導体装置
FR2961948B1 (fr) * 2010-06-23 2012-08-03 Soitec Silicon On Insulator Procede de traitement d'une piece en materiau compose
JP5468528B2 (ja) * 2010-06-28 2014-04-09 信越化学工業株式会社 単結晶ダイヤモンド成長用基材及びその製造方法並びに単結晶ダイヤモンド基板の製造方法
EP2614518A4 (de) 2010-09-10 2016-02-10 VerLASE TECHNOLOGIES LLC Verfahren zur herstellung optoelektronischer vorrichtungen mit von halbleiterdonatoren abgelösten schichten sowie in diesem verfahren hergestellte vorrichtungen
JP2012089828A (ja) * 2010-09-22 2012-05-10 Toshiba Corp 半導体装置の製造方法
GB2484506A (en) * 2010-10-13 2012-04-18 Univ Warwick Heterogrowth
DE102011012298A1 (de) * 2010-12-28 2012-06-28 Osram Opto Semiconductors Gmbh Verbundsubstrat, Halbleiterchip mit Verbundsubstrat und Verfahren zur Herstellung von Verbundsubstraten und Halbleiterchips
US9142412B2 (en) 2011-02-03 2015-09-22 Soitec Semiconductor devices including substrate layers and overlying semiconductor layers having closely matching coefficients of thermal expansion, and related methods
US8436363B2 (en) 2011-02-03 2013-05-07 Soitec Metallic carrier for layer transfer and methods for forming the same
US9082948B2 (en) 2011-02-03 2015-07-14 Soitec Methods of fabricating semiconductor structures using thermal spray processes, and semiconductor structures fabricated using such methods
US9203374B2 (en) 2011-02-28 2015-12-01 Avago Technologies General Ip (Singapore) Pte. Ltd. Film bulk acoustic resonator comprising a bridge
US9099983B2 (en) 2011-02-28 2015-08-04 Avago Technologies General Ip (Singapore) Pte. Ltd. Bulk acoustic wave resonator device comprising a bridge in an acoustic reflector
US9425764B2 (en) 2012-10-25 2016-08-23 Avago Technologies General Ip (Singapore) Pte. Ltd. Accoustic resonator having composite electrodes with integrated lateral features
US9444426B2 (en) 2012-10-25 2016-09-13 Avago Technologies General Ip (Singapore) Pte. Ltd. Accoustic resonator having integrated lateral feature and temperature compensation feature
JP2012230969A (ja) * 2011-04-25 2012-11-22 Sumitomo Electric Ind Ltd GaN系半導体デバイスの製造方法
JP2013001624A (ja) * 2011-06-21 2013-01-07 Sumitomo Electric Ind Ltd Iii族窒化物複合基板およびその評価方法
FR2977069B1 (fr) 2011-06-23 2014-02-07 Soitec Silicon On Insulator Procede de fabrication d'une structure semi-conductrice mettant en oeuvre un collage temporaire
RU2469433C1 (ru) * 2011-07-13 2012-12-10 Юрий Георгиевич Шретер Способ лазерного отделения эпитаксиальной пленки или слоя эпитаксиальной пленки от ростовой подложки эпитаксиальной полупроводниковой структуры (варианты)
US8922302B2 (en) 2011-08-24 2014-12-30 Avago Technologies General Ip (Singapore) Pte. Ltd. Acoustic resonator formed on a pedestal
US8383460B1 (en) * 2011-09-23 2013-02-26 GlobalFoundries, Inc. Method for fabricating through substrate vias in semiconductor substrate
JP5903818B2 (ja) * 2011-09-26 2016-04-13 富士通株式会社 化合物半導体装置及びその製造方法
US8476629B2 (en) * 2011-09-27 2013-07-02 Taiwan Semiconductor Manufacturing Company, Ltd. Enhanced wafer test line structure
FR2984007B1 (fr) 2011-12-13 2015-05-08 Soitec Silicon On Insulator Procede de stabilisation d'une interface de collage situee au sein d'une structure comprenant une couche d'oxyde enterree et structure obtenue
US9608592B2 (en) 2014-01-21 2017-03-28 Avago Technologies General Ip (Singapore) Pte. Ltd. Film bulk acoustic wave resonator (FBAR) having stress-relief
CN104285001A (zh) 2012-02-29 2015-01-14 六号元素技术美国公司 金刚石载氮化镓晶片以及制造设备和制造方法
EP2645428A1 (de) * 2012-03-28 2013-10-02 Soitec Herstellung von Mehrfachsolarzellen
FR2992464B1 (fr) * 2012-06-26 2015-04-03 Soitec Silicon On Insulator Procede de transfert d'une couche
JP6042994B2 (ja) * 2012-10-26 2016-12-14 アールエフエイチアイシー コーポレイション 信頼性および動作寿命を改善した半導体デバイスならびにその製造方法
CN105051919A (zh) * 2013-01-16 2015-11-11 Qmat股份有限公司 用于形成光电器件的技术
JP6146111B2 (ja) * 2013-04-26 2017-06-14 株式会社豊田自動織機 半導体基板の製造方法および半導体基板
US9553183B2 (en) * 2013-06-19 2017-01-24 Infineon Technologies Austria Ag Gate stack for normally-off compound semiconductor transistor
FR3007891B1 (fr) * 2013-06-28 2016-11-25 Soitec Silicon On Insulator Procede de fabrication d'une structure composite
US9064789B2 (en) * 2013-08-12 2015-06-23 International Business Machines Corporation Bonded epitaxial oxide structures for compound semiconductor on silicon substrates
EP2933824B1 (de) * 2014-04-14 2021-08-18 Nxp B.V. Substratanordnung
FR3039003B1 (fr) 2015-07-17 2017-07-28 Soitec Silicon On Insulator Procede de fabrication d'un substrat
JP2017059598A (ja) * 2015-09-14 2017-03-23 株式会社東芝 ウェーハ及び半導体装置
JP6515757B2 (ja) * 2015-09-15 2019-05-22 信越化学工業株式会社 SiC複合基板の製造方法
CN105420812B (zh) * 2015-09-16 2019-02-05 新疆天科合达蓝光半导体有限公司 一种从籽晶托上剥离碳化硅籽晶的方法
JP2017079090A (ja) * 2015-10-22 2017-04-27 株式会社東芝 磁気記録媒体、及び磁気記録再生装置
DE102019102323A1 (de) * 2018-02-02 2019-08-08 Infineon Technologies Ag Waferverbund und Verfahren zur Herstellung von Halbleiterbauteilen
FR3079534B1 (fr) 2018-03-28 2022-03-18 Soitec Silicon On Insulator Procede de fabrication d'une couche monocristalline de materiau gaas et substrat pour croissance par epitaxie d'une couche monocristalline de materiau gaas
FR3079532B1 (fr) 2018-03-28 2022-03-25 Soitec Silicon On Insulator Procede de fabrication d'une couche monocristalline de materiau ain et substrat pour croissance par epitaxie d'une couche monocristalline de materiau ain
DE102019114328B4 (de) 2018-05-31 2022-03-03 Rohm Co. Ltd Halbleitersubstratstruktur und leistungshalbleitervorrichtung
US20220181210A1 (en) * 2019-03-12 2022-06-09 The Regents Of The University Of California Method for removing a bar of one or more devices using supporting plates
US11652146B2 (en) 2020-02-07 2023-05-16 Rfhic Corporation Method of forming a semiconductor wafer containing a gallium-nitride layer and two diamond layers
FR3114909B1 (fr) * 2020-10-06 2023-03-17 Soitec Silicon On Insulator Procédé de fabrication d’un substrat pour la croissance épitaxiale d’une couche d’un alliage III-N à base de gallium
CN113990940B (zh) * 2021-08-30 2023-06-09 华灿光电(浙江)有限公司 碳化硅外延结构及其制造方法
CN115261992A (zh) * 2022-09-28 2022-11-01 青禾晶元(天津)半导体材料有限公司 一种碳化硅复合籽晶及其制备方法与应用

Family Cites Families (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2681472B1 (fr) 1991-09-18 1993-10-29 Commissariat Energie Atomique Procede de fabrication de films minces de materiau semiconducteur.
DE69333152T2 (de) * 1992-01-30 2004-05-27 Canon K.K. Verfahren zur Herstellung eines Halbleitersubstrates
JPH10135500A (ja) * 1996-03-18 1998-05-22 Sony Corp 薄膜半導体、太陽電池および発光素子の製造方法
US6114188A (en) * 1996-04-12 2000-09-05 Northeastern University Method of fabricating an integrated complex-transition metal oxide device
KR100232886B1 (ko) * 1996-11-23 1999-12-01 김영환 Soi 웨이퍼 제조방법
CA2225131C (en) * 1996-12-18 2002-01-01 Canon Kabushiki Kaisha Process for producing semiconductor article
US5880491A (en) * 1997-01-31 1999-03-09 The United States Of America As Represented By The Secretary Of The Air Force SiC/111-V-nitride heterostructures on SiC/SiO2 /Si for optoelectronic devices
JP3707200B2 (ja) * 1997-05-09 2005-10-19 株式会社デンソー 半導体基板の製造方法
US6251754B1 (en) * 1997-05-09 2001-06-26 Denso Corporation Semiconductor substrate manufacturing method
US5877070A (en) * 1997-05-31 1999-03-02 Max-Planck Society Method for the transfer of thin layers of monocrystalline material to a desirable substrate
FR2767416B1 (fr) * 1997-08-12 1999-10-01 Commissariat Energie Atomique Procede de fabrication d'un film mince de materiau solide
JP3643225B2 (ja) * 1997-12-03 2005-04-27 ローム株式会社 光半導体チップ
FR2774214B1 (fr) * 1998-01-28 2002-02-08 Commissariat Energie Atomique PROCEDE DE REALISATION D'UNE STRUCTURE DE TYPE SEMI-CONDUCTEUR SUR ISOLANT ET EN PARTICULIER SiCOI
JP3525061B2 (ja) * 1998-09-25 2004-05-10 株式会社東芝 半導体発光素子の製造方法
FR2787919B1 (fr) * 1998-12-23 2001-03-09 Thomson Csf Procede de realisation d'un substrat destine a faire croitre un compose nitrure
JP3765457B2 (ja) * 1999-01-08 2006-04-12 豊田合成株式会社 半導体素子
US6328796B1 (en) * 1999-02-01 2001-12-11 The United States Of America As Represented By The Secretary Of The Navy Single-crystal material on non-single-crystalline substrate
JP2000223682A (ja) * 1999-02-02 2000-08-11 Canon Inc 基体の処理方法及び半導体基板の製造方法
JP2000261088A (ja) * 1999-03-05 2000-09-22 Hitachi Ltd 発光素子
FR2817394B1 (fr) * 2000-11-27 2003-10-31 Soitec Silicon On Insulator Procede de fabrication d'un substrat notamment pour l'optique, l'electronique ou l'optoelectronique et substrat obtenu par ce procede
FR2817395B1 (fr) * 2000-11-27 2003-10-31 Soitec Silicon On Insulator Procede de fabrication d'un substrat notamment pour l'optique, l'electronique ou l'optoelectronique et substrat obtenu par ce procede

Also Published As

Publication number Publication date
CN1478295A (zh) 2004-02-25
FR2817394A1 (fr) 2002-05-31
DE60126328T2 (de) 2007-11-08
DE60126328D1 (de) 2007-03-15
EP1791170B1 (de) 2009-04-01
TW536728B (en) 2003-06-11
JP2004517472A (ja) 2004-06-10
JP5324803B2 (ja) 2013-10-23
WO2002043112A3 (fr) 2002-07-18
EP1791170A2 (de) 2007-05-30
FR2817394B1 (fr) 2003-10-31
DE60138233D1 (de) 2009-05-14
WO2002043112A2 (fr) 2002-05-30
EP1344246A2 (de) 2003-09-17
US6794276B2 (en) 2004-09-21
CN1217381C (zh) 2005-08-31
AU2002222036A1 (en) 2002-06-03
KR100805469B1 (ko) 2008-02-20
JP2008219019A (ja) 2008-09-18
KR20030059280A (ko) 2003-07-07
CN1734718A (zh) 2006-02-15
US20040029359A1 (en) 2004-02-12
US7235462B2 (en) 2007-06-26
EP1791170A3 (de) 2007-07-04
ATE352866T1 (de) 2007-02-15
US20050026394A1 (en) 2005-02-03
CN100399511C (zh) 2008-07-02
EP1344246B1 (de) 2007-01-24

Similar Documents

Publication Publication Date Title
ATE427559T1 (de) Verfahren zur herstellung eines substrats, insbesondere fur optische, elektronische oder optoelektronische anwendungen, und mittels dieses verfahrens erhaltenes substrat
KR101527627B1 (ko) 구조화 표면을 갖는 고상 재료의 얇은 자립층을 제조하는 방법
ATE477589T1 (de) Verfahren zur herstellung eines substrats durch den transfer eines geber-wafers mit fremdatomen, und ein entsprechender geber-wafer
DE60329192D1 (de) Transfer einer dünnschicht von einem wafer mit einer pufferschicht
JP2010093233A (ja) 補剛材の適用によるひずみ材料層の緩和
JP5097552B2 (ja) 分離可能な基板の形成方法
DE602004008941D1 (de) Verfahren zur herstellung einer epitaktischen schicht
JP2010219566A (ja) 所望の基板への単結晶材料からなる薄層の移動方法
ATE464651T1 (de) Verfahren zur herstellung einer spannungsrelaxierten schichtstruktur auf einem nicht gitterangepassten substrat sowie verwendung eines solchen schichtsystems in elektronischen und/oder optoelektronischen bauelementen
ATE534759T1 (de) Verfahren zur herstellung eines freistehenden substrates aus monokristallinem halbleitermaterial
CN109686656A (zh) 一种硅基异质集成碳化硅薄膜结构的制备方法
US9041165B2 (en) Relaxation and transfer of strained material layers
JP5582617B2 (ja) 歪み層の緩和
GB201110557D0 (en) Substrates for semiconductor devices
KR20100067117A (ko) 기판과 기판의 일 면에 증착되는 층을 포함하는 구조체를 제조하는 방법
US7807548B2 (en) Process of forming and controlling rough interfaces
KR101216367B1 (ko) 변형층들의 이완을 위한 보강층들
WO2022173467A3 (en) Structures and methods for producing an optoelectronic device
KR20050083237A (ko) 질화갈륨 기판의 제조 방법
JPS6482611A (en) Crystal growth method

Legal Events

Date Code Title Description
RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties