WO2014157134A1 - 実装方法および実装装置 - Google Patents
実装方法および実装装置 Download PDFInfo
- Publication number
- WO2014157134A1 WO2014157134A1 PCT/JP2014/058178 JP2014058178W WO2014157134A1 WO 2014157134 A1 WO2014157134 A1 WO 2014157134A1 JP 2014058178 W JP2014058178 W JP 2014058178W WO 2014157134 A1 WO2014157134 A1 WO 2014157134A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- mounting
- chip component
- chip
- bonding
- substrate
- Prior art date
Links
Images
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K13/00—Apparatus or processes specially adapted for manufacturing or adjusting assemblages of electric components
- H05K13/04—Mounting of components, e.g. of leadless components
- H05K13/046—Surface mounting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67138—Apparatus for wiring semiconductor or solid state device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
- H01L24/75—Apparatus for connecting with bump connectors or layer connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L24/80 - H01L24/90
- H01L24/92—Specific sequence of method steps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
- H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32135—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/32145—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
- H01L2224/7525—Means for applying energy, e.g. heating means
- H01L2224/75252—Means for applying energy, e.g. heating means in the upper part of the bonding apparatus, e.g. in the bonding head
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
- H01L2224/755—Cooling means
- H01L2224/75502—Cooling means in the upper part of the bonding apparatus, e.g. in the bonding head
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
- H01L2224/7565—Means for transporting the components to be connected
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
- H01L2224/757—Means for aligning
- H01L2224/75702—Means for aligning in the upper part of the bonding apparatus, e.g. in the bonding head
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
- H01L2224/757—Means for aligning
- H01L2224/75743—Suction holding means
- H01L2224/75745—Suction holding means in the upper part of the bonding apparatus, e.g. in the bonding head
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
- H01L2224/757—Means for aligning
- H01L2224/75753—Means for optical alignment, e.g. sensors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
- H01L2224/759—Means for monitoring the connection process
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
- H01L2224/7598—Apparatus for connecting with bump connectors or layer connectors specially adapted for batch processes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/8119—Arrangement of the bump connectors prior to mounting
- H01L2224/81191—Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed only on the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/818—Bonding techniques
- H01L2224/81801—Soldering or alloying
- H01L2224/81815—Reflow soldering
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8319—Arrangement of the layer connectors prior to mounting
- H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/832—Applying energy for connecting
- H01L2224/83201—Compression bonding
- H01L2224/83203—Thermocompression bonding, e.g. diffusion bonding, pressure joining, thermocompression welding or solid-state welding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/838—Bonding techniques
- H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/838—Bonding techniques
- H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
- H01L2224/83855—Hardening the adhesive by curing, i.e. thermosetting
- H01L2224/83862—Heat curing
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
- H01L2224/92—Specific sequence of method steps
- H01L2224/921—Connecting a surface with connectors of different types
- H01L2224/9211—Parallel connecting processes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/93—Batch processes
- H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L24/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/38—Effects and problems related to the device integration
- H01L2924/381—Pitch distance
Definitions
- the present invention relates to a mounting method and a mounting apparatus for mounting a chip component such as an integrated circuit on a semiconductor wafer or a circuit board.
- circuit board patterns tend to be fine pitched (higher precision and miniaturization). With the fine pitch, the number of components mounted on the circuit board tends to increase. Therefore, in order to shorten the mounting time on the circuit board, the chip is mounted by a mounting apparatus provided with a plurality of bonding heads on one circuit board.
- a chip component is mounted on a non-conductive resin (NCP), non-conductive film (NCF), or anisotropic conductive film (ACF) applied or transferred to an electrode portion on a circuit board, and then temporarily bonded. is doing.
- NCP non-conductive resin
- NCF non-conductive film
- ACF anisotropic conductive film
- the temporary bonded substrate is conveyed to a subsequent process, and the chip component is heated by a dedicated bonding head to heat and cure a non-conductive film (NCF) or the like (Patent Document 1).
- NCF non-conductive film
- the present invention has been made in view of such circumstances, and has as its main object to provide a mounting method and a mounting apparatus capable of mounting chip components on a semiconductor wafer, a circuit board or the like at high speed and with high accuracy. Yes.
- the present inventor has created a mounting apparatus having a plurality of main bonding bonding heads and performs high speed main bonding of chip components on one circuit board. And as a result of intensive studies through simulations, the following new findings were obtained.
- the present invention aims to solve the above-mentioned problems and these new problems.
- This invention has the following configuration in order to achieve such an object.
- a mounting method for mounting a chip component on a substrate on which a plurality of circuit patterns are formed In the process of mounting chip parts on the substrate by a plurality of bonding heads, First, a chip component is mounted on a predetermined position of the substrate, and a main bonding process is performed while heating the chip component over a predetermined time, and A cooling process for cooling another bonding head to a predetermined temperature while the chip component is mounted on the substrate by the bonding head and finally bonded, When the mounting of the chip component by the preceding bonding head is completed, the chip portion is mounted at a predetermined position of the substrate by another bonding head, and the chip component is repeatedly subjected to main pressure bonding while heating for a predetermined time. And
- the alignment coordinates are obtained by recognizing the alignment mark provided on the substrate of the mounting site where the chip component is mounted next while moving the recognition mechanism during the mounting process.
- the surface of the attachment tool that sucks the chip components before the chip components are sucked in the bonding head in the cooling process.
- the surface may be observed by a recognition mechanism that recognizes the alignment mark of the chip component.
- the positional deviation amount between the attachment tool and the chip part adsorbed by the attachment tool may be measured.
- suction position of the chip component on the attachment tool may be corrected according to the amount of positional deviation.
- This method can prevent resin from adhering to the attachment tool during mounting.
- the mounting process it is preferable to align the mounting position by moving the holding stage that holds the substrate.
- the bonding stage can be fixed by moving the holding stage. That is, it is possible to avoid the displacement of the holding position of the chip component that occurs when the bonding head is moved. In other words, it is possible to avoid the displacement of the mounting position accompanying the displacement of the holding position.
- a plurality of the substrates are aligned and arranged at a predetermined interval on one holding stage,
- a set of at least two bonding heads are mounted on the same part of different substrates and chip-bonded,
- the tact time of the mounting process can be further shortened.
- the present invention has the following configuration in order to achieve such an object.
- a mounting device for mounting chip components on a substrate on which a plurality of circuit patterns are formed, A holding stage for holding the substrate; A drive mechanism for moving the holding stage; A plurality of bonding heads for mounting and main-bonding chip components at predetermined positions on the substrate on the holding stage; A heater for heating the bonding head; A cooling mechanism for cooling the bonding head; A control unit that previously mounts the chip component at a predetermined position on the substrate and cools the other bonding head by a cooling mechanism while performing the main pressure bonding while heating the chip component over a predetermined time. It is characterized by that.
- the other bonding head and heater can be cooled while the preceding bonding head mounts the chip component on the substrate and performs the main pressure bonding. Therefore, the above method can be suitably performed.
- control unit includes a recognition mechanism for recognizing the alignment mark of the chip component held on the bonding head and the alignment mark provided on the substrate, and the control unit mounts the chip component on the substrate and the preceding bonding head During the main pressure bonding, it is preferable to scan the recognition mechanism to recognize the alignment mark provided at the mounting portion of the substrate on which the chip component is to be mounted next and to obtain the alignment coordinates.
- the bonding head includes an attachment tool that adsorbs the chip component, includes an observation mechanism, and the control unit uses the observation mechanism to observe the surface of the attachment tool that is not adsorbing the chip component. It is desirable to have a function. At that time, a recognition mechanism for recognizing the alignment mark of the chip component may observe the surface.
- This configuration can prevent chip components from being damaged or misaligned during mounting due to resin adhesion on the attachment tool.
- control unit has a function of measuring a positional deviation amount of the attachment tool and the chip component adsorbed to the attachment tool by using a recognition mechanism that recognizes an alignment mark of the chip component.
- a chip component delivery mechanism that transports the chip component and delivers it to the attachment tool, and the control unit performs a function of correcting the position of the chip component in the chip component delivery mechanism in accordance with the positional deviation amount. It is further desirable to comprise.
- This configuration can prevent the resin from adhering to the attachment tool during mounting.
- the chip component can be mounted on the circuit board at high speed and accurately and can be crimped.
- FIG. 1 is a perspective view showing a schematic configuration of a mounting apparatus according to an embodiment of the present invention.
- the mounting apparatus includes a chip component supply unit 1, a chip component mounting unit 2, a control unit 3, and the like.
- the chip component supply unit 1 includes a magazine mounting stage 4, a wafer transfer mechanism 5, a pickup stage 6, a pickup mechanism 7, a chip slider 8, and the like.
- the magazine mounting stage 4 is mounted with magazines 9 in which dicing-processed semiconductor wafers WD (hereinafter simply referred to as “wafers”) are stored in multiple stages at predetermined intervals.
- the wafer 8 is divided into individual pieces by the expanding process to become chip parts C.
- the chip component C is bonded and held by a dicing tape.
- the wafer transfer mechanism 5 unloads the wafer WD from the magazine 9 and places it on the pickup stage 6. That is, a clamp 13 is provided at the tip of an arm 12 that is cantilevered from a movable base 11 that is slidable on the rail 10.
- the movable table 11 is configured to be screw-feed driven by a screw shaft that is driven forward and reverse by a servo motor.
- the pickup stage 6 sucks and holds the wafer WD adhered and held on the dicing tape.
- the pickup mechanism 7 includes a downward pickup nozzle 14 that can move back and forth, right and left (XY axis direction in the drawing), and that can move up and down (Z axis direction). That is, the pickup mechanism 7 is configured to deliver the chip component C sucked and held by the pickup nozzle 14 to the chip slider 8.
- the chip slider 8 has a number corresponding to the number of bonding heads 21a and 21b described later. Therefore, in this embodiment, two chip sliders 8a and 8b are provided in two upper and lower stages. As shown in FIG. 2, each chip slider 8a, 8b reciprocates from the receiving position on the pickup mechanism 7 side to the passing position below the bonding heads 21a, 21b by the suction plate 16 that sucks and holds the chip component C. Moving. That is, the movable base 18 having the suction plate 16 and supported by the rail 17 so as to be slidable is driven to be screw-fed by a screw shaft 20 that is driven forward and reverse by a servo motor 19. The chip slider 8 may deliver the chip component C to each of the bonding heads 21a and 21b with one chip slider if the tact time is sufficient.
- the chip component mounting unit 2 includes bonding heads 21a and 21b, a two-field camera 22, a holding stage 23, and the like.
- the bonding heads 21a and 21b are mounted on a beam portion of a portal frame 25 erected on the base 24 across the holding stage 23 via a lifting mechanism 26 such as a cylinder or a ball screw.
- the bonding heads 21a and 21b are configured to be rotatable around the vertical Z axis. That is, the bonding heads 21a and 21b can be aligned in the ⁇ direction in the figure.
- the bonding heads 21 a and 21 b include a ceramic holder 31, a heat insulating block 33, a ceramic heater 34, and an attachment tool 35 in order from the lower part of the main body 30 made of a metal tool.
- the attachment tool 35 is fixed to the ceramic heater 34 by suction, and a dedicated tool corresponding to the shape of the chip part C can be automatically replaced.
- the ceramic heater 34 is provided with a temperature detector 36 such as a thermocouple or a resistance temperature detector. That is, the heat received from the ceramic heater 34 is detected by the temperature detector 36, and the detection result is transmitted to the control unit 3.
- a temperature detector 36 such as a thermocouple or a resistance temperature detector. That is, the heat received from the ceramic heater 34 is detected by the temperature detector 36, and the detection result is transmitted to the control unit 3.
- the flow path 37 is connected to an air supply source 39 through a pressure hose 38 having a valve V.
- the air supplied from the air supply means 39 is discharged from the opening 37 a through the flow path 37. Therefore, heat generated from the heat generating portion of the ceramic heater 34 is taken away by the air circulation, and the bonding heads 21a and 21b including both the ceramic heater 34 and the attachment tool 35 can be rapidly cooled. In addition, if the nozzle provided outside is cooled by blowing air to both the ceramic heater 34 and the attachment tool 35, the cooling time can be further shortened.
- the bonding heads 21a and 21b have a through hole 40 formed from the main body 30 to the attachment tool 35, and the through hole 40 and an external vacuum source 41 are connected to each other via an electromagnetic valve V.
- the two-view camera 22 recognizes an image of the alignment mark attached to the circuit pattern of the substrate on which the chip component C is mounted and the alignment mark attached to the chip component C, and transmits the image data to the control unit 3. That is, the two-field camera 22 is configured to move horizontally between the holding stage 23 and the chip part C.
- the wafer W is used as the substrate on which the chip component C is mounted.
- the substrate is not limited to the wafer, and a flexible printed circuit board based on a heat-resistant resin or the like, or ceramics. Or a rigid printed circuit board based on glass or the like.
- the holding stage 23 is installed at 24 on the base and is configured to move horizontally in the front-rear and left-right directions (XY directions in the figure).
- the controller 3 is input with setting conditions according to the resin to be used, for example, a non-conductive resin (NCP), a non-conductive film (NCF), or an anisotropic conductive film (ACF).
- NCP non-conductive resin
- NCF non-conductive film
- ACF anisotropic conductive film
- the heating time, the cooling temperature of the ceramic heater 34, and the like are input.
- the current supplied to the ceramic heater 34 is adjusted, temperature control and on / off switching of air supply from the air supply source 39, flow rate, etc. Control is performed.
- the measured value of the temperature detector 36 is compared with the set value, and the temperature is controlled according to the obtained temperature deviation.
- the entire apparatus is controlled in an integrated manner. Specific control will be described in detail in the following operation description.
- the bonding heads 21a and 21b that are in a heated state after performing the first mounting process suck the next chip part C and lower it down to the mounting part.
- a temperature at which the solder at the lower end does not melt or change and a temperature at which the flux does not disappear (cooling temperature) are obtained in advance.
- the time until the temperature of the ceramic heater 34 and the attachment tool 35 is lowered from the temperature raised to the cooling temperature to mount the chip component C on the wafer W and to perform the main pressure bonding is obtained. That is, as shown in FIG. 5, the single processing time and temperature profile data of one bonding head 21a, 21b including the mounting time and cooling time of the chip component C are acquired, and the control unit 3 is based on the data.
- Step S1 the resin is heated to 220 ° C., and the bonding heads 21 a and 21 b are raised at the time when the temperature drops to 120 ° C., which is the glass transition point at which the adhesion of the resin chip component C begins to stabilize, and cooling is started.
- control unit 3 When the condition setting is completed and the apparatus is operated, the control unit 3 unloads the wafer WD from the magazine 9 by the wafer transfer mechanism 5 and places it on the pickup stage 6. Thereafter, the control unit 3 starts the mounting process while switching the operation of the bonding heads 21a and 21b based on the single processing time set as a condition (step S2).
- the pickup mechanism 7 delivers the sucked chip parts C in the order of the chip sliders 8a and 8b. Thereafter, parallel processing of the bonding heads 21a and 21b is executed (step S2).
- the chip slider 8a moves to the delivery position below the bonding head 21a in advance. As shown in FIG. 6, the bonding head 21a descends and sucks the chip component C (step S3a). At the same time, the two-field camera 22 moves between the chip part C held by the bonding head 21a and the wafer W. Thereafter, the chip slider 8a moves to the pickup mechanism 7 side in order to receive the next chip component C.
- the two-view camera 22 recognizes an image of the alignment mark attached to the circuit pattern of the wafer W and the alignment mark attached to the chip part C, and transmits the image data to the control unit 3.
- the control unit 3 controls the operation of the drive mechanism in order to perform alignment processing using the image data (step S4a). That is, the control unit 3 obtains the position coordinates of both alignment marks. Further, the direction and distance from the position coordinate of the alignment mark of the circuit pattern to the position coordinate of the alignment mark of the chip part C are calculated, and only the holding stage 23 is moved for alignment. The other bonding head 21a is rotated and aligned around the vertical axis.
- the bonding head 21a is lowered to a predetermined height, and the chip component C is mounted on the resin on the circuit pattern (step S5a).
- the two-field camera 22 moves below the other bonding head 21b.
- a function of observing the surface state of the attachment tool 35 by using the image recognition means and judging the presence or absence of adhesion of resin or the like may be added to the control means 3. 22 may be used. At that time, if it is determined that the deposits and scratches are within the allowable range, the process proceeds to the next step.
- the attachment tool 35 is heated by the ceramic heater 34 of the bonding head 21a, and the chip component C is heated at a predetermined temperature over a predetermined time. That is, the resin is heat-cured through the chip part C, and the chip part C is finally bonded to the circuit pattern of the wafer 8 (step S6a).
- the chip component C is delivered from the chip slider 8b to the bonding head 21b (step S3b). If the chip part C is not attracted to a predetermined position of the attachment tool 35 of the bonding head 21b at this stage, there is a possibility that the resin protruding from the chip part C in the mounting stage will adhere to the attachment tool 35. As described above, the adhesion of the resin to the attachment tool 35 causes damage or displacement when the chip component C is mounted. Therefore, if the chip slider 8b moves to the pickup mechanism 7 side in order to receive the next chip part C, the position of the two-view camera 22 is between the chip part C held by the bonding head 21b and the wafer W.
- step S7b The ceramic heater 34 of the bonding head 21a is turned off and air is supplied from the air supply source 39 to cool the bonding head 21a to a predetermined temperature (step S8a).
- the holding stage 23 is moved by a predetermined direction and a predetermined distance as shown in FIG.
- the two-view camera 22 recognizes an image of the alignment mark attached to the circuit pattern of the wafer W and the alignment mark attached to the chip component C held by the bonding head 21b, and controls the image data.
- the controller 3 aligns the holding stage 23 and the bonding head 21b (step S4b).
- step S5b When the alignment process of the bonding head 21b is completed, the bonding head 21b starts to descend to a predetermined height as shown in FIG. 13 (step S5b). At the same time, the two-field camera 22 moves below the bonding head 21a. At this stage, a function for observing the surface state of the attachment tool 35 of the bonding head 21a using the image recognition means and judging the presence or absence of adhesion of resin or the like may be added to the control means 3, and the image recognition is performed. As a means, a two-field camera 22 may be used. At that time, if it is determined that the deposits and scratches are within the allowable range, the process proceeds to the next step.
- the chip portion C is mounted on the circuit pattern of the wafer W and finally bonded by the bonding head 21b (step S6b).
- the chip component C is delivered to the other bonding head 21a by the chip slider 8a. Thereafter, if the chip slider 8a moves to the pickup mechanism 7 side to receive the next chip part C, the chip part C is attracted to a predetermined position of the attachment tool 35 of the attachment bonding head 21a by the two-view camera 22. It is possible to measure the positional deviation amount.
- the function of correcting the position of the chip component C at the delivery stage from the pickup mechanism 7 to the chip slider 8a and / or at the time of delivery from the chip slider 8a to the bonding head 21b. May be added to the control means 3.
- step S7b when the main pressure bonding process by the bonding head 21b is completed, the bonding head 21b is raised and the holding stage 23 is moved by a predetermined direction and a predetermined distance.
- step S8b When the cooling process for one bonding head 21b is started (step S8b), the alignment process for the other bonding head 21a is started.
- step S9a and S9b the circuit pattern is counted until the planned number of mounting is reached and the circuit pattern formed on the wafer W in the same cycle. The number of final press bonding processes is repeatedly executed.
- the bonding heads 21b mounts the chip component C on the circuit pattern of the wafer 8 and performs the main pressure bonding
- air is supplied to the inside of the bonding head 21a that has completed the main pressure bonding process in advance. Air can be supplied from the source 39 and actively cooled. That is, if the solder of the bumps of the chip component C is not melted or deformed, the bonding heads 21a and 21b are alternately switched without inadvertently curing the resin on the circuit board, and the chip components C are continuously switched. Can be mounted on the circuit pattern of the wafer W with high accuracy.
- the present invention is not limited to the embodiment described above, and can be modified as follows.
- either one of the bonding heads 21a and 21b scans the two-field camera 22 while the chip part C is mounted on the circuit pattern of the wafer W, and the other bonding head Next, only the alignment mark of the circuit pattern on which the chip component C is to be mounted may be recognized first. According to this configuration, since it is possible to perform image processing of only one alignment mark using the standby time, it is possible to reduce the load of image processing on the control unit 3 and to shorten the processing time.
- a plurality of circuit boards are aligned and arranged on a single holding stage 23 at a predetermined pitch, and a pair of bonding heads are simultaneously connected to the circuit board.
- the chip part C may be mounted on the same part. According to this configuration, the chip component C can be mounted on the circuit board at twice the speed of the above embodiment.
- the temperature detector 36 detects the temperature of the bonding heads 21a and 21b, adjusts the air supply amount according to the detection result, and keeps the cooling time constant. Also good.
- the mounting area on the circuit board is divided into three, the left and right areas are allocated to the mounting areas of the bonding heads 21a and 21b, and the central area is assigned to both.
- a common area that can be mounted by using the bonding heads 21a and 21b may be used.
- each bonding head 21a, 21b there is a part that cannot be mounted because a bad mark is attached to the defective circuit pattern.
- the number of both the bonding heads 21a and 21b mounted can be kept uniform.
- the number of bonding heads 21a and 21b provided for one holding stage 23 is not limited to two. That is, what is necessary is just two or more.
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Wire Bonding (AREA)
- Supply And Installment Of Electrical Components (AREA)
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
Abstract
Description
複数台のボンディングヘッドによって前記基板にチップ部品を実装する過程で、
先行して前記基板の所定位置にチップ部品を実装し、所定時間をかけて当該チップ部品を加熱しながら本圧着する実装過程と、
前記ボンディングヘッドによって基板にチップ部品を実装および本圧着している間、他のボンディングヘッドを所定温度まで冷却する冷却過程を備え、
先行したボンディングヘッドによるチップ部品の実装が完了すると、他のボンディングヘッドによって基板の所定位置にチップ部位を実装し、所定時間をかけて当該チップ部品を加熱しながら本圧着させるよう繰り返し行うことを特徴とする。
前記実装過程では、少なくとも2台のボンディングヘッドの組を、互いに異なる基板の同一部位にチップ部品を実装して本圧着し、
冷却過程では、他のボンディングヘッドを冷却することが好ましい。
前記基板を保持する保持ステージと、
前記保持ステージを移動させる駆動機構と、
前記保持ステージ上の基板の所定位置にチップ部品を実装および本圧着する複数台のボンディングヘッドと、
前記ボンディングヘッドを加熱するヒータと、
前記ボンディングヘッドを冷却する冷却機構と、
先行して前記基板の所定位置にチップ部品を実装し、所定時間をかけて当該チップ部品を加熱しながら本圧着している間、他のボンディングヘッドを冷却機構によって冷却させる制御部とを備えたことを特徴とする。
前記制御部は、先行するボンディングヘッドが基板にチップ部品を実装および本圧着している間、認識機構を走査させて次にチップ部品の実装を行う基板の実装予定部位に設けられたアライメントマークを認識させてアライメント座標を求めることが好ましい。
搬送されてくる。
この段階において、画像認識手段を用いて、ボンディングヘッド21aのアタッチメントツール35表面状態を観察して、樹脂等の付着やキズの有無を判断する機能を制御手段3に付加してもよく、画像認識手段として2視野カメラ22を用いても良い。その際、付着物やキズが許容範囲以内と判断したら次のステップに移行する。
2 … チップ部品実装部
3 … 制御部
21a… ボンディングヘッド
21b… ボンディングヘッド
22 … 2視野カメラ
30 … 本体
31 … ホルダ
32 … ヒータベース
33 … 断熱ブロック
34 … セラミックヒータ
35 … アタッチメントツール
36 … 温度検出器
37 … 流路
39 … エアー供給源
C … チップ部品
Claims (14)
- 複数個の回路パターンが形成された基板にチップ部品を実装する実装方法であって、
複数台のボンディングヘッドによって前記基板にチップ部品を実装する過程で、
先行して前記基板の所定位置にチップ部品を実装し、所定時間をかけて当該チップ部品を加熱しながら本圧着する実装過程と、
前記ボンディングヘッドによって基板にチップ部品を実装および本圧着している間、他のボンディングヘッドを所定温度まで冷却する冷却過程を備え、
先行したボンディングヘッドによるチップ部品の実装が完了すると、他のボンディングヘッドによって基板の所定位置にチップ部位を実装し、所定時間をかけて当該チップ部品を加熱しながら本圧着させるよう繰り返し行うことを特徴とする実装方法。 - 請求項1に記載の実装方法において、
前記実装過程の間、認識機構を移動させながら、次にチップ部品の実装を行う実装部位の基板に設けられたアライメントマークを認識させてアライメント座標を求めることを特徴とする実装方法。 - 請求項1または請求項2に記載の実装方法において、
冷却過程のボンディングヘッドにおいて、チップ部品の吸着を行うアタッチメントツールの、チップ部品吸着前の、表面を観察することを特徴とする実装方法。 - 請求項3に記載の実装方法において、
チップ部品のアライメントマークを認識する認識機構が、前記表面の観察も行うことを特徴とする実装方法。 - 請求項1ないし請求項4のいずれかに記載の実装方法において、
チップ部品のアライメントマークを認識する認識機構が、前記アタッチメントツールと、前記アタッチメントツールに吸着されたチップ部品の位置ズレ量を測定することを特徴とする実装方法。 - 請求項5に記載の実装方法において、
前記位置ズレ量に応じて、前記アタッチメントツールへのチップ部品の吸着位置を補正することを特徴とする実装方法。 - 請求項1ないし請求項6に記載の実装方法において、
前記実装過程は、基板を保持する保持ステージを移動させて実装位置のアライメントを行うことを特徴とする実装方法。 - 請求項1ないし請求項7のいずれかに記載の実装方法において、
1台の保持ステージに複数枚の前記基板を所定間隔をおいて整列配置し、前記実装過程では、少なくとも2台のボンディングヘッドの組を、互いに異なる基板の同一部位にチップ部品を実装して本圧着し、冷却過程では、他のボンディングヘッドを冷却することを特徴とする実装方法。 - 複数個の回路パターンが形成された基板にチップ部品を実装する実装装置であって、
前記基板を保持する保持ステージと、
前記保持ステージを移動させる駆動機構と、
前記保持ステージ上の基板の所定位置にチップ部品を実装および本圧着する複数台のボンディングヘッドと、
前記ボンディングヘッドを加熱するヒータと、
前記ボンディングヘッドを冷却する冷却機構と、
先行して前記基板の所定位置にチップ部品を実装し、所定時間をかけて当該チップ部品を加熱しながら本圧着している間、他のボンディングヘッドを冷却機構によって冷却させる制御部とを備えたことを特徴とする実装装置。 - 請求項9に記載の実装装置であって、
前記ボンディングヘッドに保持されているチップ部品のアライメントマークと基板に設けられたアライメントマークを認識する認識機構を備え前記制御部は、先行するボンディングヘッドが基板にチップ部品を実装および本圧着している間、認識機構を走査させて次にチップ部品の実装を行う基板の実装予定部位に設けられたアライメントマークを認識させてアライメント座標を求めることを特徴とする実装装置。 - 請求項9または請求項10に記載の実装装置であって、
前記ボンディングヘッドがチップ部品を吸着するアタッチメントツールを備え、
観察機構を備え、
前記制御部が、前記観察機構を用いて、チップ部品を吸着していない状態の前記アタッチメントツールの表面を観察する機能を備えたことを特徴とする実装装置。 - 請求項11に記載の実装装置であって、
チップ部品のアライメントマークを認識する認識機構が、前記表面を観察する機能も備えることを特徴とする実装装置。 - 請求項9ないし請求項12のいずれかに記載の実装装置であって、
前記制御部が、チップ部品のアライメントマークを認識する認識機構を用いて、前記アタッチメントツールと、前記アタッチメントツールに吸着されたチップ部品の位置ズレ量を測定する機能を備えたことを特徴とする実装装置。 - 請求項13に記載の実装装置であって、
チップ部品を搬送し、前記アタッチメントツールに受け渡す、チップ部品受け渡し機構を備え、前記制御部が、前記位置ズレ量に応じて、チップ部品受け渡し機構において、チップ部品の位置補正を行う機能を備えたことを特徴とする実装装置。
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020157030537A KR102232636B1 (ko) | 2013-03-28 | 2014-03-25 | 실장 방법 및 실장 장치 |
JP2015508510A JPWO2014157134A1 (ja) | 2013-03-28 | 2014-03-25 | 実装方法および実装装置 |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2013-069628 | 2013-03-28 | ||
JP2013069628 | 2013-03-28 |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2014157134A1 true WO2014157134A1 (ja) | 2014-10-02 |
Family
ID=51624105
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/JP2014/058178 WO2014157134A1 (ja) | 2013-03-28 | 2014-03-25 | 実装方法および実装装置 |
Country Status (4)
Country | Link |
---|---|
JP (3) | JPWO2014157134A1 (ja) |
KR (1) | KR102232636B1 (ja) |
TW (1) | TWI619181B (ja) |
WO (1) | WO2014157134A1 (ja) |
Cited By (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2016152661A1 (ja) * | 2015-03-20 | 2016-09-29 | 東レエンジニアリング株式会社 | ボンディングツール冷却装置およびこれを備えたボンディング装置ならびにボンディングツール冷却方法 |
WO2016203532A1 (ja) * | 2015-06-15 | 2016-12-22 | 富士機械製造株式会社 | 部品実装機 |
JP2017163121A (ja) * | 2016-03-11 | 2017-09-14 | ファスフォードテクノロジ株式会社 | ダイボンディング装置および半導体装置の製造方法 |
WO2017169954A1 (ja) * | 2016-03-31 | 2017-10-05 | 東レエンジニアリング株式会社 | ボンディングツール冷却装置およびこれを備えたボンディング装置ならびにボンディングツール冷却方法 |
JP2019029563A (ja) * | 2017-08-01 | 2019-02-21 | 芝浦メカトロニクス株式会社 | 電子部品の実装装置と実装方法、およびパッケージ部品の製造方法 |
WO2020075216A1 (ja) * | 2018-10-09 | 2020-04-16 | ヤマハ発動機株式会社 | 部品実装装置 |
US10784130B2 (en) | 2016-12-20 | 2020-09-22 | Samsung Electronics Co., Ltd. | Bonding apparatus |
TWI727540B (zh) * | 2018-12-19 | 2021-05-11 | 日商朝日科技股份有限公司 | 電子零件之安裝裝置 |
WO2022049685A1 (ja) * | 2020-09-02 | 2022-03-10 | 株式会社新川 | 半導体装置の製造装置および製造方法 |
CN114466526A (zh) * | 2021-11-02 | 2022-05-10 | 深圳市智链信息技术有限公司 | 一种无线接收信号放大器的芯片固定装置 |
US11990445B2 (en) * | 2018-09-11 | 2024-05-21 | Pyxis Cf Pte. Ltd. | Apparatus and method for semiconductor device bonding |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2020022345A1 (ja) * | 2018-07-24 | 2020-01-30 | 株式会社新川 | 電子部品実装装置 |
KR102122042B1 (ko) * | 2019-02-19 | 2020-06-26 | 세메스 주식회사 | 칩 본더 및 이를 갖는 기판 처리 장치 |
KR102267950B1 (ko) * | 2019-06-17 | 2021-06-22 | 세메스 주식회사 | 다이 본딩 방법 |
CN112566485B (zh) * | 2019-09-25 | 2022-05-13 | 芝浦机械电子装置株式会社 | 电子零件的安装装置 |
WO2023139685A1 (ja) * | 2022-01-19 | 2023-07-27 | 株式会社新川 | 電子部品実装装置及び電子部品実装方法 |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH06252212A (ja) * | 1993-02-24 | 1994-09-09 | Hitachi Ltd | ボンディング装置 |
JPH1022350A (ja) * | 1996-07-08 | 1998-01-23 | Matsushita Electric Ind Co Ltd | バンプ付きワークのボンディング装置 |
JP2003243890A (ja) * | 2002-02-21 | 2003-08-29 | Matsushita Electric Ind Co Ltd | 部品実装装置、部品実装ヘッド干渉回避制御方法、及び部品実装ヘッド干渉回避制御プログラム |
JP2005142460A (ja) * | 2003-11-10 | 2005-06-02 | Sony Corp | ボンディング装置及びボンディング方法 |
JP2005210608A (ja) * | 2004-01-26 | 2005-08-04 | Seiko Epson Corp | 圧電デバイスの製造方法および圧電デバイスの製造装置 |
JP2010212505A (ja) * | 2009-03-11 | 2010-09-24 | Toshiba Corp | 半導体装置の接合装置及び半導体装置の製造方法 |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3497078B2 (ja) * | 1998-03-31 | 2004-02-16 | 株式会社日立ハイテクインスツルメンツ | ダイボンダ |
JP4002431B2 (ja) * | 2001-12-21 | 2007-10-31 | シャープ株式会社 | 半導体レーザ装置の製造方法および半導体レーザ装置の製造装置 |
JP3848893B2 (ja) * | 2002-04-02 | 2006-11-22 | 松下電器産業株式会社 | 部品の基板への部品押圧接合装置及び接合方法 |
JP4642565B2 (ja) * | 2005-06-29 | 2011-03-02 | 東レエンジニアリング株式会社 | 実装方法および実装装置 |
JP4828298B2 (ja) * | 2006-05-11 | 2011-11-30 | ヤマハ発動機株式会社 | 部品実装方法および部品実装装置 |
JP2009212254A (ja) * | 2008-03-04 | 2009-09-17 | Toray Eng Co Ltd | チップ搭載方法およびチップ搭載装置 |
KR101624004B1 (ko) * | 2009-03-23 | 2016-05-24 | 토레이 엔지니어링 컴퍼니, 리미티드 | 실장 장치 및 실장 방법 |
-
2014
- 2014-03-25 WO PCT/JP2014/058178 patent/WO2014157134A1/ja active Application Filing
- 2014-03-25 KR KR1020157030537A patent/KR102232636B1/ko active IP Right Grant
- 2014-03-25 JP JP2015508510A patent/JPWO2014157134A1/ja active Pending
- 2014-03-27 TW TW103111517A patent/TWI619181B/zh active
-
2017
- 2017-03-17 JP JP2017052153A patent/JP6518709B2/ja active Active
-
2019
- 2019-04-22 JP JP2019080816A patent/JP6823103B2/ja active Active
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH06252212A (ja) * | 1993-02-24 | 1994-09-09 | Hitachi Ltd | ボンディング装置 |
JPH1022350A (ja) * | 1996-07-08 | 1998-01-23 | Matsushita Electric Ind Co Ltd | バンプ付きワークのボンディング装置 |
JP2003243890A (ja) * | 2002-02-21 | 2003-08-29 | Matsushita Electric Ind Co Ltd | 部品実装装置、部品実装ヘッド干渉回避制御方法、及び部品実装ヘッド干渉回避制御プログラム |
JP2005142460A (ja) * | 2003-11-10 | 2005-06-02 | Sony Corp | ボンディング装置及びボンディング方法 |
JP2005210608A (ja) * | 2004-01-26 | 2005-08-04 | Seiko Epson Corp | 圧電デバイスの製造方法および圧電デバイスの製造装置 |
JP2010212505A (ja) * | 2009-03-11 | 2010-09-24 | Toshiba Corp | 半導体装置の接合装置及び半導体装置の製造方法 |
Cited By (25)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20170128550A (ko) * | 2015-03-20 | 2017-11-22 | 토레이 엔지니어링 컴퍼니, 리미티드 | 본딩 툴 냉각 장치 및 이것을 구비한 본딩 장치 및 본딩 툴 냉각 방법 |
KR102452411B1 (ko) * | 2015-03-20 | 2022-10-06 | 토레이 엔지니어링 컴퍼니, 리미티드 | 본딩 툴 냉각 장치 및 이것을 구비한 본딩 장치 및 본딩 툴 냉각 방법 |
WO2016152661A1 (ja) * | 2015-03-20 | 2016-09-29 | 東レエンジニアリング株式会社 | ボンディングツール冷却装置およびこれを備えたボンディング装置ならびにボンディングツール冷却方法 |
JPWO2016152661A1 (ja) * | 2015-03-20 | 2018-01-11 | 東レエンジニアリング株式会社 | ボンディングツール冷却装置およびこれを備えたボンディング装置ならびにボンディングツール冷却方法 |
JPWO2016203532A1 (ja) * | 2015-06-15 | 2018-03-29 | 富士機械製造株式会社 | 部品実装機 |
EP3310147A4 (en) * | 2015-06-15 | 2018-05-23 | Fuji Machine Mfg. Co., Ltd. | Component mounting machine |
US10285317B2 (en) | 2015-06-15 | 2019-05-07 | Fuji Corporation | Component mounter |
WO2016203532A1 (ja) * | 2015-06-15 | 2016-12-22 | 富士機械製造株式会社 | 部品実装機 |
JP2017163121A (ja) * | 2016-03-11 | 2017-09-14 | ファスフォードテクノロジ株式会社 | ダイボンディング装置および半導体装置の製造方法 |
WO2017169954A1 (ja) * | 2016-03-31 | 2017-10-05 | 東レエンジニアリング株式会社 | ボンディングツール冷却装置およびこれを備えたボンディング装置ならびにボンディングツール冷却方法 |
US10784130B2 (en) | 2016-12-20 | 2020-09-22 | Samsung Electronics Co., Ltd. | Bonding apparatus |
JP2019029563A (ja) * | 2017-08-01 | 2019-02-21 | 芝浦メカトロニクス株式会社 | 電子部品の実装装置と実装方法、およびパッケージ部品の製造方法 |
US11990445B2 (en) * | 2018-09-11 | 2024-05-21 | Pyxis Cf Pte. Ltd. | Apparatus and method for semiconductor device bonding |
JPWO2020075216A1 (ja) * | 2018-10-09 | 2021-09-02 | ヤマハ発動機株式会社 | 部品実装装置 |
CN112772014A (zh) * | 2018-10-09 | 2021-05-07 | 雅马哈发动机株式会社 | 零件安装装置 |
KR20210027490A (ko) * | 2018-10-09 | 2021-03-10 | 야마하하쓰도키 가부시키가이샤 | 부품 실장 장치 |
CN112772014B (zh) * | 2018-10-09 | 2022-10-14 | 雅马哈发动机株式会社 | 零件安装装置 |
JP7159337B2 (ja) | 2018-10-09 | 2022-10-24 | ヤマハ発動機株式会社 | 部品実装装置 |
KR102493189B1 (ko) * | 2018-10-09 | 2023-01-30 | 야마하하쓰도키 가부시키가이샤 | 부품 실장 장치 |
WO2020075216A1 (ja) * | 2018-10-09 | 2020-04-16 | ヤマハ発動機株式会社 | 部品実装装置 |
TWI727540B (zh) * | 2018-12-19 | 2021-05-11 | 日商朝日科技股份有限公司 | 電子零件之安裝裝置 |
WO2022049685A1 (ja) * | 2020-09-02 | 2022-03-10 | 株式会社新川 | 半導体装置の製造装置および製造方法 |
TWI827972B (zh) * | 2020-09-02 | 2024-01-01 | 日商新川股份有限公司 | 半導體裝置的製造裝置以及製造方法 |
JP7493836B2 (ja) | 2020-09-02 | 2024-06-03 | 株式会社新川 | 半導体装置の製造装置および製造方法 |
CN114466526A (zh) * | 2021-11-02 | 2022-05-10 | 深圳市智链信息技术有限公司 | 一种无线接收信号放大器的芯片固定装置 |
Also Published As
Publication number | Publication date |
---|---|
JP2017118147A (ja) | 2017-06-29 |
TW201448067A (zh) | 2014-12-16 |
KR20150136510A (ko) | 2015-12-07 |
JP6518709B2 (ja) | 2019-05-22 |
TWI619181B (zh) | 2018-03-21 |
JPWO2014157134A1 (ja) | 2017-02-16 |
KR102232636B1 (ko) | 2021-03-25 |
JP2019114819A (ja) | 2019-07-11 |
JP6823103B2 (ja) | 2021-01-27 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP6823103B2 (ja) | 実装方法および実装装置 | |
JP4816194B2 (ja) | 電子部品実装システムおよび電子部品搭載装置ならびに電子部品実装方法 | |
JP2020102637A (ja) | 電子部品の実装装置と実装方法、およびパッケージ部品の製造方法 | |
TW201521142A (zh) | 定位半導體晶片及接合頭之系統與方法、熱接合系統與方法 | |
JP6717630B2 (ja) | 電子部品の実装装置 | |
JP4482598B2 (ja) | ボンディング装置、ボンディング装置の補正量算出方法及びボンディング方法 | |
JP2021097220A (ja) | 素子実装装置 | |
US10285317B2 (en) | Component mounter | |
JP5851719B2 (ja) | マスクを用いてワークに導電性ボールを搭載する方法 | |
JP7451342B2 (ja) | 基板作業装置 | |
US11387211B2 (en) | Bonding apparatus and bonding method | |
JP2013168465A (ja) | キャリブレート用ターゲット治具および半導体製造装置 | |
JP6093610B2 (ja) | ダイボンダ及びボンディング方法 | |
JP6942829B2 (ja) | 電子部品の実装装置 | |
KR102220338B1 (ko) | 칩 본딩 장치 및 방법 | |
JP6461822B2 (ja) | 半導体装置の実装方法および実装装置 | |
TWI460776B (zh) | 應用於晶圓的銅柱焊料的製造方法及其設備 | |
JP2023106662A (ja) | 実装装置および実装方法 | |
TW202202808A (zh) | 安裝裝置及安裝方法 | |
CN110648943A (zh) | 用于对准接合工具的模块和具有该模块的裸芯接合装置 | |
KR20200142135A (ko) | 다이 본딩 방법 및 다이 본딩 장치 | |
KR20150088097A (ko) | 평판 디스플레이 패널용 가본딩장치 | |
JP2011228415A (ja) | 電子部品取り付け状態検査装置及び電子部品取り付け状態検査方法 | |
JP2002116706A (ja) | 表示パネルモジュールの製造装置および表示パネルモジュールの製造方法 | |
JP2001028381A (ja) | 実装方法及び実装装置 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
121 | Ep: the epo has been informed by wipo that ep was designated in this application |
Ref document number: 14773776 Country of ref document: EP Kind code of ref document: A1 |
|
ENP | Entry into the national phase |
Ref document number: 2015508510 Country of ref document: JP Kind code of ref document: A |
|
NENP | Non-entry into the national phase |
Ref country code: DE |
|
ENP | Entry into the national phase |
Ref document number: 20157030537 Country of ref document: KR Kind code of ref document: A |
|
122 | Ep: pct application non-entry in european phase |
Ref document number: 14773776 Country of ref document: EP Kind code of ref document: A1 |