US20090047795A1 - Plasma processing apparatus, plasma processing method and storage medium - Google Patents

Plasma processing apparatus, plasma processing method and storage medium Download PDF

Info

Publication number
US20090047795A1
US20090047795A1 US12/192,388 US19238808A US2009047795A1 US 20090047795 A1 US20090047795 A1 US 20090047795A1 US 19238808 A US19238808 A US 19238808A US 2009047795 A1 US2009047795 A1 US 2009047795A1
Authority
US
United States
Prior art keywords
plasma
processing
electrode
power
generating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
US12/192,388
Other languages
English (en)
Inventor
Tatsuo Matsudo
Shinji Himori
Noriaki Imai
Takeshi Ohse
Jun Abe
Takayuki Katsunuma
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tokyo Electron Ltd
Original Assignee
Tokyo Electron Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Electron Ltd filed Critical Tokyo Electron Ltd
Priority to US12/192,388 priority Critical patent/US20090047795A1/en
Assigned to TOKYO ELECTRON LIMITED reassignment TOKYO ELECTRON LIMITED ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: ABE, JUN, HIMORI, SHINJI, IMAI, NORIAKI, KATSUNUMA, TAKAYUKI, MATSUDO, TATSUO, OHSE, TAKESHI
Publication of US20090047795A1 publication Critical patent/US20090047795A1/en
Priority to US13/737,313 priority patent/US8703002B2/en
Abandoned legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065Plasma etching; Reactive-ion etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes
    • H01J37/32009Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
    • H01J37/32082Radio frequency generated discharge
    • H01J37/32137Radio frequency generated discharge controlling of the discharge by modulation of energy
    • H01J37/32146Amplitude modulation, includes pulsing
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes
    • H01J37/32009Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
    • H01J37/32082Radio frequency generated discharge
    • H01J37/32091Radio frequency generated discharge the radio frequency energy being capacitively coupled to the plasma
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes
    • H01J37/32009Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
    • H01J37/32082Radio frequency generated discharge
    • H01J37/32137Radio frequency generated discharge controlling of the discharge by modulation of energy
    • H01J37/32155Frequency modulation
    • H01J37/32165Plural frequencies

Definitions

  • the present invention relates to a technique for performing plasma processing on a target object; and, more particularly, to a capacitively coupled plasma processing apparatus, a plasma processing method and a storage medium storing a control program for executing the plasma processing method.
  • a plasma is often used in processes, e.g., etching, deposition, oxidation, sputtering and the like, in order to allow a processing gas to react efficiently at a relatively low temperature.
  • a capacitively coupled plasma processing apparatus is mainly used for a single-wafer plasma processing apparatus, especially a single-wafer plasma etching apparatus.
  • an upper and a lower electrode are disposed in parallel with each other in a processing chamber as a vacuum chamber, and a target substrate (e.g., a semiconductor wafer, a glass substrate or the like) is mounted on the lower electrode.
  • a radio frequency (RF) voltage is applied between the electrodes, and electrons are accelerated by an electric field formed between the electrodes by the application of the RF voltage.
  • Plasma is generated due to ionization by collision between the electrons and the processing gas, and a desired microprocessing, e.g., etching, is performed on a substrate surface by radicals or ions in the plasma.
  • the low pressure and low ion energy causes charging damage that has not occurred conventionally. That is, in the conventional apparatus having high ion energy, in-plane distribution of a plasma potential does not cause a critical problem. However, if the ion energy decreases at a lower pressure, the in-plane non-uniformity of the plasma potential easily causes charging damage of a gate oxide film.
  • etching rate at a central portion of a wafer becomes higher and the etching rate at a peripheral portion of the wafer becomes lower.
  • Japanese patent Laid-open Publication No. 2001-185542 and corresponding U.S. Pat. No. 6,624,084 describe an equipment including a current path correction means for correcting a current path part near an outer periphery of a wafer among RF current paths formed by a RF bias applied to the wafer so as to face a wafer facing surface of an opposite electrode or an impedance adjustment means for making am impedance up to a ground viewed from the RF bias almost uniform in the wafer surface. Accordingly, wafer in-plane uniformity of a self-bias generated by the RF bias application can be improved and, also, macro damage can be suppressed.
  • charging damage in the plasma processing, there may occur charging damage as follows.
  • the charge-up of the gate oxide film is caused by a local electric field produced by unbalance between ions and electrons in the wafer surface, which leads to dielectric breakdown.
  • the ions are injected perpendicularly to the main surface of the wafer, whereas the electrons are injected thereto at an inclined angle. Accordingly, the balance of charges is locally disturbed, and charge-up occurs in random locations.
  • the charging damage depends on a profile of an etching pattern as well as in-plane uniformity of a self-bias, and occurs in random locations. Therefore, the problem of charging damage cannot be effectively solved by the technique described in Japanese patent Laid-open Publication No. 2001-185542 and the corresponding U.S. Pat. No. 6,624,084.
  • the present invention provides a plasma processing apparatus, method and a storage medium storing a control program for executing the plasma processing method for effectively preventing charging damage and improving stability and reliability of plasma processing and for enhancing the in-plane uniformity in the plasma processing.
  • a plasma processing apparatus including: an evacuable processing chamber; a first electrode for mounting thereon a target object in the processing chamber; a second electrode facing the first electrode in parallel in the processing chamber; a processing gas supply unit for supplying desired processing gas to a processing space between the first electrode and the second electrode; a first radio frequency (RF) power supply unit for applying to at least one of the first and the second electrode a first RF power for generating a plasma from the processing gas; and a control unit for controlling the first RF power supply unit so that a first phase (period) at which the first RF power has a first amplitude for generating a plasma and a second phase (period) at which the first RF power has a second amplitude for generating substantially no plasma are alternately repeated at predetermined intervals.
  • RF radio frequency
  • the charging damage (dielectric breakdown) in the plasma processing depends on the amount of charges introduced or accumulated in the target object from the plasma and an insulating film is deteriorated or destroyed exponentially when the amount of the introduced or accumulated charges exceeds a threshold value.
  • the charge-up of the insulating film occurs due to unbalance between ions and electrons injected or introduced into the target object, thereby producing a local electric field.
  • the plasma generation as time elapses, the amount of charges by the charged-up and the intensity of the local electric field increases. Further, when the amount of charges exceeds the threshold value, the insulating film is damaged or destroyed.
  • the second amplitude may be zero. Accordingly, the time at which the charge balance is recovered during the second period is minimized and, further, the plasma processing time can be shortened.
  • the first phase at which the plasma is generated may be about 2 to 100 ⁇ sec per cycle, preferably about 2 to 50 ⁇ sec per cycle. Meanwhile, the second phase at which no-plasma is generated may be greater than or equal to about 2 ⁇ sec per cycle.
  • a plasma processing apparatus including: an evacuable processing chamber; a first electrode for mounting thereon a target object in the processing chamber; a second electrode facing the first electrode in parallel in the processing chamber; a processing gas supply unit for supplying desired processing gas to a processing space between the first electrode and the second electrode; a first RF power supply unit for applying a first RF power to at least one of the first and the second electrode; and a control unit for controlling the first RF power supply unit so that a state where a plasma is generated from the processing gas in the processing chamber and a state where no plasma is generated are alternately repeated at predetermined intervals during processing of the target object.
  • the state in which a plasma is generated from a processing gas (plasma generating state) and the state in which no plasma is generated (no-plasma generating state) are alternately repeated at predetermined intervals. Therefore, the time for continuously generating a plasma is shortened compared to the conventional plasma processing in which a plasma is continuously generated from start to end of the plasma processing, so that the amount of charges introduced from the plasma into the target object at a time or the amount of charges accumulated on the surface of the target object is reduced. Accordingly, the charging damage is hardly generated and, hence, it is possible to implement the stable plasma processing and improve the reliability of the plasma processing.
  • the duration of the plasma generating state may be about 2 to 100 ⁇ sec per cycle, preferably about 2 to 50 ⁇ sec per cycle. Meanwhile, the duration of the no-plasma generating state may be greater than or equal to about 2 ⁇ sec per cycle.
  • the first RF power may have a frequency of about 30 to 300 MHz. Further, the first RF power supply unit may apply the first RF power to the first electrode. Moreover, the plasma processing apparatus may further includes a second RF power supply unit for applying to at least one of the first electrode and the second electrode a second RF power for attracting ions in the plasma to the target object. In this case, the second RF power supply unit may apply the second RF power to the first electrode.
  • a plasma processing method for performing a plasma process on a target object by generating a plasma of a processing gas in a processing space with the use of a plasma processing apparatus including: an evacuable processing chamber; a first electrode for mounting thereon the target object in the processing chamber; a second electrode facing the first electrode in parallel in the processing chamber; a processing gas supply unit for supplying desired processing gas to the processing space between the first electrode and the second electrode; and a first RF power supply unit for applying to at least one of the first and the second electrode a first RF power for generating a plasma from the processing gas, wherein a first phase at which the first RF power has a first amplitude for generating a plasma and a second phase at which the first RF power has a second amplitude for generating substantially no plasma are alternately repeated at predetermined intervals.
  • the first phase at which the first RF power for plasma generation has the first amplitude for plasma generation and the second phase at which substantially no plasma is generated are alternately repeated at predetermined intervals.
  • the time for continuously generating a plasma is shortened compared to the conventional plasma processing in which a RF power having an amplitude for plasma generation is continuously applied and, hence, the amount of charges introduced from the plasma to the target object at a time or the amount of charges accumulated on the surface of the target object is reduced.
  • the charging damage is hardly generated and, hence, it is possible to implement the stable plasma processing and improve the reliability of the plasma processing.
  • the second amplitude may be zero. Accordingly, in the second phase, the time at which no plasma is generated, i.e., at which the charge balance is recovered, is minimized and, further, the plasma processing time can be shortened. Further, the first phase at which plasma is generated may be about 2 to 100 ⁇ sec per cycle, preferably about 2 to 50 ⁇ sec per cycle. Meanwhile, the second phase at which no plasma is generated is greater than or equal to about 2 ⁇ sec per cycle.
  • a plasma processing method for performing a plasma process on a target object by generating a plasma of a processing gas in a processing space with the use of a plasma processing apparatus including: an evacuable processing chamber; a first electrode for mounting thereon the target object in the processing chamber; a second electrode facing the first electrode in parallel in the processing chamber; a processing gas supply unit for supplying desired processing gas to the processing space between the first electrode and the second electrode; and a first RF power supply unit for applying a first RF power to at least one of the first and the second electrode, wherein a state where a plasma is generated from the processing gas in the processing chamber and a state where no-plasma is generated are alternately repeated at predetermined intervals during processing of the target object.
  • the state in which a plasma is generated from a processing gas (plasma generating state) and the state in which no plasma is generated (no-plasma generating state) are alternately repeated at predetermined intervals. Therefore, the time for continuously generating a plasma is shortened compared to the conventional plasma processing in which a plasma is continuously generated from start to end of the plasma processing, so that the amount of charges introduced from the plasma to the target object at a time or the amount of charges accumulated on the surface of the target object is reduced. Accordingly, the charging damage is hardly generated and, hence, it is possible to implement the stable plasma processing and improve the reliability of the plasma processing.
  • the duration of the plasma generating state may be about 2 to 100 ⁇ sec per cycle, preferably about 2 to 50 ⁇ sec per cycle. Meanwhile, the duration of the no-plasma generating state may be greater than or equal to about 2 ⁇ sec per cycle.
  • the first RF power may have a frequency of about 30 to 300 MHz.
  • the first RF power supply unit may apply the first RF power to the first electrode.
  • the plasma processing apparatus may further include a second RF power supply unit for applying to at least one of the first electrode and the second electrode a second RF power for attracting ions in the plasma to the target object.
  • the second RF power supply unit may apply the second RF power to the first electrode.
  • a storage medium storing a computer-executable control program for controlling a plasma processing apparatus including: an evacuable processing chamber; a first electrode for mounting thereon a target object in the processing chamber; a second electrode facing the first electrode in parallel in the processing chamber; a processing gas supply unit for supplying desired processing gas to a processing space between the first electrode and the second electrode; and a first RF power supply unit for applying to at least one of the first and the second electrode a first RF power for generating a plasma from the processing gas, wherein, when executed, the control program controls the plasma processing apparatus to perform the plasma processing method of the third and the fourth aspect of the present invention.
  • the plasma processing method and the storage medium storing a control program for executing the plasma processing method of the present invention enable to prevent charging damage effectively to improve stability and reliability of plasma processing and to enhance the in-plane uniformity in the plasma processing.
  • FIG. 1 is a vertical cross sectional view showing a configuration of a plasma processing apparatus in accordance with an embodiment of the present invention
  • FIG. 2 depicts characteristics of RF power with respect to time in pulse plasma
  • FIG. 3 illustrates a waveform of a first RF power in the pulse plasma of FIG. 2 ;
  • FIG. 4 describes an optimal range of a plasma generating period A and a no-plasma generating period B;
  • FIG. 5 provides a schematic view of a device structure for testing resistance to charging damage
  • FIGS. 6A to 6C depict comparison of occurrence of charging damage between a conventional case (comparative example) and the present invention.
  • FIGS. 7A to 7C show comparison of occurrence of charging damage between a conventional case (comparative example) and the present invention.
  • FIG. 1 shows a configuration of a plasma processing apparatus in accordance with an embodiment of the present invention.
  • the plasma processing apparatus is configured as a capacitively coupled (parallel plate type) plasma etching apparatus wherein dual RF frequency powers are applied to a lower electrode, and has a cylindrical chamber (processing chamber) 10 made of a metal such as aluminum, stainless steel or the like.
  • the chamber 10 is frame grounded.
  • the susceptor 12 is made of, e.g., aluminum, and is supported by a cylindrical support 16 vertically extended from a bottom of the chamber 10 via an cylindrical insulating member 14 .
  • an annular focus ring 18 made of, e.g., quartz or silicon, surrounds the top surface of the susceptor 12 .
  • a gas exhaust path 20 is formed between an inner wall of the chamber 10 and the cylindrical support 16 .
  • An annular baffle plate 22 is disposed at the entrance or in the middle of the gas exhaust path 20 and, also, a gas exhaust port 24 is provided at a bottom portion of the gas exhaust path 20 .
  • a gas exhaust unit 28 is connected to the gas exhaust port 24 via a gas exhaust line 26 .
  • the gas exhaust unit 28 has a vacuum pump, so that a processing space in the chamber 10 can be depressurized to a desired vacuum level.
  • Attached to a sidewall of the chamber 10 is a gate valve 26 for opening and closing a loading/unloading port for the semiconductor wafer W.
  • a first radio frequency (RF) power supply 32 for plasma generation is electrically connected to the susceptor 12 via a first matching unit (MU) 34 and a power feed rod 36 .
  • the first RF power supply 32 applies a predetermined first RF power of, e.g., 100 MHz, to the lower electrode, i.e., the susceptor 12 .
  • a shower head 38 to be described later as an upper electrode of a ground potential is installed in a ceiling portion of the chamber 10 . Accordingly, the first RF power from the first RF power supply 32 is applied between the susceptor 12 and the shower head 38 .
  • a second RF power supply 70 for ion attraction is electrically connected to the susceptor 12 via a second matching unit (MU) 72 and a power feed rod 36 .
  • the second RF power supply 70 applies a predetermined second RF power of, e.g., 3.2 MHz, to the susceptor 12 .
  • the electrostatic chuck 40 Disposed on the top surface of the susceptor 12 is an electrostatic chuck 40 for supporting the semiconductor wafer W by an electrostatic attractive force.
  • the electrostatic chuck 40 includes an electrode 40 a made of a conductive film embedded between a pair of insulating films 40 b and 40 c .
  • a DC power supply 42 is electrically connected to the electrode 40 a via a switch 43 . By a Coulomb force generated by a DC voltage from the DC power supply 42 , the semiconductor wafer W can be attracted and held on the chuck.
  • a coolant passageway 44 Installed in the susceptor 12 is a coolant passageway 44 extended in, e.g., a circumferential direction.
  • a coolant of a predetermined temperature e.g., cooling water
  • the processing temperature of the semiconductor wafer W on the electrostatic chuck 40 can be controlled by the temperature of the coolant.
  • a heat transfer gas e.g., He gas
  • a heat transfer gas supply unit 52 is supplied between the top surface of the electrostatic chuck 40 and the backside of the semiconductor wafer W via a gas supply line 54 .
  • the shower head 38 on the ceiling portion includes an electrode plate 56 having a plurality of gas vent-holes 56 a in the bottom surface and an electrode supporting member 58 for detachably holding the electrode plate 56 .
  • a buffer space 60 is provided in the electrode supporting member 58 , and a gas supply line 64 extending from a processing gas supply unit 62 is connected to a gas inlet opening 60 a of the buffer space 60 .
  • a magnet 66 is annually or concentrically disposed around the chamber 10 .
  • a vertical RF electric field is formed by the first RF power supply 32 in the gap between the shower head 38 and the susceptor 12 in the chamber 10 .
  • a high density plasma can be generated around the surface of the susceptor 12 .
  • a controller 68 controls an operation of each unit in the plasma etching apparatus such as the gas exhaust unit 28 , the first RF power supply 32 , the first matching unit 34 , the chiller unit 46 , the heat transfer gas supply unit 52 , the processing gas supply unit 62 , the second RF power supply 70 , the second matching unit 72 and the like.
  • the controller 68 is connected to a host computer (not shown) and the like.
  • the gate valve 30 is opened.
  • a semiconductor wafer W to be processed is loaded into the chamber 10 to be mounted on the electrostatic chuck 40 .
  • an etching gas (generally a gaseous mixture) from the processing gas supply unit 62 is introduced into the chamber 10 at a predetermined flow rate and flow rate ratio, and the pressure in the chamber 10 is set to be a preset value by the gas exhaust unit 28 .
  • the first RF power from the first RF power supply 32 is supplied to the susceptor 12 with a predetermined power and, at the same time, the second RF power from the second RF power supply 70 is supplied to the susceptor 12 with a predetermined power.
  • a DC voltage from the DC power supply 42 is applied to the electrode 40 a of the electrostatic chuck 40 , thus holding the semiconductor wafer W on the electrostatic chuck 40 .
  • the etching gas injected from the shower head 38 is converted to a plasma between both electrodes 12 and 38 by the first RF discharge, and the main surface of the semiconductor wafer W is etched by radicals or ions generated by the plasma.
  • the susceptor (lower electrode) 12 by applying the first RF power having a radio frequency (30 MHz or higher) higher than the conventional frequency from the first RF power supply 42 to the susceptor (lower electrode) 12 , a high-density plasma in a desirable dissociated state can be generated even at a lower pressure.
  • the increase of the plasma density leads to the low ion energy, i.e., the decrease of the sheath potential (voltage) on the semiconductor wafer W (the low bias).
  • the bias is reduced compared to the conventional case, the effect of the charging damage (dielectric breakdown) cannot be ignored.
  • the charging damage occurs when the amount of charges introduced from the plasma to the semiconductor wafer W exceeds the threshold value. The amount of introduced charges is affected by the relative variation of the sheath potential in the surface of the wafer W.
  • a sheath potential is high as several hundreds of voltages.
  • the variation in the sheath potential is relatively small in the wafer surface and, also, the amount of electrons introduced into a gate electrode of the semiconductor wafer W does not exceed the threshold value.
  • the sheath potential is low as several tens of voltages. Therefore, when the in-plane non-uniformity occurs in the plasma potential, the variation in the sheath potential is relatively large and, also, a large amount of electrons are easily introduced into the gate electrode. In addition, the charging damage easily occurs in accordance with the length of time at which the substrate surface is continuously exposed to the plasma.
  • the charge-up may occur in the insulating film (e.g., the gate oxide film) on the substrate by the local unbalance between ions and electrons due to the in-plane non-uniformity of the plasma potential or the profile of the circuit pattern.
  • the insulating film where the charge-up occurs, an electric field or a potential gradient in proportion to the amount of accumulated charges is established. If the amount of the accumulated charge exceeds the threshold value, the insulating film is damaged or destroyed in corresponding locations.
  • the plasma generating state and the no-plasma generating state are alternately repeated at predetermined intervals so that the amount of charges introduced into the gate electrode or the amount of charges accumulated on the insulating film does not exceed the threshold value.
  • the continuous plasma generation is performed for a short period of time at which the amount of introduced charges or the accumulated charges does not exceed the threshold value and, then, no-plasma generating state is set. Further, the plasma generating state and the plasma non-generating state are repeated intermittently.
  • the first RF power supply 32 and the first matching unit 34 are controlled by the control unit 68 so that a first phase at which a first RF power has a peak value or a first amplitude at which a plasma is generated (i.e., an effective power) and a second phase at which the first RF power has a peak value or a second amplitude at which no plasma is generated (i.e., an ineffective power) can be alternately repeated at predetermined intervals.
  • the present invention includes the case where the second amplitude is zero (i.e., the first RF power is not applied).
  • the first RF power outputted from the first RF power supply 32 is modulated and applied to the susceptor 12 .
  • power modulation there can be employed a pulse modulation shown in FIG. 2 .
  • a period A indicates the plasma generating state
  • a period B represents the no-plasma generating state.
  • the first RF power having a first amplitude of about 500 W is applied to the RF electrode 12 .
  • the first RF power has a second amplitude of 0 W. That is, the first RF power is alternately ON and OFF, generating a pulse plasma in the chamber 10 .
  • the first RF has a waveform shown in FIG. 3 .
  • the second amplitude in the no-plasma generating state is not limited to 0 W, and may be a power level at which substantially no plasma is generated.
  • the first amplitude in the plasma generating state is not limited to 500 W, and may be set between about 100 W and about 2000 W depending on the processing conditions.
  • the duration of the plasma generating period A and the no-plasma generating period B so that the amount of charges introduced to the gate electrode or the amount of charges accumulated on the gate oxide film does not exceed the threshold value.
  • FIG. 4 illustrates desirable ranges of the plasma generating period A and the no-plasma generating period B in the case of applying the first RF power in a pulse shape as shown in FIG. 2 (the first amplitude of about 500 W and the second amplitude of 0 W).
  • the plasma generating period A is longer than or equal to about 2 ⁇ sec or shorter than or equal to about 100 ⁇ sec, and also that the plasma non-generating period B is longer than or equal to about 2 ⁇ sec. Further, it is more preferable that the plasma generating period A is longer than or equal to about 2 ⁇ sec or shorter than or equal to about 50 ⁇ sec.
  • the plasma generating period A is longer than about 100 ⁇ sec, the amount of introduced charges or the amount of accumulated charges exceeds the threshold value, and the charging damage occurs. Meanwhile, when the plasma generating period A is shorter than about 2 ⁇ sec, the plasma is generated unstably and, also, the efficiency of the plasma processing deteriorates.
  • the no-plasma generating period B When the no-plasma generating period B is shorter than about 2 ⁇ sec, the plasma cannot be completely extinguished, which leads to a case similar to one where only the plasma generating period A is continued, i.e., the same case as the conventional plasma processing in which a plasma is continuously generated for a long period of time, so that the charging damage easily occurs. Even if the no-plasma generating period B is lengthened, the etching result is not affected.
  • the plasma generating period A and the no-plasma generating period B are repeated at predetermined intervals. Therefore, the total etching time from start to end of the etching process becomes longer compared to the case of performing etching while maintaining the plasma generating state all the time.
  • it is required to increase a duty ratio of the pulse plasma i.e., (the plasma generating period A)/ ⁇ (the plasma generating period A)+(the no-plasma generating period B) ⁇ . Accordingly, in view of increasing the etching efficiency, it is preferable to shorten the no-plasma generating period B although the upper limit of the plasma non-generating period B is not particularly defined in view of the etching result.
  • the maximum length of the plasma generating period A and the minimum length of the no-plasma generating period B are about 100 ⁇ sec and about 2 p sec, respectively. Therefore, the maximum duty ratio at which the best etching efficiency is obtained is about 98%. Meanwhile, the minimum duty ratio is preferably about 50% in view of the etching efficiency. In other words, it is preferable that the plasma generating period A is equal to the no-plasma generating period B.
  • the maximum duty ratio of 98% means that the etching time is reduced by 2% compared to the case where the etching is performed while continuously maintaining the plasma generating state from start to end of the processing. Accordingly, it is possible to reliably prevent the charging damage while obtaining the etching efficiency substantially same as that of the conventional plasma processing.
  • the frequency of the power modulation i.e., the frequency of the pulse plasma
  • the frequency of the power modulation is about 5 to 250 kHz.
  • the minimum length of the plasma generating period A and that of the no-plasma generating period B are about 2 ⁇ sec. Accordingly, the shortest cycle is about 4 ⁇ sec, and the frequency at this time is set to about 250 kHz. Further, the maximum length of the plasma generating period A and that of the no-plasma generating period B are about 100 ⁇ sec. Therefore, the longest cycle is about 200 ⁇ sec, and the frequency at this time is set to about 5 kHz.
  • the SiO 2 film 76 and a polysilicon film 78 are formed on a Si substrate 74 in that order, the SiO 2 film 76 including a gate oxide film corresponding portion 76 a having a thickness of about 4 nm and a device isolation region 76 b having a thickness of about 500 nm.
  • a plurality of such devices are formed on the wafer in a matrix cell array.
  • the area C of the device isolation region 76 b is set to be 10,000 or 100,000 times greater than the area D of the gate oxide film corresponding portion 76 a , and the charging damage readily occurs as in a conventional stress test.
  • a wafer having a diameter of 300 mm was used as for a wafer.
  • the plasma processing was performed by using the apparatus shown in FIG. 1 . At this time, the wafer was exposed to the plasma under the following conditions.
  • Processing gas O 2 gas
  • Processing time 100 seconds.
  • the second RF power output from the second RF power supply 70 was not used (applied). At this time, a leakage current of each device was measured. When the leakage current was greater than or equal to about 1 ⁇ 10 ⁇ 9 ⁇ / ⁇ m 2 , it was considered that the dielectric breakdown has occurred. On the contrary, when the leakage current was smaller than that, it was considered that the dielectric breakdown has not occurred.
  • FIGS. 6A to 6C and 7 A to 7 C show the test results.
  • FIGS. 6A to 6C show the case where the area C of the device isolation region 76 b is 100,000 times larger than that of the gate oxide film corresponding portion 76 a
  • FIGS. 7A to 7C show the case where the area C of the device isolation region 76 b is 10,000 times larger than that of the gate oxide film corresponding portion 76 a
  • FIGS. 6A and 7A illustrate the wafers exposed to the conventional continuous plasma; FIGS.
  • FIGS. 6B and 7B illustrate the wafers exposed to the pulse plasma under the conditions of the plasma generating period A of about 40 ⁇ sec, the duty ratio of about 20% and the modulation frequency (pulse frequency) of about 5 kHz; and FIGS. 6C and 7C illustrate the wafers exposed to the pulse plasma under the conditions of the plasma generating period A of about 5 ⁇ sec, the duty ratio of about 50% and the modulation frequency of about 100 kHz.
  • a white region indicates a region where dielectric breakdown has not occurred, and a black region represents a region where dielectric breakdown has occurred.
  • the production yield after the plasma generating period of about 40 ⁇ sec, and the production yield obtained after the plasma generating period of about 5 ⁇ sec were about 100 W. Further, the charging damage did not occur in any location in the wafer surface.
  • the plasma generated by the first RF power outputted from the first RF power supply 32 has a higher density distribution at the central portion of the wafer and a lower density distribution at the peripheral portion of the wafer.
  • a wafer having a diameter of 300 mm was used and an organic film on the wafer was etched.
  • the plasma etching was carried out by using the plasma processing apparatus shown in FIG. 1 under the following conditions:
  • Second RF power 200 W
  • Processing time 30 seconds.
  • the plasma generating period A by using the first RF power was set to 500 ⁇ sec
  • the first RF power in the plasma generating period A was set to 1500 W
  • the first RF power in the no-plasma generating period B was set to 0 W
  • the duty ratio was set to 50%
  • the modulation frequency (pulse plasma) was set to 1 kHz.
  • the first RF power was set to 1500 W.
  • any plasma can be used other than the pulse plasma as long as the plasma generating state and the no-plasma generating state are alternately repeated at predetermined intervals.
  • the plasma processing apparatus in the above embodiment is of the type that the first RF power for plasma generation and the second RF power for ion attraction are applied to the susceptor 12 .
  • an apparatus of a type in which an RF power for plasma generation is applied to the upper electrode In that case, an RF power for ion attraction can be applied to the lower electrode.
  • the RF power for plasma generation has a frequency of about 30 MHz to 300 MHz.
  • the present invention can be applied to other various plasma processing apparatuses for performing plasma CVD, plasma oxidation, plasma nitriding, sputtering and the like.
  • the target object in the present invention is not limited to the semiconductor wafer, but may be one of various substrates for a flat panel display, a photo mask, a CD substrate, a printed circuit board or the like.

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Plasma & Fusion (AREA)
  • Chemical & Material Sciences (AREA)
  • Analytical Chemistry (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Plasma Technology (AREA)
  • Drying Of Semiconductors (AREA)
  • Physical Vapour Deposition (AREA)
  • Chemical Vapour Deposition (AREA)
US12/192,388 2007-08-17 2008-08-15 Plasma processing apparatus, plasma processing method and storage medium Abandoned US20090047795A1 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
US12/192,388 US20090047795A1 (en) 2007-08-17 2008-08-15 Plasma processing apparatus, plasma processing method and storage medium
US13/737,313 US8703002B2 (en) 2007-08-17 2013-01-09 Plasma processing apparatus, plasma processing method and storage medium

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP2007213170 2007-08-17
JP2007-213170 2007-08-17
US99180307P 2007-12-03 2007-12-03
US12/192,388 US20090047795A1 (en) 2007-08-17 2008-08-15 Plasma processing apparatus, plasma processing method and storage medium

Related Child Applications (1)

Application Number Title Priority Date Filing Date
US13/737,313 Division US8703002B2 (en) 2007-08-17 2013-01-09 Plasma processing apparatus, plasma processing method and storage medium

Publications (1)

Publication Number Publication Date
US20090047795A1 true US20090047795A1 (en) 2009-02-19

Family

ID=40111040

Family Applications (2)

Application Number Title Priority Date Filing Date
US12/192,388 Abandoned US20090047795A1 (en) 2007-08-17 2008-08-15 Plasma processing apparatus, plasma processing method and storage medium
US13/737,313 Active US8703002B2 (en) 2007-08-17 2013-01-09 Plasma processing apparatus, plasma processing method and storage medium

Family Applications After (1)

Application Number Title Priority Date Filing Date
US13/737,313 Active US8703002B2 (en) 2007-08-17 2013-01-09 Plasma processing apparatus, plasma processing method and storage medium

Country Status (6)

Country Link
US (2) US20090047795A1 (zh)
EP (1) EP2026374B1 (zh)
JP (2) JP5514413B2 (zh)
KR (2) KR101181023B1 (zh)
CN (2) CN104810272A (zh)
TW (1) TWI460786B (zh)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102299068A (zh) * 2010-06-23 2011-12-28 东京毅力科创株式会社 基板处理方法
US20120289049A1 (en) * 2011-05-10 2012-11-15 Applied Materials, Inc. Copper oxide removal techniques
US20130126486A1 (en) * 2011-11-22 2013-05-23 Ryan Bise Multi Zone Gas Injection Upper Electrode System
CN103247511A (zh) * 2012-02-14 2013-08-14 东京毅力科创株式会社 基板处理装置
US20140346040A1 (en) * 2012-01-18 2014-11-27 Tokyo Electron Limited Substrate processing apparatus
US20160247666A1 (en) * 2015-02-23 2016-08-25 Tokyo Electron Limited Plasma processing method and plasma processing apparatus
WO2019118601A1 (en) * 2017-12-13 2019-06-20 Applied Materials, Inc. Spatial atomic layer deposition chamber with plasma pulsing to prevent charge damage
US11594400B2 (en) * 2011-11-23 2023-02-28 Lam Research Corporation Multi zone gas injection upper electrode system

Families Citing this family (251)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101322539B1 (ko) * 2009-08-07 2013-10-28 가부시끼가이샤교산세이사꾸쇼 펄스 변조 고주파 전력 제어 방법 및 펄스 변조 고주파 전원 장치
KR101123004B1 (ko) * 2009-09-18 2012-03-12 주성엔지니어링(주) 플라즈마 처리 장치
US20130023129A1 (en) 2011-07-20 2013-01-24 Asm America, Inc. Pressure transmitter for a semiconductor processing environment
JP5977509B2 (ja) 2011-12-09 2016-08-24 東京エレクトロン株式会社 プラズマ処理方法及びプラズマ処理装置
JP5867701B2 (ja) 2011-12-15 2016-02-24 東京エレクトロン株式会社 プラズマ処理装置
JP5808012B2 (ja) 2011-12-27 2015-11-10 東京エレクトロン株式会社 プラズマ処理装置
US10714315B2 (en) 2012-10-12 2020-07-14 Asm Ip Holdings B.V. Semiconductor reaction chamber showerhead
US20160376700A1 (en) 2013-02-01 2016-12-29 Asm Ip Holding B.V. System for treatment of deposition reactor
US9401263B2 (en) * 2013-09-19 2016-07-26 Globalfoundries Inc. Feature etching using varying supply of power pulses
US11015245B2 (en) 2014-03-19 2021-05-25 Asm Ip Holding B.V. Gas-phase reactor and system having exhaust plenum and components thereof
US10941490B2 (en) 2014-10-07 2021-03-09 Asm Ip Holding B.V. Multiple temperature range susceptor, assembly, reactor and system including the susceptor, and methods of using the same
JP6410592B2 (ja) * 2014-12-18 2018-10-24 東京エレクトロン株式会社 プラズマエッチング方法
JP6698033B2 (ja) * 2014-12-25 2020-05-27 東京エレクトロン株式会社 プラズマ処理装置およびプラズマ処理方法
US10276355B2 (en) 2015-03-12 2019-04-30 Asm Ip Holding B.V. Multi-zone reactor, system including the reactor, and method of using the same
US10458018B2 (en) 2015-06-26 2019-10-29 Asm Ip Holding B.V. Structures including metal carbide material, devices including the structures, and methods of forming same
WO2017018077A1 (ja) * 2015-07-24 2017-02-02 株式会社ユーテック スパッタリング装置、膜の製造方法、SrRuO3-σ膜、強誘電体セラミックス及びその製造方法
JPWO2017018078A1 (ja) * 2015-07-24 2018-06-14 株式会社ユーテック スパッタリング装置及び絶縁膜の製造方法
US10211308B2 (en) 2015-10-21 2019-02-19 Asm Ip Holding B.V. NbMC layers
JP6498152B2 (ja) * 2015-12-18 2019-04-10 東京エレクトロン株式会社 エッチング方法
US11139308B2 (en) 2015-12-29 2021-10-05 Asm Ip Holding B.V. Atomic layer deposition of III-V compounds to form V-NAND devices
US10529554B2 (en) 2016-02-19 2020-01-07 Asm Ip Holding B.V. Method for forming silicon nitride film selectively on sidewalls or flat surfaces of trenches
US10367080B2 (en) 2016-05-02 2019-07-30 Asm Ip Holding B.V. Method of forming a germanium oxynitride film
US11453943B2 (en) 2016-05-25 2022-09-27 Asm Ip Holding B.V. Method for forming carbon-containing silicon/metal oxide or nitride film by ALD using silicon precursor and hydrocarbon precursor
US9859151B1 (en) 2016-07-08 2018-01-02 Asm Ip Holding B.V. Selective film deposition method to form air gaps
US10612137B2 (en) 2016-07-08 2020-04-07 Asm Ip Holdings B.V. Organic reactants for atomic layer deposition
KR102532607B1 (ko) 2016-07-28 2023-05-15 에이에스엠 아이피 홀딩 비.브이. 기판 가공 장치 및 그 동작 방법
US9887082B1 (en) 2016-07-28 2018-02-06 Asm Ip Holding B.V. Method and apparatus for filling a gap
US9812320B1 (en) 2016-07-28 2017-11-07 Asm Ip Holding B.V. Method and apparatus for filling a gap
JP6770868B2 (ja) * 2016-10-26 2020-10-21 東京エレクトロン株式会社 プラズマ処理装置のインピーダンス整合のための方法
US11532757B2 (en) 2016-10-27 2022-12-20 Asm Ip Holding B.V. Deposition of charge trapping layers
US10714350B2 (en) 2016-11-01 2020-07-14 ASM IP Holdings, B.V. Methods for forming a transition metal niobium nitride film on a substrate by atomic layer deposition and related semiconductor device structures
KR102546317B1 (ko) 2016-11-15 2023-06-21 에이에스엠 아이피 홀딩 비.브이. 기체 공급 유닛 및 이를 포함하는 기판 처리 장치
JP6697372B2 (ja) 2016-11-21 2020-05-20 キオクシア株式会社 ドライエッチング方法及び半導体装置の製造方法
KR20180068582A (ko) 2016-12-14 2018-06-22 에이에스엠 아이피 홀딩 비.브이. 기판 처리 장치
US11581186B2 (en) 2016-12-15 2023-02-14 Asm Ip Holding B.V. Sequential infiltration synthesis apparatus
US11447861B2 (en) 2016-12-15 2022-09-20 Asm Ip Holding B.V. Sequential infiltration synthesis apparatus and a method of forming a patterned structure
KR102700194B1 (ko) 2016-12-19 2024-08-28 에이에스엠 아이피 홀딩 비.브이. 기판 처리 장치
US10269558B2 (en) 2016-12-22 2019-04-23 Asm Ip Holding B.V. Method of forming a structure on a substrate
US11390950B2 (en) 2017-01-10 2022-07-19 Asm Ip Holding B.V. Reactor system and method to reduce residue buildup during a film deposition process
US10468261B2 (en) 2017-02-15 2019-11-05 Asm Ip Holding B.V. Methods for forming a metallic film on a substrate by cyclical deposition and related semiconductor device structures
US10529563B2 (en) 2017-03-29 2020-01-07 Asm Ip Holdings B.V. Method for forming doped metal oxide films on a substrate by cyclical deposition and related semiconductor device structures
US10770286B2 (en) 2017-05-08 2020-09-08 Asm Ip Holdings B.V. Methods for selectively forming a silicon nitride film on a substrate and related semiconductor device structures
US12040200B2 (en) 2017-06-20 2024-07-16 Asm Ip Holding B.V. Semiconductor processing apparatus and methods for calibrating a semiconductor processing apparatus
US11306395B2 (en) 2017-06-28 2022-04-19 Asm Ip Holding B.V. Methods for depositing a transition metal nitride film on a substrate by atomic layer deposition and related deposition apparatus
KR20190009245A (ko) 2017-07-18 2019-01-28 에이에스엠 아이피 홀딩 비.브이. 반도체 소자 구조물 형성 방법 및 관련된 반도체 소자 구조물
US11374112B2 (en) 2017-07-19 2022-06-28 Asm Ip Holding B.V. Method for depositing a group IV semiconductor and related semiconductor device structures
US11018002B2 (en) 2017-07-19 2021-05-25 Asm Ip Holding B.V. Method for selectively depositing a Group IV semiconductor and related semiconductor device structures
US10541333B2 (en) 2017-07-19 2020-01-21 Asm Ip Holding B.V. Method for depositing a group IV semiconductor and related semiconductor device structures
US10590535B2 (en) 2017-07-26 2020-03-17 Asm Ip Holdings B.V. Chemical treatment, deposition and/or infiltration apparatus and method for using the same
US10770336B2 (en) 2017-08-08 2020-09-08 Asm Ip Holding B.V. Substrate lift mechanism and reactor including same
US10692741B2 (en) 2017-08-08 2020-06-23 Asm Ip Holdings B.V. Radiation shield
US11139191B2 (en) 2017-08-09 2021-10-05 Asm Ip Holding B.V. Storage apparatus for storing cassettes for substrates and processing apparatus equipped therewith
US11769682B2 (en) 2017-08-09 2023-09-26 Asm Ip Holding B.V. Storage apparatus for storing cassettes for substrates and processing apparatus equipped therewith
US11830730B2 (en) 2017-08-29 2023-11-28 Asm Ip Holding B.V. Layer forming method and apparatus
KR102491945B1 (ko) 2017-08-30 2023-01-26 에이에스엠 아이피 홀딩 비.브이. 기판 처리 장치
US11295980B2 (en) 2017-08-30 2022-04-05 Asm Ip Holding B.V. Methods for depositing a molybdenum metal film over a dielectric surface of a substrate by a cyclical deposition process and related semiconductor device structures
US11056344B2 (en) 2017-08-30 2021-07-06 Asm Ip Holding B.V. Layer forming method
US10658205B2 (en) 2017-09-28 2020-05-19 Asm Ip Holdings B.V. Chemical dispensing apparatus and methods for dispensing a chemical to a reaction chamber
US10403504B2 (en) 2017-10-05 2019-09-03 Asm Ip Holding B.V. Method for selectively depositing a metallic film on a substrate
JP2019073743A (ja) * 2017-10-12 2019-05-16 アドバンストマテリアルテクノロジーズ株式会社 成膜装置及び成膜方法
US10923344B2 (en) 2017-10-30 2021-02-16 Asm Ip Holding B.V. Methods for forming a semiconductor structure and related semiconductor structures
US11022879B2 (en) 2017-11-24 2021-06-01 Asm Ip Holding B.V. Method of forming an enhanced unexposed photoresist layer
CN111344522B (zh) 2017-11-27 2022-04-12 阿斯莫Ip控股公司 包括洁净迷你环境的装置
KR102597978B1 (ko) 2017-11-27 2023-11-06 에이에스엠 아이피 홀딩 비.브이. 배치 퍼니스와 함께 사용하기 위한 웨이퍼 카세트를 보관하기 위한 보관 장치
CN110004424B (zh) * 2018-01-05 2020-12-22 友威科技股份有限公司 连续式的镀膜装置
US10872771B2 (en) 2018-01-16 2020-12-22 Asm Ip Holding B. V. Method for depositing a material film on a substrate within a reaction chamber by a cyclical deposition process and related device structures
CN111630203A (zh) 2018-01-19 2020-09-04 Asm Ip私人控股有限公司 通过等离子体辅助沉积来沉积间隙填充层的方法
TWI799494B (zh) 2018-01-19 2023-04-21 荷蘭商Asm 智慧財產控股公司 沈積方法
US11081345B2 (en) 2018-02-06 2021-08-03 Asm Ip Holding B.V. Method of post-deposition treatment for silicon oxide film
US10896820B2 (en) 2018-02-14 2021-01-19 Asm Ip Holding B.V. Method for depositing a ruthenium-containing film on a substrate by a cyclical deposition process
US11685991B2 (en) 2018-02-14 2023-06-27 Asm Ip Holding B.V. Method for depositing a ruthenium-containing film on a substrate by a cyclical deposition process
KR102636427B1 (ko) 2018-02-20 2024-02-13 에이에스엠 아이피 홀딩 비.브이. 기판 처리 방법 및 장치
US10975470B2 (en) 2018-02-23 2021-04-13 Asm Ip Holding B.V. Apparatus for detecting or monitoring for a chemical precursor in a high temperature environment
US11473195B2 (en) 2018-03-01 2022-10-18 Asm Ip Holding B.V. Semiconductor processing apparatus and a method for processing a substrate
US11629406B2 (en) 2018-03-09 2023-04-18 Asm Ip Holding B.V. Semiconductor processing apparatus comprising one or more pyrometers for measuring a temperature of a substrate during transfer of the substrate
US11114283B2 (en) 2018-03-16 2021-09-07 Asm Ip Holding B.V. Reactor, system including the reactor, and methods of manufacturing and using same
KR102646467B1 (ko) 2018-03-27 2024-03-11 에이에스엠 아이피 홀딩 비.브이. 기판 상에 전극을 형성하는 방법 및 전극을 포함하는 반도체 소자 구조
US11088002B2 (en) 2018-03-29 2021-08-10 Asm Ip Holding B.V. Substrate rack and a substrate processing system and method
US11230766B2 (en) 2018-03-29 2022-01-25 Asm Ip Holding B.V. Substrate processing apparatus and method
TWI811348B (zh) 2018-05-08 2023-08-11 荷蘭商Asm 智慧財產控股公司 藉由循環沉積製程於基板上沉積氧化物膜之方法及相關裝置結構
US12025484B2 (en) 2018-05-08 2024-07-02 Asm Ip Holding B.V. Thin film forming method
KR102596988B1 (ko) 2018-05-28 2023-10-31 에이에스엠 아이피 홀딩 비.브이. 기판 처리 방법 및 그에 의해 제조된 장치
TWI840362B (zh) 2018-06-04 2024-05-01 荷蘭商Asm Ip私人控股有限公司 水氣降低的晶圓處置腔室
US11718913B2 (en) 2018-06-04 2023-08-08 Asm Ip Holding B.V. Gas distribution system and reactor system including same
US11286562B2 (en) 2018-06-08 2022-03-29 Asm Ip Holding B.V. Gas-phase chemical reactor and method of using same
KR102568797B1 (ko) 2018-06-21 2023-08-21 에이에스엠 아이피 홀딩 비.브이. 기판 처리 시스템
US10797133B2 (en) 2018-06-21 2020-10-06 Asm Ip Holding B.V. Method for depositing a phosphorus doped silicon arsenide film and related semiconductor device structures
JP7175239B2 (ja) * 2018-06-22 2022-11-18 東京エレクトロン株式会社 制御方法、プラズマ処理装置、プログラム及び記憶媒体
JP6846387B2 (ja) * 2018-06-22 2021-03-24 東京エレクトロン株式会社 プラズマ処理方法及びプラズマ処理装置
JP2021529254A (ja) 2018-06-27 2021-10-28 エーエスエム・アイピー・ホールディング・ベー・フェー 金属含有材料ならびに金属含有材料を含む膜および構造体を形成するための周期的堆積方法
TWI815915B (zh) 2018-06-27 2023-09-21 荷蘭商Asm Ip私人控股有限公司 用於形成含金屬材料及包含含金屬材料的膜及結構之循環沉積方法
US10612136B2 (en) 2018-06-29 2020-04-07 ASM IP Holding, B.V. Temperature-controlled flange and reactor system including same
KR102686758B1 (ko) 2018-06-29 2024-07-18 에이에스엠 아이피 홀딩 비.브이. 박막 증착 방법 및 반도체 장치의 제조 방법
US10755922B2 (en) 2018-07-03 2020-08-25 Asm Ip Holding B.V. Method for depositing silicon-free carbon-containing film as gap-fill layer by pulse plasma-assisted deposition
US10388513B1 (en) 2018-07-03 2019-08-20 Asm Ip Holding B.V. Method for depositing silicon-free carbon-containing film as gap-fill layer by pulse plasma-assisted deposition
US11053591B2 (en) 2018-08-06 2021-07-06 Asm Ip Holding B.V. Multi-port gas injection system and reactor system including same
US11430674B2 (en) 2018-08-22 2022-08-30 Asm Ip Holding B.V. Sensor array, apparatus for dispensing a vapor phase reactant to a reaction chamber and related methods
US11024523B2 (en) 2018-09-11 2021-06-01 Asm Ip Holding B.V. Substrate processing apparatus and method
KR102707956B1 (ko) 2018-09-11 2024-09-19 에이에스엠 아이피 홀딩 비.브이. 박막 증착 방법
US11049751B2 (en) 2018-09-14 2021-06-29 Asm Ip Holding B.V. Cassette supply system to store and handle cassettes and processing apparatus equipped therewith
KR20200038184A (ko) 2018-10-01 2020-04-10 에이에스엠 아이피 홀딩 비.브이. 기판 유지 장치, 장치를 포함하는 시스템, 및 이를 이용하는 방법
US11232963B2 (en) 2018-10-03 2022-01-25 Asm Ip Holding B.V. Substrate processing apparatus and method
KR102592699B1 (ko) 2018-10-08 2023-10-23 에이에스엠 아이피 홀딩 비.브이. 기판 지지 유닛 및 이를 포함하는 박막 증착 장치와 기판 처리 장치
KR102546322B1 (ko) 2018-10-19 2023-06-21 에이에스엠 아이피 홀딩 비.브이. 기판 처리 장치 및 기판 처리 방법
KR102605121B1 (ko) 2018-10-19 2023-11-23 에이에스엠 아이피 홀딩 비.브이. 기판 처리 장치 및 기판 처리 방법
USD948463S1 (en) 2018-10-24 2022-04-12 Asm Ip Holding B.V. Susceptor for semiconductor substrate supporting apparatus
US11087997B2 (en) 2018-10-31 2021-08-10 Asm Ip Holding B.V. Substrate processing apparatus for processing substrates
KR20200051105A (ko) 2018-11-02 2020-05-13 에이에스엠 아이피 홀딩 비.브이. 기판 지지 유닛 및 이를 포함하는 기판 처리 장치
US11572620B2 (en) 2018-11-06 2023-02-07 Asm Ip Holding B.V. Methods for selectively depositing an amorphous silicon film on a substrate
US11031242B2 (en) 2018-11-07 2021-06-08 Asm Ip Holding B.V. Methods for depositing a boron doped silicon germanium film
US10818758B2 (en) 2018-11-16 2020-10-27 Asm Ip Holding B.V. Methods for forming a metal silicate film on a substrate in a reaction chamber and related semiconductor device structures
US10847366B2 (en) 2018-11-16 2020-11-24 Asm Ip Holding B.V. Methods for depositing a transition metal chalcogenide film on a substrate by a cyclical deposition process
US12040199B2 (en) 2018-11-28 2024-07-16 Asm Ip Holding B.V. Substrate processing apparatus for processing substrates
US11217444B2 (en) 2018-11-30 2022-01-04 Asm Ip Holding B.V. Method for forming an ultraviolet radiation responsive metal oxide-containing film
KR102636428B1 (ko) 2018-12-04 2024-02-13 에이에스엠 아이피 홀딩 비.브이. 기판 처리 장치를 세정하는 방법
US11158513B2 (en) 2018-12-13 2021-10-26 Asm Ip Holding B.V. Methods for forming a rhenium-containing film on a substrate by a cyclical deposition process and related semiconductor device structures
TW202037745A (zh) 2018-12-14 2020-10-16 荷蘭商Asm Ip私人控股有限公司 形成裝置結構之方法、其所形成之結構及施行其之系統
TW202405220A (zh) 2019-01-17 2024-02-01 荷蘭商Asm Ip 私人控股有限公司 藉由循環沈積製程於基板上形成含過渡金屬膜之方法
KR20200091543A (ko) 2019-01-22 2020-07-31 에이에스엠 아이피 홀딩 비.브이. 기판 처리 장치
CN111524788B (zh) 2019-02-01 2023-11-24 Asm Ip私人控股有限公司 氧化硅的拓扑选择性膜形成的方法
KR102626263B1 (ko) 2019-02-20 2024-01-16 에이에스엠 아이피 홀딩 비.브이. 처리 단계를 포함하는 주기적 증착 방법 및 이를 위한 장치
TW202044325A (zh) 2019-02-20 2020-12-01 荷蘭商Asm Ip私人控股有限公司 填充一基板之一表面內所形成的一凹槽的方法、根據其所形成之半導體結構、及半導體處理設備
TWI845607B (zh) 2019-02-20 2024-06-21 荷蘭商Asm Ip私人控股有限公司 用來填充形成於基材表面內之凹部的循環沉積方法及設備
US11482533B2 (en) 2019-02-20 2022-10-25 Asm Ip Holding B.V. Apparatus and methods for plug fill deposition in 3-D NAND applications
TWI842826B (zh) 2019-02-22 2024-05-21 荷蘭商Asm Ip私人控股有限公司 基材處理設備及處理基材之方法
KR20200108242A (ko) 2019-03-08 2020-09-17 에이에스엠 아이피 홀딩 비.브이. 실리콘 질화물 층을 선택적으로 증착하는 방법, 및 선택적으로 증착된 실리콘 질화물 층을 포함하는 구조체
KR20200108243A (ko) 2019-03-08 2020-09-17 에이에스엠 아이피 홀딩 비.브이. SiOC 층을 포함한 구조체 및 이의 형성 방법
KR20200108248A (ko) 2019-03-08 2020-09-17 에이에스엠 아이피 홀딩 비.브이. SiOCN 층을 포함한 구조체 및 이의 형성 방법
JP2020167398A (ja) 2019-03-28 2020-10-08 エーエスエム・アイピー・ホールディング・ベー・フェー ドアオープナーおよびドアオープナーが提供される基材処理装置
KR20200116855A (ko) 2019-04-01 2020-10-13 에이에스엠 아이피 홀딩 비.브이. 반도체 소자를 제조하는 방법
US11447864B2 (en) 2019-04-19 2022-09-20 Asm Ip Holding B.V. Layer forming method and apparatus
KR20200125453A (ko) 2019-04-24 2020-11-04 에이에스엠 아이피 홀딩 비.브이. 기상 반응기 시스템 및 이를 사용하는 방법
KR20200130121A (ko) 2019-05-07 2020-11-18 에이에스엠 아이피 홀딩 비.브이. 딥 튜브가 있는 화학물질 공급원 용기
KR20200130118A (ko) 2019-05-07 2020-11-18 에이에스엠 아이피 홀딩 비.브이. 비정질 탄소 중합체 막을 개질하는 방법
KR20200130652A (ko) 2019-05-10 2020-11-19 에이에스엠 아이피 홀딩 비.브이. 표면 상에 재료를 증착하는 방법 및 본 방법에 따라 형성된 구조
JP2020188255A (ja) 2019-05-16 2020-11-19 エーエスエム アイピー ホールディング ビー.ブイ. ウェハボートハンドリング装置、縦型バッチ炉および方法
JP2020188254A (ja) 2019-05-16 2020-11-19 エーエスエム アイピー ホールディング ビー.ブイ. ウェハボートハンドリング装置、縦型バッチ炉および方法
USD975665S1 (en) 2019-05-17 2023-01-17 Asm Ip Holding B.V. Susceptor shaft
USD947913S1 (en) 2019-05-17 2022-04-05 Asm Ip Holding B.V. Susceptor shaft
USD935572S1 (en) 2019-05-24 2021-11-09 Asm Ip Holding B.V. Gas channel plate
USD922229S1 (en) 2019-06-05 2021-06-15 Asm Ip Holding B.V. Device for controlling a temperature of a gas supply unit
KR20200141002A (ko) 2019-06-06 2020-12-17 에이에스엠 아이피 홀딩 비.브이. 배기 가스 분석을 포함한 기상 반응기 시스템을 사용하는 방법
KR20200143254A (ko) 2019-06-11 2020-12-23 에이에스엠 아이피 홀딩 비.브이. 개질 가스를 사용하여 전자 구조를 형성하는 방법, 상기 방법을 수행하기 위한 시스템, 및 상기 방법을 사용하여 형성되는 구조
USD944946S1 (en) 2019-06-14 2022-03-01 Asm Ip Holding B.V. Shower plate
USD931978S1 (en) 2019-06-27 2021-09-28 Asm Ip Holding B.V. Showerhead vacuum transport
KR20210005515A (ko) 2019-07-03 2021-01-14 에이에스엠 아이피 홀딩 비.브이. 기판 처리 장치용 온도 제어 조립체 및 이를 사용하는 방법
JP7499079B2 (ja) 2019-07-09 2024-06-13 エーエスエム・アイピー・ホールディング・ベー・フェー 同軸導波管を用いたプラズマ装置、基板処理方法
CN112216646A (zh) 2019-07-10 2021-01-12 Asm Ip私人控股有限公司 基板支撑组件及包括其的基板处理装置
KR20210010307A (ko) 2019-07-16 2021-01-27 에이에스엠 아이피 홀딩 비.브이. 기판 처리 장치
KR20210010816A (ko) 2019-07-17 2021-01-28 에이에스엠 아이피 홀딩 비.브이. 라디칼 보조 점화 플라즈마 시스템 및 방법
KR20210010820A (ko) 2019-07-17 2021-01-28 에이에스엠 아이피 홀딩 비.브이. 실리콘 게르마늄 구조를 형성하는 방법
US11643724B2 (en) 2019-07-18 2023-05-09 Asm Ip Holding B.V. Method of forming structures using a neutral beam
TWI839544B (zh) 2019-07-19 2024-04-21 荷蘭商Asm Ip私人控股有限公司 形成形貌受控的非晶碳聚合物膜之方法
KR20210010817A (ko) 2019-07-19 2021-01-28 에이에스엠 아이피 홀딩 비.브이. 토폴로지-제어된 비정질 탄소 중합체 막을 형성하는 방법
CN112309843A (zh) 2019-07-29 2021-02-02 Asm Ip私人控股有限公司 实现高掺杂剂掺入的选择性沉积方法
CN112309900A (zh) 2019-07-30 2021-02-02 Asm Ip私人控股有限公司 基板处理设备
CN112309899A (zh) 2019-07-30 2021-02-02 Asm Ip私人控股有限公司 基板处理设备
US11587815B2 (en) 2019-07-31 2023-02-21 Asm Ip Holding B.V. Vertical batch furnace assembly
US11227782B2 (en) 2019-07-31 2022-01-18 Asm Ip Holding B.V. Vertical batch furnace assembly
US11587814B2 (en) 2019-07-31 2023-02-21 Asm Ip Holding B.V. Vertical batch furnace assembly
KR20210018759A (ko) 2019-08-05 2021-02-18 에이에스엠 아이피 홀딩 비.브이. 화학물질 공급원 용기를 위한 액체 레벨 센서
USD965524S1 (en) 2019-08-19 2022-10-04 Asm Ip Holding B.V. Susceptor support
USD965044S1 (en) 2019-08-19 2022-09-27 Asm Ip Holding B.V. Susceptor shaft
JP2021031769A (ja) 2019-08-21 2021-03-01 エーエスエム アイピー ホールディング ビー.ブイ. 成膜原料混合ガス生成装置及び成膜装置
KR20210024423A (ko) 2019-08-22 2021-03-05 에이에스엠 아이피 홀딩 비.브이. 홀을 구비한 구조체를 형성하기 위한 방법
USD979506S1 (en) 2019-08-22 2023-02-28 Asm Ip Holding B.V. Insulator
USD940837S1 (en) 2019-08-22 2022-01-11 Asm Ip Holding B.V. Electrode
USD949319S1 (en) 2019-08-22 2022-04-19 Asm Ip Holding B.V. Exhaust duct
USD930782S1 (en) 2019-08-22 2021-09-14 Asm Ip Holding B.V. Gas distributor
KR20210024420A (ko) 2019-08-23 2021-03-05 에이에스엠 아이피 홀딩 비.브이. 비스(디에틸아미노)실란을 사용하여 peald에 의해 개선된 품질을 갖는 실리콘 산화물 막을 증착하기 위한 방법
US11286558B2 (en) 2019-08-23 2022-03-29 Asm Ip Holding B.V. Methods for depositing a molybdenum nitride film on a surface of a substrate by a cyclical deposition process and related semiconductor device structures including a molybdenum nitride film
KR20210029090A (ko) 2019-09-04 2021-03-15 에이에스엠 아이피 홀딩 비.브이. 희생 캡핑 층을 이용한 선택적 증착 방법
KR20210029663A (ko) 2019-09-05 2021-03-16 에이에스엠 아이피 홀딩 비.브이. 기판 처리 장치
US11562901B2 (en) 2019-09-25 2023-01-24 Asm Ip Holding B.V. Substrate processing method
CN112593212B (zh) 2019-10-02 2023-12-22 Asm Ip私人控股有限公司 通过循环等离子体增强沉积工艺形成拓扑选择性氧化硅膜的方法
TWI846953B (zh) 2019-10-08 2024-07-01 荷蘭商Asm Ip私人控股有限公司 基板處理裝置
KR20210042810A (ko) 2019-10-08 2021-04-20 에이에스엠 아이피 홀딩 비.브이. 활성 종을 이용하기 위한 가스 분배 어셈블리를 포함한 반응기 시스템 및 이를 사용하는 방법
TWI846966B (zh) 2019-10-10 2024-07-01 荷蘭商Asm Ip私人控股有限公司 形成光阻底層之方法及包括光阻底層之結構
US12009241B2 (en) 2019-10-14 2024-06-11 Asm Ip Holding B.V. Vertical batch furnace assembly with detector to detect cassette
TWI834919B (zh) 2019-10-16 2024-03-11 荷蘭商Asm Ip私人控股有限公司 氧化矽之拓撲選擇性膜形成之方法
US11637014B2 (en) 2019-10-17 2023-04-25 Asm Ip Holding B.V. Methods for selective deposition of doped semiconductor material
KR20210047808A (ko) 2019-10-21 2021-04-30 에이에스엠 아이피 홀딩 비.브이. 막을 선택적으로 에칭하기 위한 장치 및 방법
KR20210050453A (ko) 2019-10-25 2021-05-07 에이에스엠 아이피 홀딩 비.브이. 기판 표면 상의 갭 피처를 충진하는 방법 및 이와 관련된 반도체 소자 구조
US11646205B2 (en) 2019-10-29 2023-05-09 Asm Ip Holding B.V. Methods of selectively forming n-type doped material on a surface, systems for selectively forming n-type doped material, and structures formed using same
KR20210054983A (ko) 2019-11-05 2021-05-14 에이에스엠 아이피 홀딩 비.브이. 도핑된 반도체 층을 갖는 구조체 및 이를 형성하기 위한 방법 및 시스템
US11501968B2 (en) 2019-11-15 2022-11-15 Asm Ip Holding B.V. Method for providing a semiconductor device with silicon filled gaps
KR20210062561A (ko) 2019-11-20 2021-05-31 에이에스엠 아이피 홀딩 비.브이. 기판의 표면 상에 탄소 함유 물질을 증착하는 방법, 상기 방법을 사용하여 형성된 구조물, 및 상기 구조물을 형성하기 위한 시스템
CN112951697A (zh) 2019-11-26 2021-06-11 Asm Ip私人控股有限公司 基板处理设备
US11450529B2 (en) 2019-11-26 2022-09-20 Asm Ip Holding B.V. Methods for selectively forming a target film on a substrate comprising a first dielectric surface and a second metallic surface
CN112885692A (zh) 2019-11-29 2021-06-01 Asm Ip私人控股有限公司 基板处理设备
CN112885693A (zh) 2019-11-29 2021-06-01 Asm Ip私人控股有限公司 基板处理设备
JP7527928B2 (ja) 2019-12-02 2024-08-05 エーエスエム・アイピー・ホールディング・ベー・フェー 基板処理装置、基板処理方法
KR20210070898A (ko) 2019-12-04 2021-06-15 에이에스엠 아이피 홀딩 비.브이. 기판 처리 장치
TW202125596A (zh) 2019-12-17 2021-07-01 荷蘭商Asm Ip私人控股有限公司 形成氮化釩層之方法以及包括該氮化釩層之結構
KR20210080214A (ko) 2019-12-19 2021-06-30 에이에스엠 아이피 홀딩 비.브이. 기판 상의 갭 피처를 충진하는 방법 및 이와 관련된 반도체 소자 구조
TW202142733A (zh) 2020-01-06 2021-11-16 荷蘭商Asm Ip私人控股有限公司 反應器系統、抬升銷、及處理方法
JP2021109175A (ja) 2020-01-06 2021-08-02 エーエスエム・アイピー・ホールディング・ベー・フェー ガス供給アセンブリ、その構成要素、およびこれを含む反応器システム
US11993847B2 (en) 2020-01-08 2024-05-28 Asm Ip Holding B.V. Injector
KR102675856B1 (ko) 2020-01-20 2024-06-17 에이에스엠 아이피 홀딩 비.브이. 박막 형성 방법 및 박막 표면 개질 방법
TW202130846A (zh) 2020-02-03 2021-08-16 荷蘭商Asm Ip私人控股有限公司 形成包括釩或銦層的結構之方法
TW202146882A (zh) 2020-02-04 2021-12-16 荷蘭商Asm Ip私人控股有限公司 驗證一物品之方法、用於驗證一物品之設備、及用於驗證一反應室之系統
US11776846B2 (en) 2020-02-07 2023-10-03 Asm Ip Holding B.V. Methods for depositing gap filling fluids and related systems and devices
US11781243B2 (en) 2020-02-17 2023-10-10 Asm Ip Holding B.V. Method for depositing low temperature phosphorous-doped silicon
TW202203344A (zh) 2020-02-28 2022-01-16 荷蘭商Asm Ip控股公司 專用於零件清潔的系統
KR20210116240A (ko) 2020-03-11 2021-09-27 에이에스엠 아이피 홀딩 비.브이. 조절성 접합부를 갖는 기판 핸들링 장치
US11876356B2 (en) 2020-03-11 2024-01-16 Asm Ip Holding B.V. Lockout tagout assembly and system and method of using same
KR20210117157A (ko) 2020-03-12 2021-09-28 에이에스엠 아이피 홀딩 비.브이. 타겟 토폴로지 프로파일을 갖는 층 구조를 제조하기 위한 방법
KR20210124042A (ko) 2020-04-02 2021-10-14 에이에스엠 아이피 홀딩 비.브이. 박막 형성 방법
TW202146689A (zh) 2020-04-03 2021-12-16 荷蘭商Asm Ip控股公司 阻障層形成方法及半導體裝置的製造方法
TW202145344A (zh) 2020-04-08 2021-12-01 荷蘭商Asm Ip私人控股有限公司 用於選擇性蝕刻氧化矽膜之設備及方法
US11821078B2 (en) 2020-04-15 2023-11-21 Asm Ip Holding B.V. Method for forming precoat film and method for forming silicon-containing film
KR20210128343A (ko) 2020-04-15 2021-10-26 에이에스엠 아이피 홀딩 비.브이. 크롬 나이트라이드 층을 형성하는 방법 및 크롬 나이트라이드 층을 포함하는 구조
US11996289B2 (en) 2020-04-16 2024-05-28 Asm Ip Holding B.V. Methods of forming structures including silicon germanium and silicon layers, devices formed using the methods, and systems for performing the methods
TW202146831A (zh) 2020-04-24 2021-12-16 荷蘭商Asm Ip私人控股有限公司 垂直批式熔爐總成、及用於冷卻垂直批式熔爐之方法
KR20210132576A (ko) 2020-04-24 2021-11-04 에이에스엠 아이피 홀딩 비.브이. 바나듐 나이트라이드 함유 층을 형성하는 방법 및 이를 포함하는 구조
KR20210132600A (ko) 2020-04-24 2021-11-04 에이에스엠 아이피 홀딩 비.브이. 바나듐, 질소 및 추가 원소를 포함한 층을 증착하기 위한 방법 및 시스템
KR20210134226A (ko) 2020-04-29 2021-11-09 에이에스엠 아이피 홀딩 비.브이. 고체 소스 전구체 용기
KR20210134869A (ko) 2020-05-01 2021-11-11 에이에스엠 아이피 홀딩 비.브이. Foup 핸들러를 이용한 foup의 빠른 교환
TW202147543A (zh) 2020-05-04 2021-12-16 荷蘭商Asm Ip私人控股有限公司 半導體處理系統
KR20210141379A (ko) 2020-05-13 2021-11-23 에이에스엠 아이피 홀딩 비.브이. 반응기 시스템용 레이저 정렬 고정구
TW202146699A (zh) 2020-05-15 2021-12-16 荷蘭商Asm Ip私人控股有限公司 形成矽鍺層之方法、半導體結構、半導體裝置、形成沉積層之方法、及沉積系統
KR20210143653A (ko) 2020-05-19 2021-11-29 에이에스엠 아이피 홀딩 비.브이. 기판 처리 장치
KR20210145078A (ko) 2020-05-21 2021-12-01 에이에스엠 아이피 홀딩 비.브이. 다수의 탄소 층을 포함한 구조체 및 이를 형성하고 사용하는 방법
KR102702526B1 (ko) 2020-05-22 2024-09-03 에이에스엠 아이피 홀딩 비.브이. 과산화수소를 사용하여 박막을 증착하기 위한 장치
TW202201602A (zh) 2020-05-29 2022-01-01 荷蘭商Asm Ip私人控股有限公司 基板處理方法
TW202212620A (zh) 2020-06-02 2022-04-01 荷蘭商Asm Ip私人控股有限公司 處理基板之設備、形成膜之方法、及控制用於處理基板之設備之方法
TW202218133A (zh) 2020-06-24 2022-05-01 荷蘭商Asm Ip私人控股有限公司 形成含矽層之方法
TW202217953A (zh) 2020-06-30 2022-05-01 荷蘭商Asm Ip私人控股有限公司 基板處理方法
TW202202649A (zh) 2020-07-08 2022-01-16 荷蘭商Asm Ip私人控股有限公司 基板處理方法
KR20220010438A (ko) 2020-07-17 2022-01-25 에이에스엠 아이피 홀딩 비.브이. 포토리소그래피에 사용하기 위한 구조체 및 방법
TW202204662A (zh) 2020-07-20 2022-02-01 荷蘭商Asm Ip私人控股有限公司 用於沉積鉬層之方法及系統
US12040177B2 (en) 2020-08-18 2024-07-16 Asm Ip Holding B.V. Methods for forming a laminate film by cyclical plasma-enhanced deposition processes
KR20220027026A (ko) 2020-08-26 2022-03-07 에이에스엠 아이피 홀딩 비.브이. 금속 실리콘 산화물 및 금속 실리콘 산질화물 층을 형성하기 위한 방법 및 시스템
TW202229601A (zh) 2020-08-27 2022-08-01 荷蘭商Asm Ip私人控股有限公司 形成圖案化結構的方法、操控機械特性的方法、裝置結構、及基板處理系統
USD990534S1 (en) 2020-09-11 2023-06-27 Asm Ip Holding B.V. Weighted lift pin
USD1012873S1 (en) 2020-09-24 2024-01-30 Asm Ip Holding B.V. Electrode for semiconductor processing apparatus
US12009224B2 (en) 2020-09-29 2024-06-11 Asm Ip Holding B.V. Apparatus and method for etching metal nitrides
KR20220045900A (ko) 2020-10-06 2022-04-13 에이에스엠 아이피 홀딩 비.브이. 실리콘 함유 재료를 증착하기 위한 증착 방법 및 장치
CN114293174A (zh) 2020-10-07 2022-04-08 Asm Ip私人控股有限公司 气体供应单元和包括气体供应单元的衬底处理设备
TW202229613A (zh) 2020-10-14 2022-08-01 荷蘭商Asm Ip私人控股有限公司 於階梯式結構上沉積材料的方法
TW202217037A (zh) 2020-10-22 2022-05-01 荷蘭商Asm Ip私人控股有限公司 沉積釩金屬的方法、結構、裝置及沉積總成
TW202223136A (zh) 2020-10-28 2022-06-16 荷蘭商Asm Ip私人控股有限公司 用於在基板上形成層之方法、及半導體處理系統
TW202235649A (zh) 2020-11-24 2022-09-16 荷蘭商Asm Ip私人控股有限公司 填充間隙之方法與相關之系統及裝置
TW202235675A (zh) 2020-11-30 2022-09-16 荷蘭商Asm Ip私人控股有限公司 注入器、及基板處理設備
US11946137B2 (en) 2020-12-16 2024-04-02 Asm Ip Holding B.V. Runout and wobble measurement fixtures
TW202231903A (zh) 2020-12-22 2022-08-16 荷蘭商Asm Ip私人控股有限公司 過渡金屬沉積方法、過渡金屬層、用於沉積過渡金屬於基板上的沉積總成
USD981973S1 (en) 2021-05-11 2023-03-28 Asm Ip Holding B.V. Reactor wall for substrate processing apparatus
USD1023959S1 (en) 2021-05-11 2024-04-23 Asm Ip Holding B.V. Electrode for substrate processing apparatus
USD980814S1 (en) 2021-05-11 2023-03-14 Asm Ip Holding B.V. Gas distributor for substrate processing apparatus
USD980813S1 (en) 2021-05-11 2023-03-14 Asm Ip Holding B.V. Gas flow control plate for substrate processing apparatus
USD990441S1 (en) 2021-09-07 2023-06-27 Asm Ip Holding B.V. Gas flow control plate

Citations (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6473620A (en) * 1987-09-14 1989-03-17 Mitsubishi Electric Corp Plasma applying device
US5698062A (en) * 1993-11-05 1997-12-16 Tokyo Electron Limited Plasma treatment apparatus and method
US5997687A (en) * 1996-08-23 1999-12-07 Tokyo Electron Limited Plasma processing apparatus
US6009828A (en) * 1995-02-17 2000-01-04 Sharp Kabushiki Kaisha Method for forming a thin semiconductor film and a plasma CVD apparatus to be used in the method
US6074518A (en) * 1994-04-20 2000-06-13 Tokyo Electron Limited Plasma processing apparatus
US6089181A (en) * 1996-07-23 2000-07-18 Tokyo Electron Limited Plasma processing apparatus
US6110287A (en) * 1993-03-31 2000-08-29 Tokyo Electron Limited Plasma processing method and plasma processing apparatus
US6165376A (en) * 1997-01-16 2000-12-26 Nissin Electric Co., Ltd. Work surface treatment method and work surface treatment apparatus
US6214162B1 (en) * 1996-09-27 2001-04-10 Tokyo Electron Limited Plasma processing apparatus
US20010022293A1 (en) * 1999-12-27 2001-09-20 Kenji Maeda Plasma processing equipment and plasma processing method using the same
US6372654B1 (en) * 1999-04-07 2002-04-16 Nec Corporation Apparatus for fabricating a semiconductor device and method of doing the same
US6433297B1 (en) * 1999-03-19 2002-08-13 Kabushiki Kaisha Toshiba Plasma processing method and plasma processing apparatus
US6562190B1 (en) * 2000-10-06 2003-05-13 Lam Research Corporation System, apparatus, and method for processing wafer using single frequency RF power in plasma processing chamber
JP2003197536A (ja) * 2001-12-21 2003-07-11 Sharp Corp プラズマcvd装置、非晶質シリコン系薄膜及びその製造方法
US20040195216A1 (en) * 2001-08-29 2004-10-07 Strang Eric J. Apparatus and method for plasma processing
US20040221958A1 (en) * 2003-05-06 2004-11-11 Lam Research Corporation RF pulsing of a narrow gap capacitively coupled reactor
US20040242021A1 (en) * 2003-05-28 2004-12-02 Applied Materials, Inc. Method and apparatus for plasma nitridation of gate dielectrics using amplitude modulated radio-frequency energy
US20040250954A1 (en) * 2003-06-12 2004-12-16 Samsung Electronics Co., Ltd. Plasma chamber
US20050103441A1 (en) * 2001-11-14 2005-05-19 Masanobu Honda Etching method and plasma etching apparatus
US20050183822A1 (en) * 2002-04-26 2005-08-25 Tetsuo Ono Plasma processing method and plasma processing apparatus
US20050241762A1 (en) * 2004-04-30 2005-11-03 Applied Materials, Inc. Alternating asymmetrical plasma generation in a process chamber
US20060118044A1 (en) * 2004-12-03 2006-06-08 Shinji Himori Capacitive coupling plasma processing apparatus
US20080026488A1 (en) * 2006-07-31 2008-01-31 Ibm Corporation Method and apparatus for detecting endpoint in a dry etching system by monitoring a superimposed DC current
US20080230008A1 (en) * 2007-03-21 2008-09-25 Alexander Paterson Plasma species and uniformity control through pulsed vhf operation
US20100140221A1 (en) * 2008-12-09 2010-06-10 Tokyo Electron Limited Plasma etching apparatus and plasma cleaning method

Family Cites Families (26)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5947733A (ja) * 1982-09-13 1984-03-17 Hitachi Ltd プラズマプロセス方法および装置
JPH0793292B2 (ja) * 1988-03-07 1995-10-09 株式会社日立製作所 マイクロ波プラズマ処理方法及び装置
JP2851765B2 (ja) * 1992-03-31 1999-01-27 松下電器産業株式会社 プラズマ発生方法およびその装置
JP3201576B2 (ja) * 1995-02-17 2001-08-20 シャープ株式会社 半導体薄膜の製造方法及びその製造方法を用いたプラズマcvd装置
JP3700278B2 (ja) * 1996-08-23 2005-09-28 ソニー株式会社 デュアルゲート構造を有する半導体装置の製造方法
JP3629705B2 (ja) * 1997-06-06 2005-03-16 東京エレクトロン株式会社 プラズマ処理装置
US6093332A (en) * 1998-02-04 2000-07-25 Lam Research Corporation Methods for reducing mask erosion during plasma etching
JP2000269198A (ja) * 1999-03-19 2000-09-29 Toshiba Corp プラズマ処理方法及びプラズマ処理装置
JP2001313284A (ja) * 2000-02-21 2001-11-09 Hitachi Ltd プラズマ処理方法および装置
JP2001244250A (ja) * 2000-03-01 2001-09-07 Hitachi Ltd 表面処理方法および装置
JP2001358129A (ja) * 2000-06-16 2001-12-26 Matsushita Electric Ind Co Ltd プラズマ処理方法及びプラズマ処理装置
US6479391B2 (en) * 2000-12-22 2002-11-12 Intel Corporation Method for making a dual damascene interconnect using a multilayer hard mask
US6777037B2 (en) * 2001-02-21 2004-08-17 Hitachi, Ltd. Plasma processing method and apparatus
JP4112821B2 (ja) * 2001-06-01 2008-07-02 松下電器産業株式会社 プラズマ処理方法およびプラズマ処理装置
JP3927464B2 (ja) 2002-04-26 2007-06-06 株式会社日立ハイテクノロジーズ プラズマ処理方法
US6872666B2 (en) * 2002-11-06 2005-03-29 Intel Corporation Method for making a dual damascene interconnect using a dual hard mask
US7405521B2 (en) * 2003-08-22 2008-07-29 Lam Research Corporation Multiple frequency plasma processor method and apparatus
US20050224980A1 (en) * 2004-03-31 2005-10-13 Jihperng Leu Interconnect adapted for reduced electron scattering
US20050285269A1 (en) * 2004-06-29 2005-12-29 Yang Cao Substantially void free interconnect formation
JP5323303B2 (ja) 2004-12-03 2013-10-23 東京エレクトロン株式会社 プラズマ処理装置
CN100539000C (zh) * 2004-12-03 2009-09-09 东京毅力科创株式会社 电容耦合型等离子体处理装置
JP2006196034A (ja) * 2005-01-11 2006-07-27 Hitachi Global Storage Technologies Netherlands Bv 磁気ヘッドの製造方法
US7678529B2 (en) * 2005-11-21 2010-03-16 Shin-Etsu Chemical Co., Ltd. Silicon-containing film forming composition, silicon-containing film serving as etching mask, substrate processing intermediate, and substrate processing method
JP2007165512A (ja) * 2005-12-13 2007-06-28 Hitachi High-Technologies Corp プラズマ処理装置
JP4827081B2 (ja) * 2005-12-28 2011-11-30 東京エレクトロン株式会社 プラズマエッチング方法およびコンピュータ読み取り可能な記憶媒体
US7883632B2 (en) * 2006-03-22 2011-02-08 Tokyo Electron Limited Plasma processing method

Patent Citations (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6473620A (en) * 1987-09-14 1989-03-17 Mitsubishi Electric Corp Plasma applying device
US6110287A (en) * 1993-03-31 2000-08-29 Tokyo Electron Limited Plasma processing method and plasma processing apparatus
US5698062A (en) * 1993-11-05 1997-12-16 Tokyo Electron Limited Plasma treatment apparatus and method
US6074518A (en) * 1994-04-20 2000-06-13 Tokyo Electron Limited Plasma processing apparatus
US6009828A (en) * 1995-02-17 2000-01-04 Sharp Kabushiki Kaisha Method for forming a thin semiconductor film and a plasma CVD apparatus to be used in the method
US6089181A (en) * 1996-07-23 2000-07-18 Tokyo Electron Limited Plasma processing apparatus
US5997687A (en) * 1996-08-23 1999-12-07 Tokyo Electron Limited Plasma processing apparatus
US6214162B1 (en) * 1996-09-27 2001-04-10 Tokyo Electron Limited Plasma processing apparatus
US6165376A (en) * 1997-01-16 2000-12-26 Nissin Electric Co., Ltd. Work surface treatment method and work surface treatment apparatus
US6433297B1 (en) * 1999-03-19 2002-08-13 Kabushiki Kaisha Toshiba Plasma processing method and plasma processing apparatus
US6372654B1 (en) * 1999-04-07 2002-04-16 Nec Corporation Apparatus for fabricating a semiconductor device and method of doing the same
US20010022293A1 (en) * 1999-12-27 2001-09-20 Kenji Maeda Plasma processing equipment and plasma processing method using the same
US6562190B1 (en) * 2000-10-06 2003-05-13 Lam Research Corporation System, apparatus, and method for processing wafer using single frequency RF power in plasma processing chamber
US20040195216A1 (en) * 2001-08-29 2004-10-07 Strang Eric J. Apparatus and method for plasma processing
US20050103441A1 (en) * 2001-11-14 2005-05-19 Masanobu Honda Etching method and plasma etching apparatus
JP2003197536A (ja) * 2001-12-21 2003-07-11 Sharp Corp プラズマcvd装置、非晶質シリコン系薄膜及びその製造方法
US20050183822A1 (en) * 2002-04-26 2005-08-25 Tetsuo Ono Plasma processing method and plasma processing apparatus
US20070184562A1 (en) * 2002-04-26 2007-08-09 Tetsuo Ono Plasma Processing Method And Plasma Processing Apparatus
US20040221958A1 (en) * 2003-05-06 2004-11-11 Lam Research Corporation RF pulsing of a narrow gap capacitively coupled reactor
US20040242021A1 (en) * 2003-05-28 2004-12-02 Applied Materials, Inc. Method and apparatus for plasma nitridation of gate dielectrics using amplitude modulated radio-frequency energy
US20060216944A1 (en) * 2003-05-28 2006-09-28 Kraus Philip A Method and apparatus for plasma nitridation of gate dielectrics using amplitude modulated radio-frequency energy
US20040250954A1 (en) * 2003-06-12 2004-12-16 Samsung Electronics Co., Ltd. Plasma chamber
US20050241762A1 (en) * 2004-04-30 2005-11-03 Applied Materials, Inc. Alternating asymmetrical plasma generation in a process chamber
US20060118044A1 (en) * 2004-12-03 2006-06-08 Shinji Himori Capacitive coupling plasma processing apparatus
US20080026488A1 (en) * 2006-07-31 2008-01-31 Ibm Corporation Method and apparatus for detecting endpoint in a dry etching system by monitoring a superimposed DC current
US20080230008A1 (en) * 2007-03-21 2008-09-25 Alexander Paterson Plasma species and uniformity control through pulsed vhf operation
US20100140221A1 (en) * 2008-12-09 2010-06-10 Tokyo Electron Limited Plasma etching apparatus and plasma cleaning method

Cited By (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102299068A (zh) * 2010-06-23 2011-12-28 东京毅力科创株式会社 基板处理方法
US8685267B2 (en) * 2010-06-23 2014-04-01 Tokyo Electron Limited Substrate processing method
US20120289049A1 (en) * 2011-05-10 2012-11-15 Applied Materials, Inc. Copper oxide removal techniques
US8758638B2 (en) * 2011-05-10 2014-06-24 Applied Materials, Inc. Copper oxide removal techniques
US20130126486A1 (en) * 2011-11-22 2013-05-23 Ryan Bise Multi Zone Gas Injection Upper Electrode System
US10622195B2 (en) * 2011-11-22 2020-04-14 Lam Research Corporation Multi zone gas injection upper electrode system
US11594400B2 (en) * 2011-11-23 2023-02-28 Lam Research Corporation Multi zone gas injection upper electrode system
US10651012B2 (en) 2012-01-18 2020-05-12 Tokyo Electron Limited Substrate processing method
US20140346040A1 (en) * 2012-01-18 2014-11-27 Tokyo Electron Limited Substrate processing apparatus
TWI576913B (zh) * 2012-02-14 2017-04-01 Tokyo Electron Ltd Substrate processing device
US9390943B2 (en) * 2012-02-14 2016-07-12 Tokyo Electron Limited Substrate processing apparatus
US20130220547A1 (en) * 2012-02-14 2013-08-29 Tokyo Electron Limited Substrate processing apparatus
CN103247511A (zh) * 2012-02-14 2013-08-14 东京毅力科创株式会社 基板处理装置
US20160247666A1 (en) * 2015-02-23 2016-08-25 Tokyo Electron Limited Plasma processing method and plasma processing apparatus
US9870898B2 (en) * 2015-02-23 2018-01-16 Tokyo Electron Limited Plasma processing method and plasma processing apparatus
US10707053B2 (en) 2015-02-23 2020-07-07 Tokyo Electron Limited Plasma processing method and plasma processing apparatus
WO2019118601A1 (en) * 2017-12-13 2019-06-20 Applied Materials, Inc. Spatial atomic layer deposition chamber with plasma pulsing to prevent charge damage
CN111433887A (zh) * 2017-12-13 2020-07-17 应用材料公司 具有等离子体脉冲以防止电荷损坏的空间原子层沉积腔室
US10854428B2 (en) 2017-12-13 2020-12-01 Applied Materials, Inc. Spatial atomic layer deposition chamber with plasma pulsing to prevent charge damage
TWI753223B (zh) * 2017-12-13 2022-01-21 美商應用材料股份有限公司 具有電漿脈衝以防止電荷損傷的基板處理腔室及方法

Also Published As

Publication number Publication date
KR20090018582A (ko) 2009-02-20
KR101434015B1 (ko) 2014-08-25
JP5514413B2 (ja) 2014-06-04
JP2009071292A (ja) 2009-04-02
CN101370349A (zh) 2009-02-18
JP2014135512A (ja) 2014-07-24
TWI460786B (zh) 2014-11-11
KR20120042775A (ko) 2012-05-03
JP5836419B2 (ja) 2015-12-24
US20130122714A1 (en) 2013-05-16
EP2026374A3 (en) 2010-08-25
EP2026374B1 (en) 2017-04-05
EP2026374A2 (en) 2009-02-18
CN104810272A (zh) 2015-07-29
KR101181023B1 (ko) 2012-09-07
US8703002B2 (en) 2014-04-22
TW200913056A (en) 2009-03-16

Similar Documents

Publication Publication Date Title
US8703002B2 (en) Plasma processing apparatus, plasma processing method and storage medium
US10804072B2 (en) Plasma processing apparatus
US9659756B2 (en) Plasma etching apparatus and plasma cleaning method
US9275836B2 (en) Plasma processing apparatus and plasma processing method
US8651049B2 (en) Plasma processing apparatus
US8440050B2 (en) Plasma processing apparatus and method, and storage medium
US9039909B2 (en) Plasma etching method, semiconductor device manufacturing method and computer-readable storage medium
KR101957911B1 (ko) 플라즈마 처리 장치
US7718007B2 (en) Substrate supporting member and substrate processing apparatus
US9530666B2 (en) Plasma etching method and plasma etching apparatus
US20120145186A1 (en) Plasma processing apparatus
US20070227666A1 (en) Plasma processing apparatus
US8157953B2 (en) Plasma processing apparatus
US20070202701A1 (en) Plasma etching apparatus and method
KR20170028849A (ko) 포커스 링 및 기판 처리 장치
US8034213B2 (en) Plasma processing apparatus and plasma processing method
US10957515B2 (en) Plasma processing method and plasma processing apparatus

Legal Events

Date Code Title Description
AS Assignment

Owner name: TOKYO ELECTRON LIMITED, JAPAN

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:MATSUDO, TATSUO;HIMORI, SHINJI;IMAI, NORIAKI;AND OTHERS;REEL/FRAME:021529/0163

Effective date: 20080905

STCB Information on status: application discontinuation

Free format text: ABANDONED -- FAILURE TO RESPOND TO AN OFFICE ACTION